2008 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 31, NO.

12, DECEMBER 2023

An Optimized Low-Power VLSI Architecture for

ECG/VCG Data Compression for IoHT
Wearable Device Application
Meenali Janveja , Ashwani Kumar Sharma , Abhyuday Bhardwaj, Jan Pidanic , Senior Member, IEEE,
and Gaurav Trivedi , Member, IEEE

Abstract— Continuous monitoring of the electrical activity

of heart signals using wearable Internet of Healthcare Things
(IoHTs) devices plays a crucial role in decreasing mortality rates.
However, this continuous monitoring using an electrocardiogram
(ECG) or vectorcardiogram (VCG) generates huge clinical data.
Moreover, these devices are constrained in terms of ON-chip
storage, data transmission capacity, and power. Thus, handling
a large amount of data is difficult with these devices, making it
necessary to compress these data for storage and transmission.
Lossless or near-lossless data compression solves this problem,
ensuring that no relevant physiological/clinical information is
lost in the compression process. Therefore, low-power, resource-
efficient, and lossless VLSI architectures are proposed in this
article to compress multichannel ECG/VCG data. The designs
are tested using the PTB database for both ECG and VCG data
and can achieve compression ratios (CRs) of 3.857 and 4.45 with
minimal power and area requirements making them suitable for
low-power wearable healthcare devices.
Index Terms— Compression, electrocardiogram (ECG), Inter-
net of Healthcare Thing (IoHT), low-power, vectorcardiogram
(VCG).

I. I NTRODUCTION

C ARDIAC ailments are one of the biggest causes of Fig. 1. Basic IoHT system.
mortality, causing millions of deaths worldwide every
year. Electrocardiogram (ECG) signal manifests the heart’s
electrical activity and is widely used by clinicians to detect over long intervals (12–24 h). This continuous monitoring of
these heart abnormalities. In general, a 12-lead ECG is con- the patients results in the generation of a large amount of
sidered by cardiologists for the diagnosis of cardiac diseases. clinical data.
Similarly, medical professionals also view a three-lead vec- Data compression aids in reducing the size of acquired
torcardiogram (VCG) in many cardiac cases as it can depict ECG/VCG data that can be stored or sent to cloud storage.
anomalies with fewer leads [1]. In the Internet of Healthcare The data compression schemes can be of two types: lossy
Thing (IoHT), ECG/VCG data are acquired using different and lossless. Lossy data compression results in permanent
sensors and, later, sent to cloud storage to enable telehealth loss of information during the processing steps, whereas loss-
monitoring and analysis by the doctors in a hospital. A typical less compression techniques ensure that no information loss
IoHT system is shown in Fig. 1. However, for reliable detec- occurs during the processing steps in the compression [2], [3].
tion of heart diseases, ECG and VGC need to be recorded As we know, biomedical signals contain critical pathological
details that need to be preserved during the compression
Manuscript received 16 December 2022; revised 29 June 2023; accepted process; therefore, lossless compression is preferred over lossy
25 August 2023. Date of publication 6 October 2023; date of current version
28 November 2023. (Corresponding author: Meenali Janveja.) techniques.
Meenali Janveja, Ashwani Kumar Sharma, Abhyuday Bhardwaj, and Gaurav Although users can rely on lossy techniques for ECG
Trivedi are with the Department of Electronics and Electrical Engineering, compression, lossless compression is needed for better clinical
Indian Institute of Technology Guwahati, Guwahati, Assam 781039, India
(e-mail: [email protected]). accuracy for many reasons. Furthermore, worldwide medical
Jan Pidanic is with the Department of Electrical Engineering, University of regulations also advocate for the lossless techniques of ECG
Pardubice, 53210 Pardubice, Czech Republic. data compression. Also, with advanced diagnostics, ECG
Color versions of one or more figures in this article are available at
https://doi.org/10.1109/TVLSI.2023.3314611. variations that were earlier treated as random heart activity
Digital Object Identifier 10.1109/TVLSI.2023.3314611 can now be of great medical relevance. Advanced machine
1063-8210 © 2023 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See https://www.ieee.org/publications/rights/index.html for more information.

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JANVEJA et al.: OPTIMIZED LOW-POWER VLSI ARCHITECTURE FOR ECG/VCG DATA COMPRESSION 2009

learning algorithms might get relevant information in these

data segments, improving the diagnosis. Furthermore, the
reconstruction error due to lossy techniques may lead to
misinterpretation of crucial ECG features, such as QRS com-
plex amplitudes, ST segment slopes, and T and P wave
amplitudes. Therefore, ECG and VCG signals require loss-
less compression so that the clinical information of these
signals is not lost during the process. An exact copy of
the data can be reproduced with the help of compressed
data whenever required for the diagnosis. The compression
systems are designed to have a large compression ratio (CR)
with negligible error in the reconstructed data. Furthermore,
it is essential to mention that this data transmission to the
cloud/remote location is a power-consuming process. As we
know, IoHT-enabled wearable devices are constrained in terms
of memory and power capacity. Thus, it becomes imperative to
Fig. 2. Basic block diagram of the compression/decompression system.
compress the ECG/VCG data to cater to the wearable devices’
low power and area requirements. This article proposes low-
power VLSI architectures for ECG/VCG data compression to reduce power consumption. A resource-efficient and low-
and decompression, which can be used at the sender and power architecture of a compression algorithm is reported
receiver ends. Multilead data compression and decompression in [7], which uses shifting operations to replace different
techniques for ECG and VCG signals are presented in this arithmetic operations. Although the proposed architectures are
article. Furthermore, hardware implementation is showcased, suitable for hardware implementation and have low power
aiming to achieve low power, small area, and real-time data requirements, they are suitable for single-lead ECG data
compression and decompression so that it can be used as a compression. It is to be noted that several cardiovascular
subsystem in the wearable IoHT devices. diseases (CVDs) require analysis of multichannel ECG to be
correctly diagnosed. Therefore, single-lead compression is not
II. L ITERATURE R EVIEW suitable for many practical applications. However, a lossless
compression hardware design is depicted in [8] for multichan-
Several state-of-the-art methods are available that target nel ECG based on adaptive linear prediction and Golomb–Rice
lossless ECG compression. A conventional ECG compression coding (GRC) schemes. Though the architecture proposed in
system is divided into prediction and entropy coding modules. [8] can perform multichannel ECG data compression with a
Linear prediction methods, such as discrete pulse code mod- high CR, it uses a parallel architecture and complex GRC
ulation (DPCM) [9] and forward prediction-based approach coding which have high area and power cost. Therefore, in this
[10] to reduce signal prediction errors, are the most common article, we propose a more optimized architecture for lossless
prediction techniques. Furthermore, entropy coding is essential data compression using efficient hardware design techniques
to lossless ECG compression algorithm. Some previous works of both prediction and encoding which has much lower power
reported in the literature explore various entropy encoding requirements when compared with [8]. Based on the design
schemes. Deepu and Lian [10], Chen et al. [11], and Deepu and metrics, it can be stated that our proposed design can be a
Lian [12] use Huffman and prediction error coding schemes good candidate for wearable healthcare IoHT applications.
as entropy coding techniques in their algorithm. Variation
separation and zero run-length coding schemes are explored
and implemented on FPGA by Chen et al. [14]. However, III. P ROPOSED M ETHODOLOGY
these techniques are computationally complex and will require This section presents the hardware design methodology
higher memory and hardware resource utilization. Therefore, of the proposed architecture for lossless data compression
in this article, we used a computationally simple variable techniques for multichannel ECG and its extension to VCG.
length entropy encoding scheme and modified it further for Fig. 2 shows a basic block diagram of the proposed com-
much lower power requirements. pression system. The system uses adaptive linear prediction,
Ballesteros et al. [15] propose another FPGA-based imple- error calculation, error encoding, and packaging to perform
mentation, which uses the modified convolution and discrete compression. The first step is an adaptive linear prediction,
wavelet transform. Another VLSI architecture is proposed which outputs an approximation of the current sample with
in [16], which uses a new adaptive rending predictor and a a minimal error in prediction, followed by error calculation.
two-stage entropy encoder. This ECG encoder uses simple A good prediction of the current sample leads to a small error
arithmetic units for realization. Furthermore, an adaptive pre- value, which can be encoded with the help of less number of
dictor based on fuzzy decision control and Huffman coding bits using variable-length entropy encoding. The encoded data
is used in the design proposed by Luo et al. [17]. Moreover, are then packed to generate the final compressed bitstream.
Attarmoghaddam [18] presents a design based on compressed Packaging facilitates easy and faithful decompression of com-
sensing, illustrating a VLSI architecture using clock gating pressed bitstream. Here, we propose simple encoding and

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2010 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 31, NO. 12, DECEMBER 2023

(I I + I I I )
packaging schemes, which require less hardware and memory aV F = (3)
resources. Their novelties are depicted as follows. 2
1) Serial Architecture: An optimized technique to inter- (I − I I I )
aV L = (4)
leave the samples of multilead ECG and VCG signal is 2
used, eliminating the need for parallel architecture and V 2 = (0.088733 × I ) − (0.09116 × I I )
saving area and power resources. + (1.57862 × V 1) + (0.230214 × V 5) (5)
2) Modified Adaptive Linear Prediction Block: A multi- V 3 = (0.245068 × I ) + (0.447773 × I I )
plier and divider-less adaptive linear prediction block is
proposed in this article. The architecture is designed to + (1.14726 × V 1) + (0.609744 × V 5) (6)
optimize all the mulitplication and division operations V 4 = (0.111111 × I ) + (0.064849 × I I )
as shift operations, making it area- and power-efficient. + (0.465706 × V 1) + (1.07423 × V 5) (7)
The same architecture is used as a subsystem for com- V 6 = (0.202721 × I ) + (0.038811 × I I )
pression and decompression.
3) Simple Error Encoding Scheme: In the realization of the − (0.176913 × V 1) + (0.59492 × V 5). (8)
proposed method, a simple linear encoding scheme is
The complete 12-lead information can be built from the
used, which is implemented using comparators. Further-
information of these suggested four leads by the clinicians.
more, optimization to the original samples is performed
Therefore, four-lead ECG data can be compressed instead of
so that the error obtained can be encoded using fewer
12-lead data to be communicated over a channel. This reduces
bits.
the hardware and memory requirements of the wearable
4) Novel Packaging Scheme for Encoded Error Data: The
devices. Similarly, the proposed algorithm can be extended
proposed work uses a simple variable length entropy
for three-lead VCG data compression. The complete ECG
encoding scheme, which involves selecting a fixed num-
compression algorithm is explained in Algorithm 1. The
ber of bits as per the range of encoded error. The
interleaved samples of four-lead ECG or three-lead VCG are
packed data are generated by concatenating the encoding
fed as input to the compression system. A four-lead data
length and selected bits of the predicted error. This tech-
compression system is presented in [8]. The data of four
nique does not require complex computations, making
leads come parallelly from the sensors in any conventional
it hardware-efficient and maintaining a high CR.
system. However, processing these leads in parallel generally
5) VCG Compression and Decompression Systems: The
requires parallel architecture [8]. As it is evident that parallel
heart’s electrical activity can be monitored with the
architectures increase hardware requirements, we use sequen-
help of two signals ECG or VCG. ECG represents
tial implementation using a simple technique to interleave
the heart’s electrical activity using 12 leads, whereas
samples of all the four leads in this work. Initially, the first
VCG records the magnitude and direction of the elec-
sample of the first lead is taken as an input and compressed.
trical forces generated by the heart using three leads.
Later, the first samples of the other three leads are processed
VCG is a more useful investigative method for better
sequentially. The operating frequency of the design is set
diagnosis. It demonstrates clinical superiority over the
in such a way that all the four samples of every lead are
standard 12-lead ECG, specifically in the cases of atrial
processed before the second set of samples starts processing.
and ventricular hypertrophy, identification of myocardial
This enables us to optimize hardware resources considerably
infarction (MI) and ischemia, and to detect the pres-
and achieve low-power and area-efficient design for multilead
ence of multiple fascicular and bundle branch blocks.
ECG compression.
Among all the CVDs, MI and ischemia are among
Next, these interleaved samples are divided by a value
the biggest causes of mortality worldwide, and making
“T ” chosen adaptively to remove an overflow error in the
an accurate diagnosis of MI is crucial. Therefore, VCG
computations and are input to the adaptive linear prediction
compression can significantly add to the medical field
block. In this block, the first (I)-, second (II)-, and third
for better diagnosing these cardiac diseases and aids in
(III)-order linear predictions of the current sample are per-
increasing life expectancy. Almost all the works reported
formed. The previous three samples are used to estimate the
previously pertain to ECG data compression. However,
slope parameter and the weighted average of II- and III-order
the algorithm proposed in this article is also extended
linear predictions [8]. Note that we have assumed the first three
for VCG data compression and decompression.
samples to lie in the flat region of an ECG signal to simplify
A. Proposed Algorithm the algorithm. This assumption does not introduce any error
Conventionally, ECG is recorded as 12 leads of continuous in the compressed ECG signal. In the first step, the I-, II-, and
data. However, the electrical information of these 12 leads III-order linear predictions of the current sample are estimated
can be estimated mathematically with the help of only four using (9)–(11). x1 ˆ[n], x2 ˆ[n], and x3 ˆ[n] are the I-, II-, and
reference leads [21], i.e., I , I I , V 1, and V 5, as shown in the III- order linear predictions of the current sample, respectively,
equations below
x1 ˆ[n] = x[n − 1] (9)
I I I = I I −I (1)
x2 ˆ[n] = 2 · x[n − 1] − x[n − 2] (10)
−(I + I I )
aV R = (2) x3 ˆ[n] = 3 · x[n − 1] − 3 · x[n − 2] + x[n − 3]. (11)
2
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JANVEJA et al.: OPTIMIZED LOW-POWER VLSI ARCHITECTURE FOR ECG/VCG DATA COMPRESSION 2011

Algorithm 1 Pseudocode for ECG Data Compression linear predictions as per (14). Note that the threshold value of
10 is chosen adaptively by considering the tradeoff between
accuracy and CR
x2 ˆ[n] · W2 [n] + x3 ˆ[n] · W3 [n]


ˆ =
x[n] . (14)
(W2 [n] + W3 [n])
The weights W2 [n] and W3 [n] are calculated according to
the following equation:
Wi [n] = K ( M−ei [n])
¯
(15)
where K is taken as 2 for the ease of hardware implementation,
¯ is the
and M is determined after multiple iterations. ei [n]
average error calculated for the previous three samples for
a particular order of linear prediction as per the following
equation:
(ei [n − 1] + ei [n − 2] + ei [n − 3])
¯ =
ei [n] . (16)
3
The error term in weight calculation ensures that the final
prediction after the weighted average is closer to the lin-
ear prediction with fewer errors than II- and III-order linear
predictions. The adaptive linear prediction is followed by the
final prediction error calculation, which is estimated using the
following equation:
ˆ
e[n] = x[n] − x[n]. (17)
The next step of the compression process is encoding
the error data. In the previous works, complex encoding
techniques, such as Huffman encoding schemes [4] and GRC
[5], [8], are used. However, these encoding schemes involve
complex multiplication and division operations, which are
compute- and resource-intensive. Therefore, a variable length
entropy encoding [6] is used in the proposed work, which
requires only comparing operations and can be implemented
with minimal hardware resources on silicon, as shown in
Algorithm 1. In our proposed work, we encode the samples in
fewer bits, evident in Algorithm 1 due to the optimization
performed in preprocessing the interleaved samples. This
further enables us to optimize the hardware requirements. The
encoding length for the error depends on the range in which
the prediction error falls as shown in Algorithm 1. The final
step of the encoding process is packaging an encoded error,
which facilitates easy decompression of the compressed data.
Some of the previous works [6], [8] use complex packaging
techniques, which require more information to be sent over
the channel and more registers and counters to store the
data before transmission. This leads to a lesser CR and the
Furthermore, slope parameters are estimated using the follow- utilization of more hardware resources. Therefore, we use a
ing equations: simple packaging technique in this work, which selects a fixed
d12 [n] = x[n − 1] − x[n − 2] (12) number of bits as per the encoded sample error range, shown
in Algorithm 1. In the proposed compression algorithm, the
d23 [n] = x[n − 2] − x[n − 3]. (13)
first sample of every ECG lead is not encoded; therefore,
If d12 [n] and d23 [n] are small compared with the threshold no packaging is required for these first samples. However, the
value of the slope, it is assumed that the current sample prediction error for subsequent samples of all the four ECG
is lying in a flat region; thus, the final prediction is made leads is also packed with the encoding length information.
with the help of I-order linear prediction using (9). However, Finally, these packed encoded error data are obtained as a
if any of the two slope parameters breaches the threshold, the compressed bitstream and are sent for telemonitoring or stored
final prediction is the weighted average of II- and III-order ON -chip or cloud.

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2012 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 31, NO. 12, DECEMBER 2023

Note that the division operation is performed in hardware

using simple shift operations, and dividing the input ECG
samples by 32 does not cause any error in the compressed
data. Later, adaptive linear predictions of I, II, and III orders
are implemented as data-shifting operations for every indi-
vidual lead. These predicted values are then processed to get
prediction errors using a simple subtractor. Next, the leads are
merged and processed for slope parameter estimation, followed
by adaptive linear prediction of the current sample based
on threshold comparison. As depicted earlier, the first-order
prediction equation is used if the current sample is located
in a flat region. However, if the error exceeds the threshold,
the weighted average of II- and III-order linear predictions is
used for compression. As evident from (14), the calculation of
the weighted average requires both multiplication and division
operations, which are compute-intensive and require more
hardware resources. Therefore, in this article, we optimize the
weighted average using shifting operation, as explained in the
following equation:
Fig. 3. Architecture of the compression system.  
¯ ¯
x2 ˆ[n] · 2c−e2 [n] + x3 ˆ[n] · 2c−e3 [n]
pred_val = ¯ ¯


Similarly, the three-lead VCG compression can be per- 2c−e2 [n] + 2c−e3 [n]
   
formed using similar steps. As stated in Section III, VCG can ¯ ¯
x2 ˆ[n] · 2c−e2 [n] x3 ˆ[n] · 2c−e3 [n]
provide information about the electrical activity of the heart = ¯ ¯

+ ¯ ¯


using three leads in contrast to the 12 leads of ECG. Moreover, 2c−e2 [n] + 2c−e3 [n] 2c−e2 [n] + 2c−e3 [n]
x2 ˆ[n] x3 ˆ[n]



VCG is used over ECG by cardiologists in diagnosing several
CVD anomalies. In the case of VCG, only data from three = ¯ ¯

+ ¯ ¯


1 + 2e2 [n]− e3 [n] 1 + 2e3 [n]− e2 [n]
leads need to be transmitted instead of data from four leads
x2 ˆ[n] x3 ˆ[n]



of ECG, saving memory and power requirements. Therefore, =
+ (18)
¯


the proposed algorithm can be tuned for the VCG signal 1 + 2△e 1 + 2△e
compression as well. ¯ = − △ e, and C is a constant [8]. If △e = 0, then
where △e
Later, the decompression system is designed, as illustrated
the prediction value is estimated as follows:
in Fig. 2. During decompression, initially, decoding of the
packed encoded error is performed, which is followed by an x2 ˆ[n] x3 ˆ[n]



adaptive linear prediction of the current sample. The predicted pred_val =
+

1 + 20 1 + 20
sample is corrected for the error to obtain the reconstructed
data. The following section presents the hardware implemen- x2 ˆ[n] + x3 ˆ[n]
=
tation details of the proposed algorithm. 2
= x2 ˆ[n] ≫ 1 + x3 ˆ[n] ≫ 1. (19)
B. Hardware Implementation
If △e = 1, then the prediction value is estimated as follows:
The proposed hardware for multilead ECG compression is
x2 ˆ[n] x3 ˆ[n]



shown in Fig. 3. The complete architecture is designed as a
pred_value =
+

finite state machine. The architecture has serial data as input 1 + 21 1 + 2−1
where the samples of individual ECG leads are interleaved to x2 ˆ[n] x3 ˆ[n]
form the input data stream. Each sample of this input data = +
3 1.5
stream is presented in 2’s complement using a 16-bit rep-
= x2 ˆ[n] ≫ 2 + x2 ˆ[n] ≫ 4 + x2 ˆ[n] ≫ 6
resentation. Furthermore, lead separation is performed where
samples from the four chosen ECG leads are stored in the + x3 ˆ[n] ≫ 1 + x3 ˆ[n] ≫ 3 + x3 ˆ[n] ≫ 5.
registers with the help of a counter. Unlike the method in [8], (20)
which presents a parallel architecture for processing four leads,
our proposed lead separation method enables us to reuse the If △e = 2, then the prediction value is estimated as follows:
same architecture for compressing all the leads using just a x2 ˆ[n] x3 ˆ[n]
few additional registers to store some samples of other leads. pred_value = +
5 1.25
This serial scheme reduces the hardware resources drastically.
= x2 ˆ[n] ≫ 2 + x2 ˆ[n] ≫ 4 + x2 ˆ[n] ≫ 7
These interleaved samples are divided by 32 (T ) to reduce
the gain value of the samples. This value is chosen adap- + x3 ˆ[n] ≫ 1 + x3 ˆ[n] ≫ 2 + x3 ˆ[n] ≫ 5.
tively to avoid any overflow during multiplication operations. (21)

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JANVEJA et al.: OPTIMIZED LOW-POWER VLSI ARCHITECTURE FOR ECG/VCG DATA COMPRESSION 2013

TABLE I
P ERFORMANCE E VALUATION OF C OMPRESSION D ESIGN

If △e = 3, then the prediction value is estimated as follows: samples, only three samples are interleaved. The rest of the
algorithm and design remains the same as for ECG.
x2 ˆ[n] x3 ˆ[n]
pred_value = + On the other hand, the input of the decompression system
9 1.125 contains the error information of the successive samples. The
= x2 ˆ[n] ≫ 4 + x2 ˆ[n] ≫ 5 + x2 ˆ[n] ≫ 6 first step of decompression is unpacking and decoding the
+ x3 ˆ[n] ≫ 1 + x3 ˆ[n] ≫ 2 + x3 ˆ[n] ≫ 3. error data, followed by lead separation, similar to compression.
(22) Furthermore, I-, II-, and III-order linear predictions, prediction
error calculation, lead merging, slope parameter calculation,
If △e >= 4, then the prediction value is estimated as (23). and adaptive linear prediction are performed to retrieve the
¯
Equation (23) is optimized, considering 2△e ≫ 1 and 2△e ≪ 1 original ECG.
x2 ˆ[n] x3 ˆ[n]



pred_val =
+ ¯

IV. R ESULTS AND D ISCUSSION
1 + 2△e 1 + 2△e
x2 ˆ[n]


x3 ˆ[n]

The proposed method is validated using MATLAB and is
= △e
+ realized as an ASIC. Its implementation details and analysis
2 1 are presented below.
= x2 ˆ[n] ≫ △e + x3 ˆ[n]. (23)
For the negative values of △e, shifting operations of A. Performance Evaluation
x2 ˆ[n] and x3 ˆ[n] are interchanged. It can be observed from
The proposed compression design is validated using the
the equations mentioned above that the division operations
PTB-DB database sampled at 250 Hz [19]. Each input ECG
are optimized as shift operations saving hardware resources
sample is 16 bits and is taken from a variety of age ranges
and power. The architecture of the modified adaptive linear
and gender. Furthermore, each signal is analyzed for a 3-s
block is presented in Fig. 3. The final predicted value of
duration at a time. The efficacy of designs is evaluated by CR
the current sample is then used to calculate the absolute
and percentage root mean square difference (PRD). CR, CR,
prediction error. The error data are further encoded with
is defined mathematically as the ratio of the size of data before
the help of variable length entropy encoding, which requires
compression to the size of data after compression. Note that
comparators for the implementation. Finally, the encoded error
a high CR value is desirable for a compression system
is packaged, appending the length information of the current
encoded error sample with the encoded error samples. The Original_data_size
CR = . (24)
resulting packed encoded error data as a compressed bitstream Compressed_data_size
can be stored or transmitted as needed. Once the complete
Furthermore, PRD should be as low as possible for better
process is completed, the registers are updated for the new
performance, which can be expressed as follows:
samples, and a similar process is repeated for the entire input v
bitstream. Similarly, we can use this hardware for VCG data u PN
u (X (n) − X r (n))2
compression. As described before, only three leads will be PRD(100%) = 100 × t n=1P N . (25)
n=1 (X (n))
2
transmitted for a VCG. Therefore, instead of interleaving four

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2014 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 31, NO. 12, DECEMBER 2023

TABLE II
FPGA R ESOURCE U TILIZATION

TABLE III TABLE IV

C OMPARISON OF FPGA I MPLEMENTATION ASIC I MPLEMENTATION R ESULTS OF ECG/VCG C OMPRESSION
AND D ECOMPRESSION M ODULE

Table I presents the complete validation of the proposed

algorithm on the PTB dataset. The CR and PRD of the
proposed design are estimated to be 3.857 and 0.46%–11.1%, compression and decompression module areas are 0.0659 and
respectively, for four-lead ECG data compression. Similarly, 0.06359 mm2 , respectively. The detailed results are presented
the CR is 4.45, and PRD is 0.326%–11.896% for VCG data. in Table V and are compared with the contemporary methods.
It is observed that irrespective of age and gender variations, It can be seen from Table V that only [8] reports the compres-
the proposed scheme achieves a good CR. sion of four-lead ECG data. The ECG compression scheme of
the proposed design uses 201.72× less area and 32.91× less
power than [8]. The gate count of the proposed method is also
B. Implementation Results considerably less than [8]. Furthermore, the CR of the pro-
The compression and decompression systems are validated posed ECG compression method is close to [8] and is 1.05×
using MATLAB, using ECG and VCG records from the PTB- less. The proposed design performs better than [8] due to the
DB database [19]. Furthermore, an RTL design of the proposed following reasons. First, it uses the serial architecture instead
method is realized using Verilog-HDL and is synthesized and of the parallel architecture, which requires more resources
verified on an FPGA. The overall resource utilization of all and exhibits higher power consumption. Second, the proposed
the four methods performing ECG and VCG data compression design uses an optimized adaptive linear predictor hardware
and decompression is presented in Table II. Furthermore, ECG implementation. Third, it uses a simple error encoding scheme
compression and decompression architectures are compared compared with the computationally complex GRC scheme
with the methods available in the literature, which are imple- of [8]. All these optimizations enabled our design to have
mented on an FPGA. It can be observed from Table III that much-optimized area and power requirements compared with
the resource utilization of our proposed architectures is the the previous state-of-the-art work. Furthermore, our proposed
least among all the contemporary designs. Furthermore, our implementations are more efficient than the single-lead [22]
designs are realized as an ASIC using SCL 180-nm PDKs. and double-lead [23] ECG compression architectures in terms
The functionality of the proposed architecture is tested with of power consumption and gate count. Sarma and Biswas [22]
the Synopsys VCS. Synopsys Design Compiler is used to and Chen et al. [23] have used encoding schemes, such
generate a gate-level netlist, and the placement and routing as Golomb and Huffman, which are complex for hardware
are performed on this netlist using ICC. implementation compared with the variable length encoding
The operational frequency of ECG compression and decom- scheme used in the proposed work. Moreover, our proposed
pression systems is 36 kHz, and for VCG compression work can compress four-lead ECGs than the single- and
and decompression systems is 27 kHz. Note that our pro- double-lead designs available in the literature, making it more
posed methods can perform ECG and VCG data com- suitable for practical applications.
pression and decompression in real-time at the low fre- To the best of our knowledge, there are no data avail-
quencies mentioned above, enabling low-power operations. able for ECG decompression architectures in the literature.
Table IV depicts the postplacement and routing results of Note that the proposed ECG compression and decompression
the proposed ECG and VCG compression and decompres- architectures are also extended for VCG data compression
sion architectures. The power consumption at 1.98 V supply and decompression, showcasing its efficiency in terms of area
voltage and 36 kHz frequency is 2.102 µW. Furthermore, utilization and power consumption. This makes our proposed
the areas of ECG compression and decompression modules methods a suitable candidate for IoT-enabled wearable health-
are 0.0813 and 0.0801 mm2 , respectively. Similarly, the VCG care devices.

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JANVEJA et al.: OPTIMIZED LOW-POWER VLSI ARCHITECTURE FOR ECG/VCG DATA COMPRESSION 2015

TABLE V
C OMPARISON W ITH S TATE - OF - THE -A RT M ETHODS

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