Quiz 2 - EUI - ComputerArchitecture - Updated
Quiz 2 - EUI - ComputerArchitecture - Updated
Quiz 2
9/12/2024
Course: Computer Architecture
Quiz (2)
Question 1: Choose the correct answer.
10. In a pipelined architecture, what is the main reason for using registers between pipeline
stages?
a) To execute instructions faster
b) To prevent data hazards
c) To hold intermediate results for each stage
d) To reduce memory access time
11. Which instruction type in RISC-V updates the program counter based on a condition?
a) J-type
b) I-type
c) B-type
d) S-type
12. What does SIMD stand for in parallel processing?
a) Single Instruction, Multiple Data
b) Single Input, Multiple Data
c) Simple Instruction, Multi-core Design
d) Serial Instruction, Multiplexed Data
Explain the steps for instruction execution, including datapath elements involved. What value
will register x5x5 hold after execution?