PPI 8255 is a general purpose programmable I/O device

designed to interface the CPU with its outside world such as

ADC, DAC, keyboard etc. We can program it according to the
given condition. It can be used with almost any microprocessor.
It consists of three 8-bit bidirectional I/O ports i.e. PORT A,
PORT B and PORT C. We can assign different ports as input or
output functions. Block diagram –

It consists of 40 pins and operates in +5V regulated power

supply. Port C is further divided into two 4-bit ports i.e. port
C lower and port C upper and port C can work in either BSR
(bit set rest) mode or in mode 0 of input-output mode of
8255. Port B can work in either mode 0 or in mode 1 of input-
output mode. Port A can work either in mode 0, mode 1 or
mode 2 of input-output mode. It has two control groups,
control group A and control group B. Control group A consist
of port A and port C upper. Control group B consists of port
C lower and port B. Depending upon the value if CS’, A1 and
A0 we can select different ports in different modes as input-
output function or BSR. This is done by writing a suitable
word in control register (control word D0-D7
Bus Interface Unit (BIU)
The BIU in the 8086 microprocessor handles data and address
transfers, instruction fetching, and memory/I/O operations. Key
components include:
Instruction Queue: A 6-byte first-in-first-out (FIFO) queue that
pre-fetches instructions while the EU executes the current
instruction, improving processor speed.
Segment Registers: Four registers pointing to memory
segments:
Code Segment Register (CS): Holds instruction codes.
Data Segment Register (DS): Holds data, variables, and
constants.
Stack Segment Register (SS): Holds stack data, including
subroutine addresses and contents of registers used in
PUSH operations.
Extra Segment Register (ES): Holds destination addresses
for certain string operations.
Instruction Pointer (IP): Functions as a program counter,
indicating the address of the next instruction to execute.
Execution Unit (EU)
The EU decodes and executes instructions fetched by the BIU. It
operates in parallel with the BIU, contributing to faster
processing. Key components include:
General Purpose Registers: Four 16-bit registers subdivided
into 8-bit registers:
AX (Accumulator Register): For arithmetic operations.
BX (Base Register): For addressing.
CX (Counter): For loop control.
DX (Data Register): For I/O operations.
Index Registers: Include
the Stack Pointer (SP),
Base Pointer (BP),
Source Index (SI), and
Destination Index (DI).
ALU (Arithmetic Logic
Unit): Performs
arithmetic and logical
operations like addition,
subtraction,
multiplication, division,
AND, OR, and NOT.
 Flag Register (FLAGS): A 16-bit register with 9 flags, divided into
two categories:
Conditional Flags: Reflect the outcome of the last arithmetic
or logical operation.
Carry Flag , Auxiliary Flag ,Parity Flag, Zero Flag ,Sign
Flag, Overflow Flag
Control Flags: Control the operations of the EU.
Trap Flag, Interrupt Flag , Direction Flag

Control Word in Intel 8255

The Intel 8255 PPI uses an 8-bit control word to configure its
operational modes. This control word can either be a Mode Control
Word or a Bit Set/Reset (BSR) Control Word. The interpretation of
the control word depends on the most significant bit (D7).
Mode Control Word
The Mode Control Word configures the I/O operations of the 8255's
ports. The format is:
D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0
--------------------------------------
1|A | C| B| M| M| M| M
7: Set to 1 to indicate a Mode Control Word.
D6: Mode selection for Port A (1 for Mode 1 or 2, 0 for Mode 0).
D5: Port C (Upper) direction (1 for output, 0 for input).
D4: Mode selection for Port B (1 for Mode 1, 0 for Mode 0).
D3: Port C (Lower) direction (1 for output, 0 for input).
D2, D1, D0: Specific mode configuration for ports.
BSR Control Word
The BSR Control Word is used to set or reset individual bits in Port
C. Its format is:
D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0
--------------------------------------
0 | X | X | X | S | B2 | B1 | B0
D7: Set to 0 to indicate a BSR Control Word.
D6-D4: Don’t care (ignored in BSR mode).
D3: Bit value (1 to set, 0 to reset).
D2-D0: Selects the specific bit in Port C (0 to 7)
Interfacing a Stepper Motor
A stepper motor can be driven by controlling its coils through a
driver circuit, which is typically interfaced with the PPI's ports.
Connections
1. Stepper Motor Driver Circuit: Connect the control inputs of the
stepper motor driver circuit to the PPI's Port A (or any other
available port).
2. Power Supply: Ensure that the stepper motor and driver circuit
have an appropriate power supply.
Control Sequence
A typical stepper motor control sequence involves sending specific
bit patterns to the motor driver to move the motor in discrete
steps. Common sequences include full-step, half-step, and wave
drive.
Program Example
1. Initialize the 8255 to set Port A as output.
2. Send the control sequence to Port A to drive the motor.
MOV AL, 0x80 ; Control word to set Port A as output
OUT 0xF003, AL ; Write control word to control register
STEP1:
MOV AL, 0x08 ; Step 1: 1000
OUT 0xF000, AL ; Write to Port A
CALL DELAY ; Delay for motor step
MOV AL, 0x04 ; Step 2: 0100
OUT 0xF000, AL ; Write to Port A
CALL DELAY ; Delay for motor step
MOV AL, 0x02 ; Step 3: 0010
OUT 0xF000, AL ; Write to Port A
CALL DELAY ; Delay for motor step
MOV AL, 0x01 ; Step 4: 0001
OUT 0xF000, AL ; Write to Port A
CALL DELAY ; Delay for motor step
JMP STEP1 ; Repeat the sequence
Interfacing a Seven-Segment Display
A seven-segment display can be driven by connecting each
segment to a PPI port and sending appropriate bit patterns to
light up the desired segments.
Connections
1. Segments: Connect each segment (A-G) and the decimal
point (DP) to individual lines of a PPI port, e.g., Port B.
2. Common Pin: Connect the common anode or cathode to the
power supply or ground, respectively, as per the display
type.
Segment Patterns
For a common anode seven-segment display, to display digits 0-
9, the segment patterns (with '1' for off and '0' for on) are:
Program Example
1. Initialize the 8255 to set Port B as output.
2. Send the segment pattern to Port B to display the desired
digit.
MOV AL, 0x90 ; Control word to set Port B as output
OUT 0xF003, AL ; Write control word to control register

DISPLAY_0:
MOV AL, 0xC0 ; Pattern to display '0' on the seven-segment
display
OUT 0xF001, AL ; Write to Port B
CALL DELAY ; Delay to keep the digit displayed

DISPLAY_1:
MOV AL, 0xF9 ; Pattern to display '1' on the seven-segment
display
OUT 0xF001, AL ; Write to Port B
CALL DELAY ; Delay to keep the digit displayed
JMP DISPLAY_0 ; Repeat the sequence
SIM (Set Interrupt Mask)
SIM is an instruction in microprocessors like the Intel 8085 that is
used to configure the interrupt system. It stands for Set Interrupt
Mask. This instruction is used to:
Enable or disable hardware interrupts (like RST7.5, RST6.5, and
RST5.5).
Control the serial output data bit (SOD).
RIM (Read Interrupt Mask)
RIM is an instruction in microprocessors like the Intel 8085 that is
used to read the status of interrupts and the interrupt mask. It
stands for Read Interrupt Mask. This instruction is used to:
Check the status of the interrupts (whether they are masked or
not).
Read the status of the serial input data bit (SID).
CALL
CALL is an assembly language instruction used to call a subroutine.
When a CALL instruction is executed:
The address of the next instruction (return address) is pushed
onto the stack.
The program control is transferred to the subroutine at the
specified address.
PUSH
PUSH is an assembly instruction used to save the contents of a
register pair onto the stack. When a PUSH instruction is executed:
The stack pointer is decremented.
The contents of the register pair are stored on the stack in two
separate memory locations.
POP
POP is an assembly instruction used to restore the contents of a
register pair from the stack. When a POP instruction is executed:
The contents of the stack are copied to the specified register
pair.
The stack pointer is incremented.
RET
RET is an assembly instruction used to return from a subroutine.
When a RET instruction is executed:
The return address is popped from the stack.
The program control is transferred back to the calling program.
RESET
RESET is an operation that initializes the microprocessor, setting it
to a known state. It typically:
Resets the program counter to zero.
Clears the instruction register.
Resets other registers and flags to their default states.
Stops all ongoing operations and starts the system from the
beginning.
SET
SET typically refers to setting a specific bit or a series of bits within
a register or memory location. This can be done using bit
manipulation instructions specific to the microprocessor
architecture.
Keyboard Debouncing
Keyboard debouncing refers to the process of eliminating false or
multiple signals generated by mechanical switches when a key is
pressed or released. Debouncing ensures that only one signal is
registered for a single key press. This can be achieved using
software algorithms or hardware circuits.
Nested Subroutines
Nested subroutines refer to subroutine calls within another
subroutine. In a nested subroutine:
One subroutine calls another subroutine before finishing its
own execution.
Each subroutine maintains its own stack frame for return
addresses, allowing proper return from each nested call.
Care must be taken to manage the stack properly to avoid
overflow and ensure that return addresses are correctly
maintained.
Memory interfacing involves connecting memory devices, such as
RAM or ROM, to a microprocessor so that the processor can read
from or write to the memory. Proper memory interfacing ensures
that the memory and microprocessor can communicate correctly
and efficiently. Here’s an overview of the key steps and
components involved in memory interfacing:
Key Components and Steps in Memory Interfacing
1. Address Bus:
The address bus carries the address signals from the
microprocessor to the memory.
Each memory location has a unique address, which is
specified by the microprocessor.
2. Data Bus:
The data bus carries data between the microprocessor and
the memory.
Depending on the system, the data bus can be 8-bit, 16-bit,
or 32-bit wide.
3. Control Signals:
Read (RD): A signal from the microprocessor indicating that
it wants to read data from the memory.
Write (WR): A signal from the microprocessor indicating
that it wants to write data to the memory.
Chip Select (CS): A signal used to select the specific
memory chip to be accessed, ensuring that only one
memory chip is active at a time.
4. Address Decoding:
Address decoding is used to generate the chip select
signals for the memory devices.
Decoders or multiplexers are used to decode the address
lines and generate the appropriate CS signals.
This allows the microprocessor to address a specific
memory location within the correct memory chip
Interrupts
• Interrupt is a process where an external device can get the attention
of the microprocessor. – The process starts from the I/O device – The
process is asynchronous.
• Interrupts can be classified into two types:
• Maskable (can be delayed)
• Non-Maskable (can not be delayed)
• Interrupts can also be classified into:
• Vectored (the address of the service routine is hard-wired)
• Non-vectored (the address of the service routine needs to be supplied
externally)
Priority of Interrupts
The 8085 assigns priority to interrupts to manage multiple interrupts
occurring simultaneously. The priority from highest to lowest is:
1. TRAP:The TRAP interrupt cannot be ignored or masked by the
microprocessor. It is typically used for critical events like power
failure or emergency shutdown. Vector Address: 0024H
2. RST7.5: This interrupt is triggered by the rising edge of the signal
and can be masked using software. It has a built-in priority higher
than RST6.5 and RST5.5. Vector Address: 003CH
3. RST6.5:This interrupt is triggered by a high-level signal and can be
masked using software. Vector Address: 0034H
4. RST5.5:This interrupt is also level-sensitive and can be masked using
software.Vector Address: 002CH
5. INTR: This is a general-purpose interrupt that can be masked. The
address of the ISR for this interrupt is provided by an external
device using the INTA (Interrupt Acknowledge) signal. non vectored
Vector Address: Determined by external device
6. Immediate Addressing: Operand is directly specified in the
instruction itself. Example: MVI A, 42H
7. Direct Addressing: Operand's address is directly specified in the
instruction. Example: LDA 2050H
8. Register Addressing: Operand is specified by one of the registers in
the microprocessor. Example: MOV B, A
9. Indirect Addressing: Operand's address is stored in a register or
memory location. Example: LDA (HL)
10. Indexed Addressing: An offset is added to a base address to access
the operand. Example: LXI H, 2000H followed by LDA (HL)
8085 Programming Model
1. Registers
The 8085 has six general purpose registers to store 8 bit data; these
are identifies as B, C, D, E, H, L.
They can be combined as register pairs - BC, DE and HL to perform
some 16-bit operations.
The programmer can use these registers to store or copy data into
the registers by using data copy instructions.
2. Accumulator
The accumulator is an 8-bit register that is a part of arithmetic/logic
unit(ALU).
This register is used to store 8-bit data and to perform arithmetic and
logical operations.
The result of an operation is stored in the accumulator.
The accumulator is also identified as register A.
3. Flags
Bit positions of various flags in the flag register of 8085
8085 has five flag registers:-
- Sign Flag (S): Sets or Resets based on the result stored in the
accumulator. If the result stored is positive, the flag resets else if the
result stored is negative the flag is set.
- Zero Flag (Z): Sets or Resets based on the result stored in the
accumulator.
If the result stored is zero the flag is set else it is reset.
- Auxiliary Carry Flag(AC) : This flag is set if there is a carry from low
nibble(lowest 4 bits) to high nibble(upper 4 bits) or a borrow from high
nibble to low nibble, in the low order 8-bit portion of an addition or
subtraction operation.
- Parity Flag (P): This flag is set if there is even parity else it resets.
- Carry Flag (CY): This flag is set if there is a carry bit else it resets.
4. Program Counter (PC)
This 16-bit register deals with sequencing the execution of
instructions this register is a memory pointer.
Memory locations have 16 bit addresses and that is why this is a 16
bit register.
The function of the PC is to point to the memory address from which
the next byte is to be fetched.
When a byte(machine code) is being fetched, the program counter is
incremented by one to point to the next memory location.
5. Stack Pointer (SP)
The stack pointer is also a 16-bit register used as a memory pointer.
It points to a memory location in R/W memory called stack.
The beggining of the stack is defined by loading 16-bit address in the