Scribd
Upload
2 views

2022embeded vlsi

Question paper

Uploaded by

Jayanth C V
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
2 views

2022embeded vlsi

Question paper

Uploaded by

Jayanth C V
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 4

J une-2022PG Examinations

USN
18MVE12
®
RV COLLEGE OF ENGINEERING
(An Autonomous Institution affiliated to VTU, Belagavi)
I Semester Master of Technology (VLSI Design and Embedded Systems)
ADVANCED EMBEDDED SYSTEM DESIGN
Time: 03 Hours MaximumMarks: 100
Instructions to candidates:
1. Each unit consists of two questions of 20 marks each.
2. Answer FIVE full questions selecting one from each unit.

UNIT-1

1 a Write a block diagram of a typical embedded system used in biomedical


applications. Explain different functional units. 08
b Design FSM for HONEY BEE COUNTER with following specifications. The
bees are assumed to enter the bee hive in rectangular box through a small
hole. Another hole is made for the bees to exit. Assume suitable sensors are
placed at entry and exit holes. The system is designed to display the number
of bees in hive at any time. Assume initially there are no bees in hive. Clearly
indicate the states assumed. 08
c What are distributed systems? Explain with an example. 04

OR

2 a Design sequential program model for the elevator controller as described.


Move the elevator either up or down to reach the requested floor. Once at the
requested floor, open the door for atleast 10 seconds, and keep it open until
the requested floor changes , ensure the door is never open while moving.
Don’t change directions unless there are no higher requests when moving up
or no lower requests when moving down. 08
b The  cortex   is supported with     unit,
     and   Engine. This core can
provide up to  at  with programmed  and  
 at  with  based memory transfer.
The Analog Devices     is supported with hardware
accelerator to perform  filtering. The    core has a maximum
clock rate of . By using  (single-instruction multiple data), this
core can perform two  (multiply-accumulate) operations per clock cycle
for a peak rate of   with  based memory transfer. The
accelerator, in comparison, operates at the clock rate of  . Using its
four dedicated  units, the  accelerator achieves a peak theoretical
throughput of  .
Consider a home theatre system with HD video of  and frame size of
   . A median filtering is applied on pixels to remove noise
interfered during transmission. Assume that, filtering is being applied is
  long. Select the suitable hardware between above two mentioned
platforms. Justify. 06
c Describe different methods used to enhance the performance if CPUs. 06
UNIT-2

3 a Design a suitable scheme to interface seven segment display as shown in Fig.


3.a to     port pins.

Fig. 3.a
Write application code to realize 4-digit BCD Counter on seven segment
interface using display codes as given below.
Display Codes:
0 1 2 3 4 5 6 7 8 9
0xC0 0x0F9 0x0A4 0x0B0 0x99 0x92 0x82 0x0F8 0x80 0x90 10
b Describe the operation of watch dog timer with suitable diagram. 06
c A particular motor operates at  when its controlling input voltage is
. Assume that microcontroller with PWM whose output port can be set
high  and low  .
i) Compute the duty cycle necessary to obtain 
ii) Provide the values for pulse width and period that achieve duty cycle. 04

OR

4 a The Fig. 4.a shows memory map of     The program & data memory
is shared between memory map   . A scratch pad memory is
implemented to realize the address range  to . The remaining
memory map is realized using external memory interfacing.

Fig. 4.a Fig. 4.b


The memory read and write cycles are shown in Fig. 4.b. Design a suitable
scheme to interface   program memory and   data memory. Show
the design by clearly indicating memory map and hardware connection
diagram. 12
b Given an analog input voltage ranges from    , and a    digital
encoding, calculate the correct encoding  and then trace the successive
approximation approach to find the correct encoding. 08
UNIT-3

5 a A memory system is needed in a new design to support a small amount of


data storage outside of the processor. The design is to be based on  bit
  organized as  .
i) Provide high level block diagram for such an interface.
ii) Provide a high-level timing diagram for the interface to the SRAM
from the MPU, assuming separate address and data buses are
available. Define any control signals may be necessary.
iii) Design the interface based on timing diagram. 12
b Describe 7-bit addressing scheme of  04
c Mention the advantages of using Non Return Zero format of line coding in
CAN physical layer. 04

OR

6 a The MCU is supported with four    parallel ports Port A, Port B, Port C
and Port D. Each port is provided with three    registers for operation.
Pdir – used to set the direction (setting a bit of this register makes
corresponding port pin to become an output, clearing makes port pin as
input).
Pdata – data register to hold    data to be send on port lines.
Ppin – register to read pin status.
Design a suitable scheme to interface    keypad with schematics as shown
in Fig. 6.a to MCU. Write an application code to read key and equivalent
number value in an    variable

Fig. 6.a 14
b What is bus arbitration? Describe the method followed in CAN to resolve bus
contention with suitable diagrams. 06

UNIT-4

7 a List out the advantages of using high level languages for embedded
programming. 06
b Differentiate between native and cross compiler with suitable examples. 06
c Design an interface to connect push button and  to   . Write a
program to toggle  on button press event. 08

OR
8 a Differentiate between board support library and chip support library. 06
b What are signals and events? Describe  of    to use signals and
events in an application program. 08
c Illustrate the advantages of automatic code generators with suitable
examples. 06

UNIT-5

9 a Write a program to demonstrate the usage of mutex to synchronize the


accessing of a resource. 10
b Describe a kernel service and Kernel object. 04
c Differentiate between hard real time and soft real time services with suitable
examples. Describe how  support hard real time response. 06

OR

10 a Write a C application program using  of    real time kernel to


demonstrate multitasking and interprocess communication using mailbox. 07
b Define semaphore. With suitable diagram, explain different types of
semaphores. 07
c With suitable examples, illustrate the advantages of using  in
embedded computing devices. 06

You might also like