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Final Project - 2024

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24 views2 pages

Final Project - 2024

Uploaded by

GuoJiachun2023
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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ECE468 Advanced Analog CMOS Design Fall 2024

Final Project: SD modulator design

Design a 3rd-order SD modulator (find the coefficients) as shown in Figure 1 assuming that
ai coefficients are equal to 1 and coefficient b1 equal to a1. The figure shows a chain of
integrators with distributed feedback. The input signal maximum frequency is 20 kHz and
desired sampling frequency of 5.12 MHz. Assume that the NTF of the modulator has a
Butterworth high-pass filter response. Also, make sure that the out-of-band gain of the NTF
is not larger than 1.4 (in linear scale). Use MATLAB “butter” function* for the filter
design. You need to be careful that the filter is a realizable system**.
a) What is the oversampling ratio OSR?
b) Plot NTF and STF of the modulator for the entire frequency range (up to fs/2). Also,
provide their detailed plots for the modulator’s passband (0 to 20kHz).
c) Use the SIMULINK model of the SD modulator shown in Figure 1 to simulate the
output of the modulator assuming an input sine-waveform with 0.1V amplitude and
fin = 1kHz. Assume that a 1-bit quantizer is used with ±1 output levels. Plot the
spectrum of the output signal (use log scale).
d) What is the maximum input signal amplitude constrained with the modulators
stability (i.e. maximum input signal for which the modulator is still stable)?
e) What is the maximum SNR of the modulator? (Use NTF formula to calculate the
in-band noise power - do not use SIMULINK)..
f) Which coefficient of the modulator (a1, a2, a3) would cause the highest SNR loss
assuming the maximum coefficient mismatch of 1%? (Use NTF formula to
calculate the in-band noise power- do not use SIMULINK).
g) Perform a dynamic range scaling of all modulators coefficients (including b1, ai ,
aj) such that the peak value at the output of each integrator is as close to +/- 1 as
possible when the sinusoidal input signal is applied. Assume that the input signal
has the frequency of p/512 rad/sample and amplitude that corresponds to the
highest input signal amplitude obtained in part d).
h) Draw the switched-capacitor implementation of the modulator design that includes
scaled coefficients obtained in part g). Also, assume that the integrators’ feedback
capacitors are equal to 1pF.
* Iterate wn argument of the “butter” function until the desired out-of-band gain is reached.
** Each time you use “butter” function to find the filter coefficients make sure that you
scale the obtained coefficients such that the leading coefficients – those that multiply zn of
both the numerator and denominator - are equal 1. This will guarantee that the filter has
the first value of the filter’s impulse response ( h[0] ) equal to 1, which in turn guarantees
that the filter is realizable.
Comparator
b1 1 𝛼" 1 𝛼# 𝑧 !" y[n]
u[n] + + + +
- 1 − 𝑧 !" - 1 − 𝑧 !" - 1 − 𝑧 !"

d
s
-
a1 a2 a3 f1

Figure 1: Chain of integrators with distributed feedback

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