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Module 2

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Module 2

Uploaded by

sandeep07uma
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© © All Rights Reserved
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Module 2: CENTRAL PROCESSING UNIT

Arithmetic logic unit, Integer multiplication- Booth’s algorithm; Floating point representation
principles, Machine instruction characteristics, Addressing modes, Instruction formats –
Instruction length, Allocation of bits; Processor organization, Register organization – User
visible registers, Control and status registers; Instruction cycle.

2.1 Arithmetic logic unit:

 The ALU is the part of the computer that actually performs arithmetic
and logical operations on data.
 All of the other elements of the computer system— control unit, registers, memory, I/O—
are there mainly to bring data into the ALU for it to process and then to take the results back
out.

Figure: ALU Inputs and Outputs

 In the above figure, operands for arithmetic and logic operations are presented to the
ALU in registers, and the results of an operation are stored in registers.

2.2 INTEGER REPRESENTATION

• In the binary number system, arbitrary numbers can be represented with just the digits
zero and one, the minus sign (for negative numbers), and the period, or radix point (for
numbers with a fractional component).

-1101.01012 = -13.312510

• An 8-bit word can represent the numbers from 0 to

255, such as

00000000 = 0

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00000001 = 1

00101001 = 41

10000000 = 128

11111111 = 255

• Sign-Magnitude Representation- If the sign bit is 0, the number is positive; if the


sign bit is 1, the number is negative.
• The simplest form of representation that employs a sign bit is the sign-magnitude
representation. In an n-bit word, the rightmost n - 1 bits hold the magnitude of the integer.

+18 = 00010010

-18 = 10010010 (sign magnitude)

• There are several drawbacks to sign-magnitude representation.


• One is that addition and subtraction require a consideration of both the signs of the
numbers and their relative magnitudes to carry out the required operation.
• Another drawback is that there are two representations of 0:

+ 010 = 00000000

- 010 = 10000000 (sign magnitude)

Twos Complement Representation

Steps:

1. Take the Boolean complement of each bit of the integer (including the sign bit). That
is, set each 1 to 0 and each 0 to 1.
2. Treating the result as an unsigned binary integer, add 1.

INTEGER ARITHMETIC:

Addition and Subtraction:

• If the result of the operation is positive, we get a positive number in twos complement
form, which is the same as in unsigned-integer form. If the result of the operation is
negative, we get a negative number in twos complement form
• On any addition, the result may be larger than can be held in the word size being used.
This condition is called overflow. When overflow occurs, the ALU must signal this fact so that
no attempt is made to use the result.

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e, f are overflow

SUBTRACTION RULE: To subtract one number (subtrahend) from another (minuend), take
the twos complement (negation) of the subtrahend and add it to the minuend

Figure: Subtraction of Numbers in Twos Complement Representation

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Figure: Hardware implementation

2.3 Integer multiplication:

• Compared with addition and subtraction, multiplication is a complex operation,

whether performed in hardware or software.

Unsigned integer

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Observation during multiplication:

1. Multiplication involves the generation of partial products, one for each digit in the
multiplier. These partial products are then summed to produce the final product.
2. The partial products are easily defined. When the multiplier bit is 0, the partial product is
0. When the multiplier is 1, the partial product is the multiplicand.
3. The total product is produced by summing the partial products. For this operation, each
successive partial product is shifted one position to the left relative to the preceding partial
product.
4. The multiplication of two n-bit binary integers results in a product of up to 2n bits in
length

Figure: Block diagram Hardware Implementation of Unsigned Binary Multiplication

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Figure: Flowchart for Unsigned Binary Multiplication

2.4 Floating point representation

Principles:

• The floating-point representation can implement operations for high range values. The
numerical evaluations are carried out using floating-point values.
• The floating-point representation breaks the number into two parts, the left-hand side is
a signed, fixed-point number known as a mantissa and the right-hand side of the number is
known as the exponent.
• For decimal numbers, we get around this limitation by using scientific notation. Thus,
976,000,000,000,000 can be represented as 9.76 * 1014 , and 0.0000000000000976 can be
represented as 9.76 * 10-14
• This same approach can be taken with binary numbers. We can represent a number in the
form

±M * B ± E

This number can be stored in a binary word with three fields:

• Sign: plus or minus


• Significand S or Mantissa M
• Exponent E

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Figure: Typical 32-Bit Floating-Point Format

2.5 Machine instruction characteristics:

• The operation of the processor is determined by the instructions it executes, referred to


as machine instructions or computer instructions. The collection of different
instructions that the processor can execute is referred to as the processor’s instruction
set.

Elements of a Machine Instruction

• Each instruction must contain the information required by the processor for execution.

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Instruction Representation

Figure: A Simple Instruction Format

• Within the computer, each instruction is represented by a sequence of bits. The


instruction is divided into fields, corresponding to the constituent elements of the
instruction.
• During instruction execution, an instruction is read into an instruction register (IR) in the
processor. The processor must be able to extract the data from the various instruction fields
to perform the required operation.
• Opcodes are represented by abbreviations, called mnemonics, that indicate the
operation. Common examples include
• ADD-Add
• SUB- Subtract
• MUL- Multiply
• DIV- Divide
• LOAD-Load data from memory
• STOR- Store data to memory
• Operands are also represented symbolically. For example, the instruction

ADD R, Y

may mean add the value contained in data location Y to the contents of register R. In this
example, Y refers to the address of a location in memory, and R refers to a particular
register.

Instruction Types

• Consider a high-level language instruction that could be expressed in a language such as


BASIC or FORTRAN.

For example, X = X + Y

• This statement instructs the computer to add the value stored in Y to the value stored in X
and put the result in X. How might this be accomplished with machine instructions? Let us
assume that the variables X and Y correspond to locations 513 and 514. If we assume a
simple set of machine instructions, this operation could be accomplished with three
instructions:

1. Load a register with the contents of memory location 513.

2. Add the contents of memory location 514 to the register.

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3. Store the contents of the register in memory location 513

We can categorize instruction types as follows:

• Data processing: Arithmetic and logic instructions.

• Data storage: Movement of data into or out of register and or memory locations.

• Data movement: I/O instructions.

• Control: Test and branch instructions.

• Arithmetic instructions provide computational capabilities for processing numeric data.

• Logic (Boolean) instructions operate on the bits of a word as bits rather than as numbers;
thus, they provide capabilities for processing any other type of data the user may wish to
employ. These operations are performed primarily on data in processor registers.

• Memory instructions for moving data between memory and the registers.

• I/O instructions are needed to transfer programs and data into memory and the results
of computations back out to the user.

• Test instructions are used to test the value of a data word or the status of a computation.

• Branch instructions are then used to branch to a different set of instructions depending
on the decision made.

Number of Addresses

• Arithmetic and logic instructions will require the most operands.

• Virtually all arithmetic and logic operations are either unary (one source operand) or
binary (two source operands).

• Thus, we would need a maximum of two addresses to reference source operands.

• The result of an operation must be stored, suggesting a third address, which defines a
destination operand.

• Finally, after completion of an instruction, the next instruction must be fetched, and its
address is needed.

• In most architectures, many instructions have one, two, or three operand addresses,
with the address of the next instruction being implicit (obtained from the program counter).

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2.6 Addressing modes:

• The address field or fields in a typical instruction format are relatively small.
• We would like to be able to reference a large range of locations in main
memory or, for some systems, virtual memory.
• To achieve this objective, a variety of addressing techniques has been employed.
• They all involve some trade-off between address range and/or addressing flexibility, on
the one hand, and the number of memory references in the instruction and/or the
complexity of address calculation, on the other.

Addressing techniques:

The most common addressing techniques, or modes :

• Immediate
• Direct
• Indirect
• Register
• Register indirect
• Displacement
• Stack

A = contents of an address field in the instruction

• R = contents of an address field in the instruction that refers to a register


• EA = actual (effective) address of the location containing the referenced operand

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• (X) = contents of memory location X or register X
• One or more bits in the instruction format can be used as a mode field. The value of the
mode field determines which addressing mode is to be used.
• The effective address will be either a main memory address or a register. In a virtual
memory system, the effective address is a virtual address or a register.

Immediate Addressing:

• The simplest form of addressing is immediate addressing, in which the operand value is
present in the instruction:

Operand = A

• This mode can be used to define and use constants or set initial values of variables.

Examples-

 ADD 10 will increment the value stored in the accumulator by 10.

• MOV R #20 initializes register R to a constant value 20.

• The advantage of immediate addressing is that no memory reference other than the
instruction fetch is required to obtain the operand, thus saving one memory or cache cycle
in the instruction cycle.
• The disadvantage is that the size of the number is restricted to the size of the address
field, which, in most instruction sets, is small compared with the word length.

Direct Addressing:

• A very simple form of addressing is direct addressing, in which the address field
contains the effective address of the operand:

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EA = A

• The technique was common in earlier generations of computers, but is not common on
contemporary architectures. It requires only one memory reference and no special
calculation. The obvious limitation is that it provides only a limited address space.

• It is also called as absolute addressing mode.

Example-

• ADD X will increment the value stored in the accumulator by the value stored at
memory location X.
• AC ← AC + [X]

Indirect Addressing:

 With direct addressing, the length of the address field is usually less than the word
length, thus limiting the address range. One solution is to have the address field
refer to the address of a word in memory, which in turn contains a full- length address
of the operand. This is known as indirect addressing:

EA = (A)

 The parentheses are to be interpreted as meaning contents of.

Example-

 ADD X will increment the value stored in the accumulator by the value stored at memory
location specified by X.

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AC ← AC + [[X]]

 Advantage of this approach is that for a word length of N, an address space of 2N is now
available. The disadvantage is that instruction execution requires two memory
references to fetch the operand: one to get its address and a second to get its value.

Register Addressing:

 Register addressing is similar to direct addressing. The only difference is that the
address field refers to a register rather than a main memory address:

EA = R

 To clarify, if the contents of a register address field in an instruction is 5, then register R 5


is the intended address, and the operand value is contained in R5

Example-

ADD R will increment the value stored in the accumulator by the content of register R.

AC ← AC + [R]

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 The advantages of register addressing are that only a small address field is needed
in the instruction, and no time- consuming memory references are required.
 The disadvantage of register addressing is that the address space is very limited.

Register Indirect Addressing:

 Just as register addressing is analogous to direct addressing, register indirect


addressing is analogous to indirect addressing. In both cases, the only difference is
whether the address field refers to a memory location or a register. Thus, for register
indirect address

EA = (R)

 The advantages and limitations of register indirect addressing are basically the same as
for indirect addressing. In both cases, the address space limitation (limited range of
addresses) of the address field is overcome by having that field refer to a word-length
location containing an address. In addition, register indirect addressing uses one less
memory reference than indirect addressing.

Example-

• ADD R will increment the value stored in the accumulator by the content of memory

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location specified in register R.

AC ← AC + [[R]]

Displacement Addressing:

 A very powerful mode of addressing combines the capabilities of direct addressing


and register indirect addressing. It is known by a variety of names depending on the
context of its use, but the basic mechanism is the same. We will refer to this as
displacement addressing:

EA = A + (R)

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 Displacement addressing requires that the instruction have two address fields, at least
one of which is explicit. The value contained in one address field (value = A) is used
directly. The other address field, or an implicit reference based on opcode, refers to a
register whose contents are added to A to produce the effective address.
 Three of the most common uses of displacement addressing are: Relative addressing,
Base-register addressing and Indexing

Relative Addressing Mode:

• In this addressing mode,


• Effective address of the operand is obtained by adding the content of program
counter with the address part of the instruction.

Effective Address = Content of Program Counter + Address part of the instruction

Base Register Addressing Mode:

• In this addressing mode,


• Effective address of the operand is obtained by adding the content of base
register with the address part of the instruction.

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Effective Address = Content of Base Register + Address part of the instruction

Indexed Addressing Mode:

• In this addressing mode,


• Effective address of the operand is obtained by adding the content of index
register with the address part of the instruction.

Effective Address= Content of Index Register + Address part of the instruction

Stack Addressing:

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• The final addressing mode that we consider is stack addressing.
• A stack is a linear array of locations. It is sometimes referred to as a pushdown
list or last- in-first-out queue.
• The stack is a reserved block of locations.
• Items are appended to the top of the stack so that, at any given time, the block is
partially filled.

• Associated with the stack is a pointer whose value is the address of the top of the stack.

2.7 Processor organization:

• To understand the organization of the processor, let us consider the requirements placed
on the processor, the things that it must do:
• Fetch instruction: The processor reads an instruction from memory (register, cache,
main memory).

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• Interpret instruction: The instruction is decoded to determine what action is required.
• Fetch data: The execution of an instruction may require reading data from memory or
an I/O module.
• Process data: The execution of an instruction may require performing some arithmetic
or logical operation on data.
• Write data: The results of an execution may require writing data to memory or an I/O
module.
• To do these things, it should be clear that the processor needs to store some data
temporarily. It must remember the location of the last instruction so that it can know where
to get the next instruction. It needs to store instructions and data temporarily while an
instruction is being executed.

Figure: Internal Structure of the CPU

• The major components of the processor are an arithmetic and logic unit (ALU) and a
control unit (CU).
• The ALU does the actual computation or processing of data.
• The control unit controls the movement of data and instructions into and out of the

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processor, and controls the operation of the ALU.
• In addition, the figure shows a minimal internal memory, consisting of a set of storage
locations, called registers.
• The data transfer and logic control paths are indicated, including an element labeled
internal processor bus.
• This element is needed to transfer data between the various registers and the ALU,
because the ALU in fact operates only on data in the internal processor memory.
• Note the similarity between the internal structure of the computer as a whole, and the
internal structure of the processor.
• In both cases, there is a small collection of major elements (computer: processor, I/O,
memory; processor: control unit, ALU, registers) connected by data paths.

2.8 INSTRUCTION FORMATS:

• An instruction format defines the layout of the bits of an instruction, in terms of its
constituent fields.
• An instruction format must include an opcode and, implicitly or explicitly, zero or more
operands.
• Each explicit operand is referenced using one of the addressing modes.
• The format must, implicitly or explicitly, indicate the addressing mode for each operand.

2.8.1 Instruction Length:

• The most basic design issue to be faced is the Instruction format length.
• This decision is affected by memory size, memory organization, bus structure,
processor complexity, and processor speed.
• This decision determines the richness and flexibility of the machine as seen by the
assembly-language programmer.
• The most obvious trade-off here is between the desire for a powerful instruction set
and a need to save space.
• Programmers want more opcodes, more operands, more addressing modes, and greater
address range.
• More opcodes and more operands make life easier for the programmer, because shorter
programs can be written to accomplish given tasks.
• Similarly, more addressing modes give the programmer greater flexibility in
implementing certain functions, such as table manipulations and multiple- way branching.
• With the increase in main memory size and the increasing use of virtual memory,
programmers want to be able to address larger memory ranges.
• All of these things (opcodes, operands, addressing modes, address range) require bits
and push in the direction of longer instruction lengths.
• But longer instruction length may be wasteful.

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• A 64-bit instruction occupies twice the space of a 32-bit instruction.
• Either the instruction length should be equal to the memory-transfer length (in a bus
system, databus length) or one should be a multiple of the other.
• Memory transfer rate: This rate has not kept up with increases in processor speed.
• The processor can execute instructions faster than it can fetch them, then memory
required also high.
• One solution to this problem is to use cache memory.
• Another is to use shorter instructions.
• Thus, 16-bit instructions can be fetched at twice the rate of 32-bit instructions, but
probably can be executed less than twice as rapidly.

2.8.2 Allocation of Bits:

• For a given instruction length, there is clearly a trade- off between the number of opcodes
and the power of the addressing capability. For an instruction format of a given length, this
reduces the number of bits available for addressing.
• Use variable-length opcodes to solve this issue.
• In this approach, there is a minimum opcode length but, for some opcodes, additional
operations may be specified by using additional bits in the instruction. For a fixed-length
instruction, this leaves fewer bits for addressing. Thus, this feature is used for those
instructions that require fewer operands and/or less powerful addressing.

Interrelated factors:

• Number of addressing modes


• Number of operands
• Register versus memory
• Number of register sets
• Address range
• Address granularity

2.9 REGISTER ORGANIZATION:

• Registers are the smaller and


the fastest accessible memory units in the central processing unit (CPU).
• According to memory hierarchy, the registers in the processor, function a level
above the main memory and cache memory.
• The registers used by the central unit are also called as processor
registers.
• Register organization is the arrangement of the registers in the processor.
• The processor designers decide the organization of the registers in a processor.
• A register can hold the instruction, address location, or operands.

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Sometimes, the instruction has register as a part of itself.
• Different processors may have different register organization.
• Depending on the roles played by the registers they can be categorized into two types,
user- visible register and control and status register.

Definition and purpose:

• User-visible registers: Enable the machine- or assembly language programmer to


minimize main memory references by optimizing use of registers.
• Control and status registers: Used by the control unit to control the operation of the
processor and by privileged, operating system programs to control the execution of
programs.

2.9.1 User-Visible Registers:

• A user-visible register is one that may be referenced by means of the machine language
that the processor executes.
• These registers are visible to the assembly or machine language programmers and they
use them effectively to minimize the memory references in the instructions.
• These registers can only be referenced using the machine or assembly language.

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General-purpose registers:

• The general-purpose registers detain both the addresses or the data.


• The general purpose register also accepts the intermediate results in the
course of program execution.
• The programmers can restrict some of the general-purpose registers to specific
functions.
• Like, some registers are specifically used for stack operations or for floating-point
operations.
• The general-purpose register can also be employed for the addressing functions.

Data Register:

• The term itself describes that these registers are employed to hold the data. But the
programmers can’t use these registers for calculating operand address.

Address Register:

• Now, the address registers contain the address of an operand or it can also act as a
general- purpose register.
• An address register may be dedicated to a certain addressing mode.

(a) Segment Pointer Register: A memory divided in segments, requires a segment


register to hold the base address of the segment. There can be multiple segment
registers. As one segment register can be employed to hold the base address of the
segment occupied by the operating system. The other segment register can hold the base
address of the segment allotted to the processor.
(b) Index Register: The index register is employed for indexed addressing and it is
initial value is 0. Generally, it used for traversing the memory locations. After each
reference, the index register is incremented or decremented by 1, depending upon the
nature of the operation. Sometime the index register may be auto indexed.

(c) Stack Pointer Register: The stack register has the address that points the stack top.
This allows implicit addressing; that is, push, pop, and other stack instructions need not
contain an explicit stack operand.

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Condition Code:

• Condition codes are the flag bits which are the part of the control register. The
condition codes are set by the processor as a result of an operation and they are implicitly
read through the machine instruction.
• The programmers are not allowed to alter the conditional codes. Generally, the condition
codes are tested during conditional branch operation.

Design issues:

• Use completely general- purpose registers or to specialize their use.


• With the use of specialized registers, it can generally be implicit in the opcode which type
of register a certain operand specifier refers to. The operand specifier must only identify one
of a set of specialized registers rather than one out of all the registers, thus saving bits. On
the other hand, this specialization limits the programmer’s flexibility.
• Number of registers: either general purpose or data plus address, to be provided.
Again, this affects instruction set design because more registers require more operand
specifier bits.
• Between 8 and 32 registers appears optimum.
• Register length: Registers that must hold addresses obviously must be at least long
enough to hold the largest address. Data registers should be able to hold values of most
data types.

2.9.2 Control and Status Registers:

• The control and status register holds the address or data that is
important to control the processor’s operation.
• The most important thing is that these registers are not visible to the users.
• All the control and status registers are essential for the execution of
an instruction.

Types

1. Program Counter

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• The program counter is a processor register that holds the address of the instruction
that has to be executed next. It is a processor which updates the program counter with
the address of the next instruction to be fetched for execution.

2. Instruction Register

• Instruction register has the instruction that is currently fetched. It helps in analysing
the opcode and operand present in the instruction.

3. Memory Address Register (MAR)

• Memory address register holds the address of a memory location.

4. Memory Buffer Register (MBR)

• The memory buffer register holds the data that has to be written to a memory location
or it holds the data that is recently been read.
• The memory address registers (MAR) and memory buffer registers (MBR) are used to
move the data between processor and memory.
• Apart from the above registers, several processors have a register termed as Program
Status Word (PSW). As the word suggests it contains the status information.
• The fields included in Program Status Word (PSW):

– Sign: This field has the resultant sign bit of the last arithmetic operation performed.
– Zero: This field is set when the result of the operation is zero.
– Carry: This field is set when an arithmetic operation results in a carry into or borrow out.
– Equal: If a logical operation results in, equality the Equal bit is set.
– Overflow: This bit indicates the arithmetic overflow.
– Interrupt: This bit is set to enable or disable the interrupts.
– Supervisor: This bit indicates whether the processor is executing in the supervisor mode
or the user mode.

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