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    DTE QB CT 2 (24-25)9-11-2024 (2)

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    riteshkusmade1010

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    DTE QB CT 2 (24-25)9-11-2024 (2)

    Uploaded by

    riteshkusmade1010
    1 views1 page

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    1 views1 page

    DTE QB CT 2 (24-25)9-11-2024 (2)

    Uploaded by

    riteshkusmade1010

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    of 1

    DTE Question bank

    1) Define Minterm and Maxterm w.r.t. K-map

    2) Draw symbol and write truth table of D and T Flip Flop

    3) List any two specifications of IC-DAC 0808

    4) Compare the following: (i) Volatile with Non Volatile memory

    5) Draw logic diagram of half adder circuit.

    6) State the applications of shift register.

    7) Minimize the four variable logic function using K map. f(A,B,C,D) = ∑m(0, 1, 2, 3, 5, 7, 8, 9, 11,
    14)

    8) Compare Full Adder & half adder (any four points)

    9) Describe the working of JK flip flop with truth table and logic diagram.

    10) Draw and explain working of 4 bit serial Input parallel Output shift register.

    11) Draw and explain the circuit diagram of 4 bit R-2R ladder DAC and obtain its output voltage
    expression.

    12) Compare the following: (i)EPROM with EEPROM .(any four point)

    13) Draw the circuit diagram of BCD to 7 - segment decoder and write truth table.

    14) Reduce the following expression using K-map and implement it F(A, B, C, D) = p M
    (1,3,5,7,8,10,14)

    15) Draw 4 bit ring counter with truth table and its waveform.

    16) Draw 16:1 MUX tree using 4:1 MUX.

    17) Calculate the analog output for 4 bit weighted register type

    DAC for inputs (i) 1011 (ii) 1001 Assume (Vfs) full scale range of voltage is 5V

    18) Describe the working of successive Approximation ADC.

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