1) A circuit that compares two numbers & determines their magnitude is called _______ comparator. a) Height b) Magnitude c) Size d) None of these 2) If number of devices interrupts simultaneously then _________ is used. a) Normal I/O b) interrupt data transfer c) Priority d) All above 3) To design 1024 KB RAM with 512 KB size, number of chips required are ______. a) 1 b) 2 c) 3 d) 4 4) Stack memory generally works in ____________ technique. a) FIFO b) LILO c) LIFO d) FILO 5) To design 1024 KB RAM with 256 KB size, number of chips required are______. a) 1 b) 2 c) 3 d) 4 6) Interface is a communication link between CPU and _____________. a) memory b) DMA c) peripheral d) cache 7) Data transfer between Computers to Printer is ____________ communication. a) Simplex b) Half Duplex c) Full Duplex d) None of these 8) In DMA data transfer CPU is ___________ involved. a) Partially b) Fully c) Not d) none of these 9) Efficient data transfer between CPU and IO device takes place with _______. a) Programmed IO b) DMA c) Interrupts d) All above 10) Cache memory is placed between CPU and ________. a) primary memory b) secondary memory c) peripheral device d) none of these 11) When an interrupt occurs CPU executes ________. a) main program b) sub routine c) ISR d) none of these 12) ____________ table lists inputs for required change of states. a) Truth b) Excitation c) State d) Clock 13) _____ mapping has more data’s with same index but with different tag for cache. a) Direct b) Indirect c) Set Associative d) Associative 14) Data transfer between Computers to Printer is _____________ communication. a) Simplex b) Half Duplex c) Full Duplex d) None of these 15) _________memory is placed between CPU and primary memory. a) Cache b) secondary memory c) main d) none of these 16) For Gray and Binary code conversion ______________ logic gate is preferred. a) AND b) EX-OR c) NOT d) NAND 17) Memory hierarchy is arrangement of memory based on _____________. a) Speed b) cost c) capacity d) All above 18) _________ is not outcome of Magnitude comparator. a) A > B b) A = B c) A < B d) A - B 19) For ______________ code conversion EX-OR logic gate is preferred. a) ASCII b) Gray and Binary c) EBCDIC d) Hamming 20) RAM & ROM is the member of ______________ memory. a) Primary b) Secondary c) Cache d) none of these Long Answer Questions (08 Marks) 1. What is memory hierarchy? Explain two level, three level and four level memory hierarchy scheme with the help of block diagram. 2. What do you mean by virtual memory? Discuss how paging helps in implementing virtual memory. 3. Define Asynchronous data transfer. Explain strobe and handshaking methods for asynchronous data transfer. 4. State need of priority interrupts. Explain parallel priority interrupt method 5. What do you mean by virtual memory? Discuss how segmentation helps in implementing virtual memory Short Answer Questions (4 Marks)
1. Explain Daisy chain method for interrupt priority.
2. Using logic gates design the circuit of Binary to Grey converter
3. Explain the concept of Digital Comparator.
4. Explain UART with general block diagram.
5. Explain the concept of 1-bit magnitude Comparator.
6. Using logic gates design the circuit of Gray to Binary converter
7. Write a note on USB storage device.
8. With block diagram explain DMA controller.
9. Explain any five characteristics of memory system.