1

Experiment No : 01

Name of the Experiment : Design the circuit of AND, OR, NOT gates and
analyze the operation of the gates

OBJECTIVE:

To familiarize with logic gates in digital systems

APPARATUS:

1. AND Gate ( IC-7408)

2. OR Gate (IC-7432)
3. Not Gate (IC-7404)

Circuit Diagram :

AND Gate OR Gate NOT Gate

IC Circuit Diagram :

AND (IC-7408)
 2

OR (IC-7432)

NOT (IC-7404)

OBSERVATION TABLE:

1. AND Gate

Inputs Output

A B Y=A.B

0 0 0

0 1 0

0 1 0

1 1 1
 3

2. OR Gate

Inputs Output

A B Y=A+B

0 0 0

0 1 1

0 1 1

1 1 1

3. Not Gate

Inputs Output

A Y= 𝐴

0 1

1 0

BACKGROUND THEORY:

Logic gates are based on Boolean algebra. At any given moment, every terminal is in one of the
two binary conditions, false or true. False represents 0, and true represents 1. Depending on the
type of logic gate being used and the combination of inputs, the binary output will differ. A logic
gate can be thought of like a light switch, wherein one position the output is off -- 0, and in
another, it is on -- 1. Logic gates are commonly used in integrated circuits (IC).
 4

Procedure :

AND Gate Implementation:

1. Place the 7408 AND gate IC on the breadboard.

2. Connect power (+Vcc and GND) to the IC.
3. Connect the inputs A and B to different pins of the IC.
4. Connect the output pin to an LED and a current-limiting resistor.
5. Provide power to the circuit.
6. Verify the truth table for the AND gate by applying different combinations of input
voltages and observing the LED output.

OR Gate Implementation:

1. Place the 7432 OR gate IC on the breadboard.

2. Connect power and ground to the IC.
3. Connect the inputs A and B to different pins.
4. Connect the output pin to an LED and a resistor.
5. Power up the circuit.
6. Confirm the OR gate's behavior using various input combinations and observing the
LED

NOT Gate Implementation:

1. Place the 7404 NOT gate IC on the breadboard.

2. Connect power and ground.
3. Connect the input to a pin.
4. Connect the output pin to an LED and a resistor.
5. Apply power.
6. Validate the NOT gate's functionality by checking the LED response to different
input levels.

Conclusion :

In conclusion, this lab experiment provided hands-on experience in implementing basic

logic gates using logic gate ICs. We successfully constructed AND, OR, and NOT gates
and verified their logical behaviors. Understanding these gates' principles and
applications is foundational to digital circuit design and lays the groundwork for more
complex logical operations.
 5

Experiment No : 02

Name of the Experiment : Design the circuit of the flowing Boolean

Function using logic gates. 𝑌 = 𝐴𝐵+( 𝐶 + 𝐴𝐶 )+C

OBJECTIVE:

Design a circuit diagram according to the boolean function using digital logic gate
APPARATUS:

1. AND Gate ( IC-7408)

2. OR Gate (IC-7432)
3. NOR Gate (IC-7402)
4. NAND Gate(IC-7400)

Circuit Diagram :
 6

OBSERVATION TABLE:

Input Output

A B C
F= 𝐴𝐵+( 𝐶 + 𝐴𝐶 )+C
0 0 0 1

0 0 1 1

0 1 0 1

0 1 1 1

1 0 0 1

1 0 1 1

1 1 0 0

1 1 1 1

BACKGROUND THEORY:

A Boolean function is a logical expression that returns a Boolean value, which is a value that is
either TRUE or FALSE. In digital electronic circuits, the logic gates are used to implement a
conditional or logical or Boolean expressions. A logic gate is a digital circuit that performs a
specific logical operation on one or more input variables or signals and generates an output
signal. The output of a logic gate is determined by its logical function, which is based on
Boolean algebra. In digital electronics, there are several types of logic gates available such as
AND gate, OR gate, NOT gate, NAND gate, NOR gate, XOR gate, XNOR gate, etc. we may use
these logic gates to implement different types of Boolean functions. Before going into the
implementation of a Boolean function using logic gates, let's have a look into the basic
introduction of different logic gates first
 7

Procedure :

Boolean Function Definition:

1. Clearly define the Boolean function using standard Boolean algebra notation. For
example, consider a Boolean function F(A, B, C) = 𝐴𝐵+( 𝐶 + 𝐴𝐶 )+C

Gate Selection:

1. Determine the appropriate combination of basic logic gates (NAND, NOR, AND,
OR, NOT) to implement the given Boolean function. You can simplify the Boolean
expression using Boolean algebra laws to minimize the number of gates required.

Circuit Design:

1. Based on my gate selection, place the required logic gate ICs on the breadboard.
2. Connect power supply's +5V and GND to the appropriate rails on the breadboard.
3. Connect input variables (A, B, C, etc.) to the input pins of the logic gate ICs.
4. Connect the output of each logic gate to the appropriate point in the circuit.

Conclusion :

Summarize the results of my experiment, discussing the successful implementation of

the given Boolean function using logic gates. Reflect on the importance of digital logic
circuits in translating abstract Boolean expressions into practical applications.
 8

Experiment No : 03

Name of the Experiment : Design the circuit of three basic gates by using
universal NAND gate and analyze the operation of three basic gates.

OBJECTIVE:

To study NAND & NOR gate and prover them as universal gate

APPARATUS:

1. NAND Gate ( IC-7400)

Circuit Diagram :

NAND Gate

AND , OR , NOT Gate using NAND Gate

 9

IC Circuit Diagram :

NAND ( IC-7400)

OBSERVATION TABLE:

1. NAND Gate

AND OR NOT

A B A.B A B A+B A 𝐴

0 0 0 0 0 0 0 1

0 1 0 0 1 1 1 0

1 0 0 1 0 1 - -

1 1 1 1 1 1 - -

BACKGROUND THEORY:

Universal Gates may implement any Boolean function without using any other gate type. The
NAND gate and NOR gate are called Universal gates because they can perform all the three
essential functions of AND, OR and NOT gates. A two-input NAND gate is a digital combination
logic circuit that performs the logical inverse of an AND gate. While an AND gate outputs a
logical "1" only if both inputs are logical "1," a NAND gate outputs a logical "0" for this same
combination of inputs.
 10

Procedure :

Implementing AND Gate Using NAND Gates:

1. Connect one of the NAND gate's inputs (A or B) to GND (0V) to represent one input
of the AND gate.
2. Connect the other input of the NAND gate to the desired input signal for the AND
gate.
3. Connect the output of this NAND gate to an LED, just like in the NAND gate
implementation step. The LED will represent the output of the AND gate.
4. Observe the LED's behavior as you change the input signal. The LED should light
up only when the input signal is HIGH (connected to +5V).

Implementing OR Gate Using NAND Gates:

1. Connect both inputs of a NAND gate to the desired input signals for the OR gate
2. Connect the output of this NAND gate to another NAND gate's inputs. This forms an
inverted OR gate.
3. Connect the output of the second NAND gate to an LED. The LED will represent the
output of the OR gate.
4. Observe the LED's behavior as you change the input signals. The LED should light
up when either or both input signals are HIGH

Implementing NOT Gate Using NAND Gates:

1. Connect both inputs of a NAND gate together.

2. Connect the output of this NAND gate to an LED. The LED will represent the output
of the NOT gate.
3. Observe the LED's behavior as you change the input signal. The LED should light
up when the input signal is LOW (connected to GND), and turn off when the input is
HIGH.

Conclusion :

Summarize the results of my experiments, demonstrating that a NAND gate can be used
to implement AND, OR, and NOT logic gates effectively.
 11

Experiment No : 04

Name of the Experiment : Design the circuit of three basic gates by using
universal NOR gate and analyze the operation of three basic gates

OBJECTIVE:

To study NAND & NOR gate and prover them as universal gate

APPARATUS:

1. NOR Gate ( IC-7402)

Circuit Diagram :

NOR Gate

AND , OR , NOT Gate using NOR Gate

 12

IC Circuit Diagram :

NOR (IC-7402)

OBSERVATION TABLE:

1. NOR Gate

AND OR NOT

A B A.B A B A+B A 𝐴

0 0 0 0 0 0 0 1

0 1 0 0 1 1 1 0

1 0 0 1 0 1 - -

1 1 1 1 1 1 - -

BACKGROUND THEORY:

Universal Gates may implement any Boolean function without using any other gate type. The
NOR gate are called Universal gates because they can perform all the three essential functions
of AND, OR and NOT gates. A two-input NOR gate is a digital combination logic circuit that
performs the logical inverse of an OR gate. While an OR gate outputs a logical "1" only if both
inputs are logical "0," a NOR gate outputs a logical "1" for this same combination of inputs
 13

Procedure :

Implementing AND Gate Using NOR Gates:

1. Connect one of the NOR gate's inputs (A or B) to +5V to represent one input of the
AND gate.
2. Connect the other input of the NOR gate to the desired input signal for the AND
gate.
3. Connect the output of this NOR gate to an LED, just like in the NOR gate
implementation step. The LED will represent the output of the AND gate.
4. Observe the LED's behavior as you change the input signal. The LED should light
up only when the input signal is HIGH (connected to GND).

Implementing OR Gate Using NOR Gates:

1. Connect both inputs of a NOR gate to the desired input signals for the OR gate.
2. Connect the output of this NOR gate to another NOR gate's inputs. This forms an
inverted OR gate.
3. Connect the output of the second NOR gate to an LED. The LED will represent the
output of the OR gate.
4. Observe the LED's behavior as you change the input signals. The LED should light
up when either or both input signals are HIGH.

Implementing NOT Gate Using NOR Gates:

1. Connect both inputs of a NOR gate together.

2. Connect the output of this NOR gate to an LED. The LED will represent the output
of the NOT gate.
3. Observe the LED's behavior as you change the input signal. The LED should light
up when the input signal is LOW (connected to GND), and turn off when the input is
HIGH.

Conclusion :

Summarize the results of my experiments, demonstrating that a NOR gate can be used
to implement AND, OR, and NOT logic gates effectively.
 14

Experiment No : 05

Name of the Experiment :Design the circuit of Half Adder and analyze its
operation

OBJECTIVE:

To study half adder circuit

APPARATUS:

1. XOR Gate ( IC-7486)

2. AND Gate (IC-7408)

Circuit Diagram :

Half Adder

IC Circuit Diagram :

XOR (IC-7486)
 15

AND (IC-7408)

OBSERVATION TABLE:

1. Half Adder

A B Sum=A𝐵+𝐴B Carry=A.B

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

BACKGROUND THEORY:

A half adder is a basic digital circuit that performs addition of two binary digits – the operands –
and provides both the sum and carry outputs. It is the simplest form of an adder.

Functionality:

A half adder takes two binary inputs: A and B (operands). It produces two outputs: Sum (S) and
Carry (C).

The sum output (S) is the result of adding A and B. If the sum exceeds one binary digit (1), the
carry output (C) indicates that a carry needs to be propagated to the next higher-order bit.
 16

Procedure :

Half Adder Circuit Implementation:

1. Connect the power supply's +5V and GND to the appropriate rails on the
breadboard.
2. Place the required logic gate ICs (usually XOR and AND gates) on the breadboard.
3. Connect two input variables, A and B, to the XOR gate inputs.
4. Connect the same two input variables, A and B, to the AND gate inputs.
5. Connect the output of the XOR gate (S) to an LED and a current-limiting resistor.
6. Connect the output of the AND gate (C) to another LED and a current-limiting
resistor.
7. Apply various combinations of input values (0 or 1) to A and B and observe the
outputs on the LEDs. Compare the results with the expected half adder truth table.

Conclusion :

Summarize the results of my experiments, demonstrating the successful implementation

of both the Half Adder circuits. Discuss the importance of these circuits in binary
arithmetic and digital logic applications.
 17

Experiment No : 06

Name of the Experiment :Design the circuit of Full Adder and analyze its
operation

OBJECTIVE:

To study full adder circuit

APPARATUS:

3. XOR Gate ( IC-7486)

4. AND Gate (IC-7408)

Circuit Diagram :

IC Circuit Diagram :

XOR (IC-7486)
 18

AND (IC-7408)

OBSERVATION TABLE:

A B C Sum Carry

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

BACKGROUND THEORY:

A full adder is a fundamental digital circuit that performs addition of three binary digits – two
inputs and a carry-in from a previous addition operation. It provides both the sum and carry-out
for the next adder stage.

Functionality:

A full adder takes three binary inputs: A, B (operands), and Cin (carry-in). It produces two
outputs: Sum (S) and Cout (carry-out).
 19

The sum output (S) is the result of adding A, B, and the carry-in (Cin). If the sum exceeds one
binary digit (1), it generates a carry-out (Cout) that needs to be added to the next higher-order
bit.

Procedure :

1. Connect the power supply's +5V and GND to the appropriate rails on the
breadboard.
2. Place the required logic gate ICs (usually XOR, AND, and OR gates) on the
breadboard.
3. Connect three input variables, A, B, and Cin (carry-in), to the XOR gates.
4. Connect the same three input variables, A, B, and Cin, to the AND gates.
5. Connect the outputs of the XOR gates to the inputs of the OR gate.
6. Connect the output of the AND gate (Sum) to an LED and a current-limiting resistor.
7. Connect the output of the OR gate (Cout) to another LED and a current-limiting
resistor.
8. Apply various combinations of input values (0 or 1) to A, B, and Cin and observe the
outputs on the LEDs. Compare the results with the expected full adder truth table.

Conclusion :

Summarize the results of my experiments, demonstrating the successful implementation

of both the Half Adder circuits. Discuss the importance of these circuits in binary
arithmetic and digital logic applications.
 20

Experiment No : 07

Name of the Experiment : Design the circuit of Half Subtractor and analyze
its operation.

OBJECTIVE:

To study half subtractor subtractor

APPARATUS:

1. XOR Gate ( IC-7486)

2. AND Gate (IC-7408)
3. Not Gate (IC-7404)

Circuit Diagram :

IC Circuit Diagram :

XOR (IC-7486)
 21

AND (IC-7408)

NOT (IC-7404)

OBSERVATION TABLE:

A B Difference Borrow

0 0 0 0

0 1 1 1

1 0 1 0

1 1 0 0

BACKGROUND THEORY:

A half subtractor is a basic combinational digital circuit that performs subtraction of two binary
digits – the minuend and subtrahend – and provides the difference and borrow outputs. It is the
simplest form of a subtractor.

Functionality:

A half subtractor takes two binary inputs: A (minuend) and B (subtrahend). It produces two
outputs: D (difference) and Bout (borrow).
 22

The difference output (D) is the result of subtracting B from A. If A < B, it indicates that a borrow
is required. The borrow output (Bout) indicates if a borrow is needed for the next stage of
subtraction.

Procedure :

1. Connect the power supply's +5V and GND to the appropriate rails on the
breadboard.
2. Place the required logic gate ICs (usually XOR, AND, NOT gates) on the
breadboard.
3. Connect the input variables A and B to the XOR gate inputs.
4. Connect the NOT gate input to input B.
5. Connect the output of the XOR gate (Difference) to an LED and a current-limiting
resistor.
6. Connect the output of the AND gate (Borrow) to another LED and a current-limiting
resistor.
7. Apply various combinations of input values (0 or 1) to A and B and observe the
outputs on the LEDs. Compare the results with the expected half subtractor truth
table.

Conclusion :

Summarize the results of my experiments, demonstrating the successful implementation

of the Half Subtractor circuits. Discuss the importance of these circuits in binary
subtraction and digital logic applications.
 23

Experiment No : 08

Name of the Experiment : Design the circuit of Full Subtractor and analyze
its operation

OBJECTIVE:

To study full adder subtractor

APPARATUS:

4. XOR Gate ( IC-7486)

5. AND Gate (IC-7408)
6. OR Gate (IC-7432)
7. Not Gate (IC-7404)

Circuit Diagram :

IC Circuit Diagram :

XOR (IC-7486)
 24

AND (IC-7408)

OR (IC-7432)

NOT (IC-7404)

OBSERVATION TABLE:

A B C Difference Borrow

0 0 0 0 0

0 0 1 1 1

0 1 0 1 1

0 1 1 0 1

1 0 0 1 0

1 0 1 0 0

1 1 0 0 0

1 1 1 1 1
 25

BACKGROUND THEORY:

A full subtractor is a combinational digital circuit that performs subtraction of three binary digits –
the minuend, subtrahend, and a borrow-in bit from a previous subtraction operation. It provides
the difference and a borrow-out bit for the next subtractor stage.

Functionality:

A full subtractor takes three binary inputs: A (minuend), B (subtrahend), and Bin (borrow-in). It
produces two outputs: D (difference) and Bout (borrow-out).

The difference output (D) is the result of subtracting B and the borrow-in from A. If A < B, the
borrow-in indicates that a borrow is required from the previous stage. The borrow-out (Bout)
indicates if a borrow is required for the next stage.

Procedure :

Full Subtractor Circuit Implementation:

1. Connect the power supply's +5V and GND to the appropriate rails on the
breadboard.
2. Place the required logic gate ICs (usually XOR, AND, OR, and NOT gates) on the
breadboard.
3. Connect the input variables A, B, and Bin (borrow-in) to the XOR gates.
4. Connect the NOT gate input to input B.
5. Connect the outputs of the XOR gates to the inputs of the OR gate.
6. Connect the output of the AND gate (Difference) to an LED and a current-limiting
resistor.
7. Connect the output of the OR gate (Borrow) to another LED and a current-limiting
resistor.
8. Apply various combinations of input values (0 or 1) to A, B, and Bin and observe the
outputs on the LEDs. Compare the results with the expected full subtractor truth
table.

Conclusion :

Summarize the results of my experiments, demonstrating the successful implementation

of the Full Subtractor circuits. Discuss the importance of these circuits in binary
subtraction and digital logic applications.
 26

Experiment No : 09

Name of the Experiment :Design the circuit of Encoder and analyze its
operation

OBJECTIVE:

To study Encoder
APPARATUS:

1. OR Gate (IC-7432)

Circuit Diagram :

A2=Y4+Y5+Y6+Y7
A1=Y2+Y3+Y6+Y7
A0=Y7+Y5+Y3+Y1
 27

OBSERVATION TABLE:

BACKGROUND THEORY:

An encoder is a digital logic circuit that takes multiple inputs and produces a binary code that
uniquely represents the active input line. It is commonly used to compress multiple inputs into a
smaller set of outputs, allowing for efficient transmission and processing of information.

Procedure :

1. Connect the power supply's +5V and GND to the appropriate rails on the
breadboard.
2. Place the required logic gate ICs (usually AND, OR, NOT gates) on the breadboard.
3. Connect the input variables (A, B, etc.) to switches that represent the binary inputs.
4. Connect the outputs of the switches directly to the AND gates' inputs.
5. Connect the AND gates' outputs to the inputs of an OR gate.
6. Connect the output of the OR gate to an LED and a current-limiting resistor.
7. Set the input switches to different binary combinations and observe which input's
LED lights up. Compare the results with the expected encoding operation.

Conclusion :

Summarize the results of my experiments, demonstrating the successful implementation of both

the Encoder circuits. Discuss the applications of Encoder circuits in data conversion
 28

Experiment No : 10

Name of the Experiment :Design the circuit of Decoder and analyze its
operation

OBJECTIVE:

To study Decoder
APPARATUS:

1. AND Gate (IC-7408)

2. Not Gate (IC-7404)

Circuit Diagram :

Y0=A0'.A1'.A2'
Y1=A0.A1'.A2'
Y2=A0'.A1.A2'
Y3=A0.A1.A2'
Y4=A0'.A1'.A2
Y5=A0.A1'.A2
Y6=A0'.A1.A2
Y7=A0.A1.A2
 29

OBSERVATION TABLE:

BACKGROUND THEORY:

A decoder is a digital logic circuit that takes an encoded input and activates one of several
output lines based on the encoded value.
A decoder typically has multiple input lines (encoded inputs) and multiple output lines (decoded
outputs). The number of output lines is determined by the number of possible input
combinations, which is often a power of 2.

Procedure :

1. Connect the power supply's +5V and GND to the appropriate rails on the
breadboard.
2. Place the required logic gate ICs (usually NAND, NOT gates) on the breadboard.
3. Connect the input variable (A, B, etc.) to switches that represent the binary inputs.
4. Connect the NOT gates to the switches' outputs, creating the inverted inputs.
5. Connect the outputs of the NOT gates to the inputs of the NAND gates.
6. Connect the outputs of the NAND gates to LEDs and current-limiting resistors. Each
LED represents a possible binary combination.
7. Set the input switches to different binary combinations and observe which LED
lights up. Compare the results with the expected decoding operation

Conclusion :

Summarize the results of my experiments, demonstrating the successful implementation of both

the Decoder circuits. Discuss the applications of Decoder circuits in address decoding.
 30

Experiment No : 11

Name of the Experiment : Design the circuit of Multiplexer and analyze its
operation

OBJECTIVE:

To study Multiplexer
APPARATUS:

1. AND Gate (IC-7408)

2. OR Gate (IC-7432)
3. Not Gate (IC-7404)

Circuit Diagram :
 31

OBSERVATION TABLE:

BACKGROUND THEORY:

A multiplexer, commonly known as a MUX, is a digital logic circuit that selects one of many input
lines and forwards its data to a single output line based on a set of control inputs. It is used to
combine multiple data sources into a single output line.A multiplexer has multiple data inputs
(D0, D1, ..., Dn), a set of selection control inputs (S0, S1, ..., Sm), and a single output line (Y).
The control inputs determine which input line's data is transmitted to the output.Depending on
the number of selection control lines (m), a multiplexer can select from 2^m data inputs. The
data input corresponding to the binary value of the control inputs is forwarded to the output.

Procedure :
1. Connect the power supply's +5V and GND to the appropriate rails on the
breadboard.
2. Place the required logic gate ICs (usually AND, OR, NOT gates) on the breadboard.
3. Connect the control inputs (S0, S1, etc.) to switches that you'll use to select the
input.
4. Connect the input variables (D0, D1, etc.) to the AND gates' inputs, and connect the
corresponding control inputs to the other input of the AND gates.
5. Connect the outputs of the AND gates to the inputs of an OR gate.
6. Connect the output of the OR gate to an LED and a current-limiting resistor.
7. Set the control inputs to different combinations using the switches and observe
which input's LED lights up. Compare the results with the expected MUX operation.

Conclusion :
Summarize the results of my experiments, demonstrating the successful implementation
of both the Multiplexer circuits. Discuss the applications of MUX circuits in data routing
and selection.
 32

Experiment No : 12

Name of the Experiment : Design the circuit of Demultiplexer and analyze

its operation

OBJECTIVE:

To study Demultiplexer
APPARATUS:

4. AND Gate (IC-7408)

5. OR Gate (IC-7432)
6. Not Gate (IC-7404)

Circuit Diagram :
 33

OBSERVATION TABLE:

BACKGROUND THEORY:

A demultiplexer, often abbreviated as DEMUX, is a digital logic circuit that takes a single input
and directs it to one of several output lines based on a set of control inputs.A demultiplexer has
one data input line (D), several selection control inputs (S0, S1, ..., Sn), and multiple output lines
(Y0, Y1, ..., Yn). The number of control inputs corresponds to the number of output lines,
allowing the selection of one output line based on the control inputs' binary value.

Procedure :
1. Connect the power supply's +5V and GND to the appropriate rails on the
breadboard.
2. Place the required logic gate ICs (usually AND, OR, NOT gates) on the breadboard.
3. Connect the control inputs (S0, S1, etc.) to switches that you'll use to select the
output.
4. Connect the output variable (Y) to the OR gate's input, and connect each control
input (S0, S1, etc.) to the other input of the OR gate through a NOT gate.
5. Connect the output of the OR gate to an LED and a current-limiting resistor.
6. Set the control inputs to different combinations using the switches and observe
which output's LED lights up. Compare the results with the expected DEMUX
operation.

Conclusion :
Summarize the results of my experiments, demonstrating the successful implementation
of both the Demultiplexer circuits. Discuss the applications of DEMUX circuits in data
routing and selection.
 34

Experiment No : 13

Name of the Experiment : Design the circuit of S-R flip-flop and analyze its
operation

OBJECTIVE:

To study different types of flip flop likes SR flip flop

APPARATUS:

1. AND Gate (IC-7408)

2. NOR Gate (IC-7400)

IC Circuit Diagram :

OBSERVATION TABLE:
 35

BACKGROUND THEORY:

The SR flip-flop, also known as the Set-Reset or SR latch, is a basic building block in digital
logic circuits. It is a simple bistable multivibrator that can store one bit of information.

The SR flip-flop has two inputs, S (Set) and R (Reset), and two outputs, Q (output) and Q'
(complementary output). It has two stable states: Set (S=1, R=0) and Reset (S=0, R=1).

In the Set state, the Q output is 1 and the Q' output is 0.

In the Reset state, the Q output is 0 and the Q' output is 1.

The SR flip-flop changes its state based on the inputs S and R. When S=1 and R=0, the flip-flop
enters the Set state, and when S=0 and R=1, it enters the Reset state. If both S and R are 0 or
both are 1, the flip-flop holds its current state.

Procedure :

1. Connect the power supply's +5V and GND to the appropriate rails on the
breadboard.
2. Place the required logic gate ICs (usually NAND or NOR gates) on the breadboard.
3. Connect the S (Set) and R (Reset) inputs to push-button switches.
4. Connect the outputs of the push-button switches to the respective inputs of the
NAND or NOR gates.
5. Connect the outputs of the gates to LEDs for Q and Q' (complementary outputs)
and add current-limiting resistors.
6. Test the SR latch by pressing the S and R buttons alternately and observing the
LED states. Verify that the latch holds its state and reacts to changes in S and R.

Conclusion :

Summarize the results of my experiments, demonstrating the successful implementation of SR

flip-flop using logic gates. Discuss the applications of these circuits in memory elements and
sequential logic.
 36

Experiment No : 14

Name of the Experiment : Design the circuit of D flip-flop and analyze its
operation

OBJECTIVE:

To study D flip flop

APPARATUS:

1. AND Gate (IC-7408)

2. NOT Gate (IC-7404)
3. NOR Gate (IC-7400)

IC Circuit Diagram :

OBSERVATION TABLE:
 37

BACKGROUND THEORY:

The D flip-flop, also known as the Data or Delay flip-flop, is a fundamental building block in
digital circuits. It stores one bit of data and is widely used for synchronization, data storage, and
sequential logic applications.

Functionality:

The D flip-flop is a type of edge-triggered flip-flop, meaning it changes its output state only on a
specific edge of the clock signal (either rising edge or falling edge). It has a single data input (D)
and two outputs, Q (output) and Q' (complementary output).

When the clock signal transitions at the specified edge (rising or falling), the D flip-flop captures
the value of the D input and updates its output accordingly.

Procedure :

1. Connect the power supply's +5V and GND to the appropriate rails on the
breadboard.
2. Place the required logic gate ICs (usually NAND or NOR gates) on the breadboard.
3. Connect the D (Data) input to a push-button switch.
4. Connect the output of the push-button switch to the input of the NAND or NOR gate.
5. Connect the Q output of the gate to the input of another gate.
6. Connect the feedback loop to the clock input (usually NOT gates are used here to
invert the clock signal).
7. Connect the outputs of the gates to LEDs for Q and Q' and add current-limiting
resistors.
8. Test the D flip-flop by pressing the D button while observing the LED states. Verify
that the flip-flop captures and holds the input data based on the clock signal.

Conclusion :

Summarize the results of my experiments, demonstrating the successful implementation of D

flip-flop using logic gates. Discuss the applications of these circuits in memory elements and
sequential logic.
 38

Experiment No : 15

Name of the Experiment : Design the circuit of J-K flip-flop and analyze its
operation

OBJECTIVE:

To study JK flip flop

APPARATUS:

1. 3 Input AND Gate ( IC-7411)

2. NOR Gate (IC-7400)

IC Circuit Diagram :

IC Circuit Diagram
 39

OBSERVATION TABLE:

BACKGROUND THEORY:

A J-K flip-flop is a sequential logic circuit that is capable of storing one bit of information. It has
two inputs, J (set) and K (reset), and two outputs, Q (output) and Q' (complementary output).
The J-K flip-flop has the ability to toggle its output state based on the inputs and a clock signal.

1. Functionality:

The J-K flip-flop operates in two modes: the toggle mode and the clear-set mode.

2. Toggle Mode:

In this mode, when both J and K inputs are set to 1, the flip-flop toggles its output state
with each clock pulse. This means that if the output was 0, it becomes 1, and if it was 1, it
becomes 0.If both J and K inputs are 0, the flip-flop maintains its current state, effectively
holding it.

3. Clear-Set Mode:

When J = 1 and K = 0, the flip-flop is set (Q becomes 1) regardless of its previous state.

When J = 0 and K = 1, the flip-flop is reset (Q becomes 0) regardless of its previous state.

4. Invalid Condition:

When both J and K inputs are set to 1 (often referred to as a "forbidden state"), the
behavior of the flip-flop can be unpredictable. Some designs use this as an additional
feature, while others avoid this condition by connecting J and K through a NAND or NOR
gate.
 40

Procedure :

1. Connect the power supply's +5V and GND to the appropriate rails on the
breadboard.
2. Place the required logic gate ICs (usually NAND or NOR gates) on the breadboard.
3. Connect the J (Jump) and K (Kill) inputs to push-button switches.
4. Connect the outputs of the push-button switches to the respective inputs of the
NAND or NOR gates.
5. Connect the Q output of one gate to the input of another gate and vice versa,
creating a feedback loop.
6. Connect the feedback loop to the clock input (usually NOT gates are used here to
invert the clock signal).
7. Connect the outputs of the gates to LEDs for Q and Q' and add current-limiting
resistors.
8. Test the JK flip-flop by pressing the J and K buttons alternately while observing the
LED states. Verify that the flip-flop toggles its state based on the inputs and clock.

Conclusion :

Summarize the results of my experiments, demonstrating the successful implementation of JK

flip-flop using logic gates. Discuss the applications of these circuits in memory elements and
sequential logic.