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CSA Assignment-I ECS-5

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28 views1 page

CSA Assignment-I ECS-5

Uploaded by

bajajram2005
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Assignment-I

Subject: CSA, Branch: ECS-5


1. Differentiate between the little endian and the big-endian address assignment schemes.
2. A processor is connected to a 128G X 32 memory module. What is the width of its MAR
and MDR register?
3. What is the function of following registers: MAR, IR, PC, Y.
4. Discuss the factors that affect the performance of the computer. If a 8GHz computer takes 7
clock cycles for ALU instructions, 11 clock cycles for branch instructions and 6 clock cycles
for data transfer instructions. Then Find the total time taken by the computer to execute the
program that consists of 10 ALU instructions, 5 branch instructions and 5 data transfer
instructions
5. Describe briefly about three, two and one address instruction format. Evaluate the explain
Z = (A+B) * C/D using the above three format.
6. Write a program to evaluate the given arithmetic expression: -
Z = (A + B) * C + P * Q - D / R - S
i) Using a general register computer with two address and three address instructions.
ii) Using an accumulator type computer with one address instructions.
iii) Using a stack organized computer with zero-address operation instructions.
iv) Using RISC computer instruction format.
7. Write the number of memory references required for executing the following
instructions:
i) ADD R1, (R2) +
ii) SUB #10, R2
iii) MOV R1, 20(R3, R4)
iv) AND R1, R2
v) Increment A
8. Registers R1 and R2 of a computer contains the decimal value 1100 and 500. What is the
effective address of the memory operand in each of the following instruction?
i) Load 20(R1),R5
ii) Move 300,R5
iii) Store R5, 50(R1,R2)
iv) Subtract (Ri) +, R5
9. An instruction is stored at location 500 with its address field at location 501. The address
field contains the value 80. The contents of a processor register R1 and an Index Register XR
are 501 and 321 respectively. Determine the effective address and data operand (if any), if the
addressing mode of the instruction is (i) Direct (ii) Immediate (iii) Register indirect (iv)Relative
(v) Index
10. How many memory references are required for fetching and executing each of the
following instructions?
(a) ADD 50(R1),R2 (b) SUB (R1)+R2
11. A relative mode branch type instruction is stored in memory at an address 750. The branch
is made to an address 500. What should be the value of the relative address field of the
instruction?

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