Schedule of BASIC FDP

FDP Application Number: 1715157262

Title of the FDP: Beyond Moore's Law: Machine Learning-Driven Approaches to Semiconductor Design
FDP Start Date: 16.12.2024 FDP End Date: 21.12.2024

Day 1 Day 2 Day 3 Day 4 Day 5 Day 6

9:00 – 9:30
Inauguration

9:30 – 12:00 9:30 – 12:00 9:30 – 12:00 9:30 – 12:00 9:00 – 1:00 9:30 – 12:00
Session 1 Session 3 Session 5 Session 7 Industrial visit Session 10
Dr.N C Shivaprakash, Department of Dr. M. Surendar, Assistant Professor, Dr. N B Balamurugan, Professor, Mr.Navaneetha Krishnan V, Senior
Instrumentation and Applied NIT, Karaikal, Puducherry Dept of ECE, TCE Madurai Mr. Rajiv, Software Engineer, QUATEK Technologies India Field Application Engineering,
Physics, IISC, Bengaluru 7 years of experience 26 years of experience Microchip technology Private Limited, SIDCO Industrial Entuple Technologies Pvt. Ltd.
46 years of experience Hardware Fundamentals for Machine Learning for Hardware 17 years of experience Estate, Kappalur, Madurai. 15 years of experience
National Educational Policy 2020 Machine Learning Design Automation - Hardware Design Challenges and [email protected], +91-9025278369. Case Studies and Industry Trends -
Design Languages (HDL) Opportunities - Power and PCB Manufacturer Impact of AI/ML on Health Care
Primer (Verilog/VHDL) Performance Bottlenecks in Device Models, Emerging Research
Traditional Design Quantanics Techserv Pvt Ltd, Directions in Machine Learning for
No.207/49 A, VOC Nagar, North Semiconductor Design
Street, PP Chavadi, Madurai-625016,
12:00 – 1:00 12:00 – 1:00 12:00 – 1:00 12:00 – 1:00 [email protected], +91 90879
Article Discussion Article Discussion Article Discussion Hands on training 40111, Information Technology and
A Review of Machine Learning AI/ML algorithms and applications A Preliminary Taxonomy for Services, Product development 12:00 – 1:00
Techniques in Analog Integrated in VLSI design and technology, Machine Mr. Rajiv, Software Engineer, services
Circuit Design Automation, Elseiver, Volume 93, 2023, Learning in VLSI CAD Microchip technology Article Summary
Electronics 2022, 11(3), 435; https://doi.org/10.1016/j.vlsi.2023.06.002 In Springer book: Machine Learning 17 years of experience Dr.R.Sureshbabu, Professor &
https://doi.org/10.3390/electronics11030 in VLSI Computer-Aided Design Head/ECE, KCET, K.Vellakulam
435 (pp.1-16), 2019, 32 years of experience
Dr.R.Sureshbabu, Professor & https://doi.org/10.1007/978-3-030-
Dr.R.Sureshbabu, Professor & Head/ECE, KCET, K.Vellakulam 04666-8_1
Head/ECE, KCET, K.Vellakulam 32 years of experience Dr.R.Sureshbabu, Professor &
32 years of experience Head/ECE, KCET, K.Vellakulam
32 years of experience
1:00 – 2:00 1:00 – 2:00 1:00 – 2:00 1:00 – 2:00 1:00 – 2:00 1:00 – 2:00
Lunch Lunch Lunch Lunch Lunch Lunch

2:00 – 4:30 2:00 – 4:30 2:00 – 4:30 2:00 – 4:30 2:00 – 4:30
Session 2 Session 4 Session 6 Session 8 Session 9
Dr. S Rajaram, Professor, Dept of ECE, Dr.A.Amalin Prince, Professor, Dept of Mr. Shivaprasad B K, Execution Dr. Suresh Balanethiram, Dr.V.Nithish Kumar, Associate
TCE Madurai EEE, BITS Pilani, Goa Manager, Entuple Technologies Pvt. Assistant Professor, NIT, Professor, Dept of ECE, VIT Vellore.
28 years of experience 18 years of experience Ltd, Bengaluru Puducherry 8 years of experience 2:00 – 4:00
Introduction to Semiconductor Hardware Accelerator for Data 9 years of experience 7 years of experience Machine Learning for Hardware MCQ & Reflection Journal
Design, ML for VLSI Design Flow Systems Design Principles for Machine Design Challenges and Design Automation - Machine
Learning Accelerators - Opportunities - Emerging Learning for Physical Design
Quantization Techniques for Memory Technologies and Automation, Machine Learning for
Low-Power Machine Learning, their role with ML Verification and Validation
Design of On-Chip Memory for
Machine Learning Accelerators
4:30 – 5:30 4:30 – 5:30 4:30 – 5:30 4:30 – 5:30 4:30 – 5:30 4:00 – 5:00
Hands on training Hands on training Hands on training Hands on training Article Discussion Valedictory Session
AI in VLSI Design Advances and
Teaching Practices Teaching Practices Mr. Shivaprasad B K, Execution Mr. Rajiv, Software Engineer, Challenges: Living in the Complex
Dr.T.Prathiba, Dr.T.Prathiba, Manager, Entuple Technologies Pvt. Microchip technology Nature of Integrated Devices,
Assistant Professor/ ECE, KCET, Assistant Professor/ ECE, KCET, Ltd, Bengaluru 17 years of experience Asian Journal of Mechatronics, and
K.Vellakulam K.Vellakulam 9 years of experience Electrical Engineering (AJMEE)
22 years of experience 22 years of experience Vol. 2, No. 2 2023: 121-132
https://doi.org/10.55927/ajmee.v2i2.776
3
Dr.R.Sureshbabu, Professor &
Head/ECE, KCET, K.Vellakulam
32 years of experience
Industrial Visit:
• QUATEK Technologies India Private Limited, SIDCO Industrial Estate, Kappalur, Madurai. [email protected], +91-9025278369.
• Quantanics Techserv Pvt Ltd, No.207/49 A, VOC Nagar, North Street, PP Chavadi, Madurai-625016, [email protected], +91 90879 40111
Session
Topic Resource Person
Number
1 National Educational Policy 2020 Dr.N C Shivaprakash, Department of Instrumentation and Applied Physics, Indian
Institute of Science, Bengaluru, Email ID: [email protected],
[email protected], Phone. No.: 94490 86370 and 99452 74628
2 Introduction to Semiconductor Design, ML for VLSI Dr. S Rajaram, Professor, Department of ECE, Thiagarajar College of Engineering,
Design Madurai. E-mail ID: [email protected], Phone. No – 9443388057.
3 Hardware Fundamentals for Machine Learning Dr. M. Surendar, Assistant Professor, National Institute of Technology, Karaikal. E-
mail ID: [email protected], Phone. No – 9443959440.
4 Hardware Accelerator for Data Flow Systems Dr.A.Amalin Prince, Professor, Department of Electrical and Electronics
Engineering, BITS Pilani Goa Campus, Zuarinagar, Goa-403726, India, Email ID:
[email protected], Phone. No.: 8322580155
5 Machine Learning for Hardware Design Automation Dr. N B Balamurugan, Professor, TCE, Madurai. E-mail ID:
- Hardware Design Languages (HDL) Primer [email protected], Phone. No – 9894346320.
(Verilog/VHDL)
6 Design Principles for Machine Learning Mr. Shivaprasad B K, Execution Manager, Entuple Technologies Pvt. Ltd. (Head
Accelerators - Quantization Techniques for Low- office), 211, Outer Ring Rd, East of NGEF Layout, Kasturi Nagar, Bengaluru,
Power Machine Learning, Design of On-Chip Karnataka 560043
Memory for Machine Learning Accelerators
7 Design Challenges and Opportunities - Power and Mr. Rajiv, Software Engineer, Microchip technology. E-mail ID:
Performance Bottlenecks in Traditional Design [email protected], Phone. No – 90365 64230.
8 Design Challenges and Opportunities - Emerging Dr. Suresh Balanethiram, Assistant Professor, NIT, Puducherry. E-mail ID:
Memory Technologies and their role with ML [email protected], Phone. No – 9600817497.
9 Machine Learning for Hardware Design Automation Dr.V.Nithish Kumar, Associate Professor, Vellore Institute of Technology, Vellore,
- Machine Learning for Physical Design Automation, [email protected], Mobile: 9940105035
Machine Learning for Verification and Validation
10 Case Studies and Industry Trends - Impact of AI/ML Mr.Navaneetha Krishnan V, Senior Field Application Engineering, Entuple
on Health Care Device Models, Emerging Research Technologies Pvt. Ltd. (Head office), 211, Outer Ring Rd, East of NGEF Layout,
Directions in Machine Learning for Semiconductor Kasturi Nagar, Bengaluru, Karnataka 560043, E-Mail Id:
Design [email protected], Mobile: 9353901706
Hands on Hands-on Learning and Project - Hands-on exercises Mr. Shivaprasad B K, Execution Manager, Entuple Technologies Pvt. Ltd. (Head
Training with industry-standard design tools office), 211, Outer Ring Rd, East of NGEF Layout, Kasturi Nagar, Bengaluru,
Karnataka 560043, E-Mail Id: [email protected], Mobile: 9513940117