Basic Logic Computation
Basic Logic Computation
Basic Logic Computation
Laboratory Manual
Manual Prepared by
Dr Ibrahim M.A.
LABORATORY MANUAL CONTENTS
This manual is intended for the Second Year students of ECT branches in the
subject of Digital Logic Design. This manual typically contains practical/ Lab
Sessions related to Digital Logic Design covering various aspects related to the
subject for enhanced understanding.
Students are advised to thoroughly go through this manual rather than only topics
mentioned in the syllabus as practical aspects are the key to understanding and
conceptual visualization of theoretical aspects covered in the books.
Pre-lab
Introduction to different digital gate ICs;
Basic Gate:
□ AND Gate: The AND gate performs a logical "and" operation on two inputs, A and B:
AND Gate
A B Q
0 0 0
0 1 0
1 0 0
1 1 1
□ OR Gate: The OR gate performs a logical "or" operation on two inputs, A and B:
OR Gate
A B Q
0 0 0
0 1 1
1 0 1
1 1 1
□ NOT Gate: The simplest possible gate is called an "inverter," or a NOT gate. It
takes one bit as input and produces output as its opposite. The logic table for NOT
gate and its symbol are shown below.
NOT Gate
A Q
0 1
1 0
Universal Gate
□ NAND Gate: It is quite common to recognize two others as well: the NAND and
the NOR gate. These two gates are simply combinations of an AND or an OR gate
with a NOT gate.
NAND Gate
A B Q
0 0 1
0 1 1
1 0 1
1 1 0
□ EX-OR Gate: The final two gates that are sometimes added to the list are the
XOR and XNOR gates, also known as "exclusive or" and "exclusive nor" gates,
respectively. Here are their tables:
XOR Gate
A B Q
0 0 0
0 1 1
1 0 1
1 1 0
XNOR Gate
A B Q
0 0 1
0 1 0
1 0 0
1 1 1
Experiment No.7
Flip-Flop
Aim: To verify truth table for JK .D and T flip-flop.
Apparatus: Bread board , wires .IC 7476(JK flip-flop),IC7474(D flip-flop)
Objective: To design various types of Flip-Flops and verify the Truth
table.
Circuit Diagram:
Conclusion: Hence verified flip flop operation using IC 7476 and IC 7474.
PART-B
EXPERIMENT NO 10(a)
Project Name: DESIGN OF LOGIC GATES
-- Target Devices: SPARTAN2
-- Tool versions: ISE10.1
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity EXPT1 is
Port ( A : in STD_LOGIC;
B : in STD_LOGIC;
NOT1 : out STD_LOGIC;
AND1 : out STD_LOGIC;
OR1 : out STD_LOGIC;
NAND1 : out STD_LOGIC;
NOR1 : out STD_LOGIC;
XOR1 : out STD_LOGIC;
XNOR1 : out STD_LOGIC);
end EXPT1;
architecture Behavioral of EXPT1 is
begin
NOT1 <= NOT A;
2) RTL SCHEMATIC
1. Quiz on the subject:-
A) Viva-voce questions:
1. What do you mean by Logic Gates?
2. What are the applications of Logic Gates?
3. What is Truth Table?
4. Why we use basic logic gates?
5. Write down the truth table of all logic gates?
6. What do you mean by universal gate?
7. Write truth table for 2 I/P OR, NOR, AND and NAND gate?
8. Implement all logic gate by using Universal gate?
9. Why is they called Universal Gates?
10. Give the name of universal gate?
11. Draw circuit diagram of Half Adder circuit?
12. Draw circuit diagram of Full Adder circuit?
13. Draw Full Adder circuit by using Half Adder circuit and minimum no.
of logic gate?
14. Write Boolean function for half adder? Q.5 Write Boolean function for Full
adder?
15. Design the half Adder & Full Adder using NAND-NAND Logic.
16. Draw circuit diagram of Half Subtractor circuit?
17. Draw circuit diagram of Full Subtractor circuit?
18. Draw Full Subtractor circuit by using Half Subtractor circuit and minimum
no. of logic gate?
19. Write Boolean function for half Subtractor?
20. Write Boolean function for Full Subtractor?
21. What is Excess-3 code? Why it is called Excess-3 code?
22. What is the application of Excess-3 Code?
23. What is ASCII code?
24. Excess-3 code is Weighted or Unweighted?
25. Out of the possible 16 code combination? How many numbers used
in Excess-3 code?
26. What is Demorgan’s Law?
27. Show the truth table for Demorgan’s Theorem?
28. What is Minterm & Maxterm?
29. How Minterm can be converted in Max term?
30. What is Hybrid function?
31. What is Flip-Flop?
32. What is Latch circuit?
33. Draw a truth –tables of S-R, J-K, D and T?
34. What is the disadvantages of S-R Flip-Flop?
35. How can you remove the problem of S-R Flip –Flop?
36. Make circuit diagram of S-R, J-K, D and T Flip-Flop?
37. What do you understand by Race Aground condition? How it is over come
in J-K Flip Flop?
38. Explain the principle of Multiplexer?
39. Draw a circuit diagram of 4: 1 Multiplexer?
40. What are the advantages of Multiplexer?
41. What are the disadvantages of Multiplexer?
42. Make the Truth-table of Multiplexer?
43. Explain about Demultiplexers?
44. Draw a circuit diagram of 1: 4 Demultiplexers?
45. Make a logic diagram of 1: 4 Demultiplexers?
46. What is the application of Demultiplexers?
47. What is the difference between Multiplexer and Demultiplexers?