Digital Electronics/ Digital Logic Design

Objective Type Questions (Units 1 to 2.5)

1. Any negative number is recognized by its_________________. [ ]

a) MSB b) LSB c) Bits d) Nibble
Answer: a
Explanation: Any negative number is recognized by its MSB.

2. The base or radix of binary number system is ______. [ ]

a) 2 b) 8 c) 10 d) 16

3. If the decimal number is a fraction then its binary equivalent is obtained by ________ the number continuously by
2.
a) Dividing b) Multiplying c) Adding d) Subtracting
Answer: b
Explanation: On multiplying the decimal number continuously by 2, the binary equivalent is obtained.

4. The representation of decimal number 532.86 in the form of decimal is ____. [ ]

a) 532.65 b) 532.68 c) 531.67 d) 531.68
Answer: b
Explanation: N= 5 * 102 + 3 * 101 + 2 * 100 + 8 * 10-1 +6 * 10-2 = 532.68

5. The binary equivalent of (1011.011)10 is equal to __________________. [ ]

a) 11.375 b) 10.123 c) 11.175 d) 9.234
Answer: a
Explanation: 1 * 23 + 0 * 22 + 1 * 21 + 0 * 2-1 +1 * 2-2 + 1 * 2-3 = 11.375
Hence, (1011.011)10 = 11.375

6. An important drawback of binary system is____________________. [ ]

a) It requires very large string of 1’s and 0’s to represent a decimal number
b) It requires sparingly small string of 1’s and 0’s to represent a decimal number
c) It requires large string of 1’s and small string of 0’s to represent a decimal number
d) None of the Mentioned
Answer: a
Explanation: The most vital drawback of binary system is that it requires very large string of 1’s and 0’s to represent
a decimal number.

7. The octal number 645 in power of 8 is equal to ________________. [ ]

a) 450 b) 451 c) 421 d) 501
Answer: c
Explanation: The octal number 645 in power of 8 is given by: 6 * 82 + 4 * 81 + 5 * 80 = 421

8. The two digits hexadecimal number which has largest value is ___ which corresponds to ___. [ ]
a) FE, 255 decimal b) FF, 254 decimal c) FF, 255 decimal d) EF, 245 decimal
Answer: c
Explanation: The largest of two digit hexadecimal number is FF and corresponds to
15 * 161 + 15 * 160 = 255 (since, F = 15)

9. Representation of hexadecimal number 6DE in the power of 16 is as_____________. [ ]

a) 6 * 162 + 13 * 161 + 14 * 160 b) 6 * 162 + 12 * 161 + 13 * 160
c) 6 * 162 + 11 * 161 + 14 * 160 d) 6 * 162 + 14 * 161 + 15 * 160
Answer: a
Explanation: In hexadecimal number D & E represents 13 & 14 respectively.
So, 6DE = 6 * 162 + 13 * 161 + 14 * 160.

10. The quantity of double word is_______________. [ ]

a) 16 bits b) 32 bits c) 64 bits d) 8 bits
Answer: b
Explanation: The quantity of double word is 32 bits.

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11. The given hex number (1E.53)16 is equivalent to ________________. [ ]
a) (35.68)8 b) (35.24)8 c) (34.34)8 d) (35.59)8
Answer: b
Explanation: (0001 1110.0101 0011)2 = (00011110.01010011)2 = (011110.010100)2 = (011 110.010 100)2
= (35.24)8

12. The octal number (651.124)8 is equivalent to __________________. [ ]

a) (1A9.260)16 b) (1B0.160)16 c) (1A8.023)16 d) (1B0.289)16
Answer: a
Explanation: (651.124)8 = (110 101 001.001 010 100)2 = (110101001.001010100)2
= (0001 1010 1001.0010 1010 0000)2 = (1A9.260)16

13. The decimal equivalent of (LM17) is given by _______________. [ ]

a) 491 b) 499 c) 497 d) 498
Answer: a
Explanation: (LM17) = 7 * 50 + 3 * 51 + M * 52 + L * 53 = 1 * 50 + 3 * 51 + 4 * 52 + 3 * 53 (L=3, M=4) = 491.00

14. Convert hexadecimal to binary: (1E2H) = ? [ ]

a) 480 b) 483 c) 482 d) 484
Answer: c
Explanation: (1E2)16 = 1 * 162 + E * 161+ 2 * 160 = 256 + 224 + 2 = 482

15. (170)10 is equivalent to ________________. [ ]

a) (FD)16 b) (DF)16 c) (AA)16 d) (AF)16
Answer: c

16. Convert in to decimal: (214)8 = ? [ ]

a) (140)10 b) (141)10 c) (142)10 d) (130)10
Answer: a
Explanation: (214)8 = 2 * 82 + 1 * 81 + 4 * 80
= 128.0 + 8.0 + 4 = (140)10

17. Convert (0.345)10 in to an octal number. [ ]

a) (0.1605)8 b) (0.2605)8 c) (0.1945)8 d) (0.2404)8
Answer: b
Explanation: 0.345*8 = 2.76 2
0.760*8 = 6.08 6
00.08*8 = 0.64 0
0.640*8 = 5.12 5
0.120*8 = 0.96 0
So, (0.345)10 = (0.2605)8

18. Convert from binary to decimal: (01011.1011)2 = ? [ ]

a) (11.6875)10 b) (11.5874)10 c) (10.9876)10 d) (10.7893)10
Answer: a
Explanation: (01011)2 = 0 * 24 + 1 * 23 + 0 * 22 + 1 * 21 + 1 * 20 = 11
(1011)2 = 1 * 2-1 + 0 * 2-2 + 1 * 2-3 + 1 * 2-4 = 0.6875
So, (01011.1011)2 = (11.6875)10

19. Octal to binary conversion: (24)8 = ? [ ]

a) (111101)2 b) (010100)2 c) (111100)2 d) (101010)2
Answer: c
Explanation: (24)8 = (010100)2

20. Convert binary to octal: (110110001010)2 = ? [ ]

a) (5512)8 b) (6612)8 c) (4532)8 d) (6745)8
Answer: b
Explanation: (110110001010)2 = (6612)8

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21. The addition of binary numbers 11011011010 + 010100101 = ? [ ]
a) 0111001000 b) 1100110110 c) 11101111111d) 10011010011
Answer: c

22. Perform binary addition: 101101 + 011011 = ? [ ]

a) 011010 b) 1010100 c) 101110 d) 1001000
Answer: d

23. Perform binary subtraction: 101111 – 010101 = ? [ ]

a) 100100 b) 010101 c) 011010 d) 011001
Answer: c

24. The result obtained after (100101 – 011110) is __________________. [ ]

a) 000111 b) 111000 c) 010101 d) 101010
Answer: a

25. Multiply the binary number: 01001 × 01011 = ? [ ]

a) 001100011 b) 110011100 c) 010100110 d) 101010111
Answer: a

26. 100101 × 0110 = ? [ ]

a) 1011001111 b) 0100110011 c) 101111110 d) 0110100101
Answer: c

28. On multiplication of (10.10) and (01.01), we get ______________. [ ]

a) 101.0010 b) 0010.101 c) 011.0010 d) 110.0011
Answer: c

29. Divide the binary numbers: 111101 ÷ 1001 and find the remainder ____________. [ ]
a) 0010 b) 1010 c) 1100 d) 0011
Answer: d

30. Divide: 011010000 ÷ 0101 = ? [ ]

a) 10001 b) 10100 c) 11001 d) 01000
Answer: b

31. Subtract: 101101 – 001011 = ? [ ]

a) 100010 b) 010110 c) 110101 d) 101100
Answer: a
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32. 1’s complement of 1011101 is ____________________. [ ]
a) 0101110 b) 1001101 c) 0100010 d) 1100101
Answer: c

33. 2’s complement of 11001011 is ___________, [ ]

a) 01010111 b) 11010100 c) 00110101 d) 11100010
Answer: c

34. On subtracting (01010)2 from (11110)2 using 1’s complements, the output will be ___. [ ]
a) 010010 b) 110100 c) 101011 d) 110011
Answer: d

35. On subtracting (010110)2 from (1011001)2 using 2’s complements, we get ____. [ ]
a) 0111001 b) 1100101 c) 0110110 d) 0101100
Answer: d

36. On subtracting (001100)2 from (101001)2 using 2’s complements, we get _____. [ ]
a) 1101100 b) 011101 c) 11010101 d) 11010111
Answer: b

37. On addition of 28 and 18 using 2’s complements, we get _______. [ ]

a) 00101110 b) 0101110 c) 00101111 d) 1001111
Answer: b
38. On addition +38 and -20 using 2’s complements, we get ______. [ ]
a) 11110001 b) 100001110 c) 00001110 d) 110101011
Answer: c

39. On addition -46 and +28 using 2’s complements, we get _____________. [ ]
a) 11101100 b) 00010101 c) 101011111 d) 000100101
Answer: a

40. The addition of -33 and -40 using 2’s complements is equal to ___________. [ ]
a) 01001110 b) 111010101 c) 10110001 d) 10110001
Answer: d

41. On subtracting +28 and +29 using 2’s complements, we get _____________. [ ]
a) 11111010 b) 111111001 c) 010101011 d) 00000101
Answer: d

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42. 1’s complement can be easily obtained by using _________________. [ ]
a) Comparator b) Inverter c) Adder d) Subtractor
Answer: b
Explanation: With the help of inverter the 1’s complement is easily obtained. Since, during the operation of 1’s
complement 1 is converted into 0 and vice-versa and this is well suited for the inverter.

43. The advantage of 2’s complement system is that ___________. [ ]

a) Only one arithmetic operation is required b) Two arithmetic operations are required
c) No arithmetic operations are required d) None of the Mentioned
Answer: a
Explanation: The advantage of 2’s complement is that only one arithmetic operation is required for 2’s complement’s
operation and that is either addition or subtraction.

44. The 1’s complements require ____________. [ ]

a) Two operations b) One operations c) Three operations d) None of the Mentioned
Answer: a
Explanation: Two operations are required for 1’s complement operation. These are conversion of binary numbers and
addition/subtraction.

45. Which one is used for logical manipulations ? [ ]

a) 2’s complement b) 9’s complement c) 1’s complement d) 10’s complement
Answer: c
Explanation: For logical manipulations 1’s complement is used.

46. For arithmetic operations only _________ is used. [ ]

a) 1’s complement b) 2’s complement c) 3’s complement d) 9’s complement
Answer: b
Explanation: Only 2’s complement is used for arithmetic operations.

47. The addition of +19 and +43 results as _________ in 2’s complement system. [ ]
a) 11001010 b) 101011010 c) 00101010 d) 00111110
Answer: d

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48. Binary coded decimal is a combination of _____ binary digits. [ ]
a) Two b) Three c) Four d) None
Answer: c
Explanation: Binary coded decimal is a combination of 4 binary digits. For example-8421.

49. The decimal number 10 is represented in its BCD form as ________. [ ]

a) 1010 b) 01010 c) 00010000 d) 001010
Answer: c
Explanation: The decimal number 10 is represented in its BCD form as 0001 0000.
50. Add the two BCD numbers: 1001 + 0100 = ? [ ]
a) 1101 b) 00001101 c) 00110011 d) None
Answer: c
Explanation: Firstly, Add the 1001 and 0100. We get 1101 as output but it’s not in BCD form. So, we add 0110 (i.e.
6) with 1101. As a result we get 10011 and it’s BCD form is 0001 0011.
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51. In boolean algebra, the OR operation is performed by which properties? [ ]
a) Associative properties b) Commutative properties c) Distributive properties d) All the above
Answer: d
Explanation: The expression for Associative property is given by A+(B+C) = (A+B)+C & A*(B*C) = (A*B)*C.
The expression for Commutative property is given by A+B = B+A & A*B = B*A.
The expression for Distributive property is given by A+BC=(A+B)(A+C) & A(B+C) = AB+AC.

52. The expression for Absorption law is given by _____________. [ ]

a) A+AB = A b) A+AB = B c) AB+AA’ = A d) None
Answer: a
Explanation: The expression for absorption law is given by – A+AB = A.

53. According to Boolean law: A + 1 = ? [ ]

a) 1 b) A c) 0 d) A’
Answer: a
Explanation: A + 1 = A.

54. The involution of A is equal to ____________. [ ]

a) A b) A’ c) 1 d) 0
Answer: a
Explanation: The involution of A means double inversion of A(i.e. A”) and is equal to A.

55. A(A + B) = ? [ ]
a) AB b) 1 c) (1 + AB) d) A
Answer: d
Explanation: A(A + B) = AA + AB = A + AB = A(1 + B) = A*1 = A.

56. De Morgan’s theorem states that ____________. [ ]

a) (AB)’ = A’ + B’ b) (A + B)’ = A’ * B c) A’ + B’ = A’B’ d) None
Answer: a
Explanation: The DeMorgan’s law states that (AB)’ = A’ + B’ & (A + B)’ = A’ * B’.

57. (A + B)(A’ * B’) = ? [ ]

a) 1 b) 0 c) AB d) AB’
Answer: b
Explanation: (A + B)(A’ * B’) = AA’B’ + BA’B’ = 0 + BB’A’ = 0 + 0 = 0 (AA’ = BB’ = 0).

58. Complement of the expression A’B + CD’ is _____________. [ ]

a) (A’ + B)(C’ + D) b) (A + B’)(C’ + D) c) (A’ + B)(C’ + D) d) (A + B’)(C + D’)
Answer: b
Explanation: (A’B + CD’)’ = (A’B)'(CD’)’ = (A” + B’)(C’ + D”) = (A + B’)(C’ + D).

59. Simplify Y = AB’ + (A’ + B)C ____________. [ ]

a) AB’ + C b) AB + AC c) A’B + AC’ d) AB + A
Answer: a
Explanation: Y = AB’ + (A’ + B)C = AB’ + (A’ + B)C = AB’ + (AB’)’C = AB’ + C.

60. The boolean function A + BC is a reduced form of _________________. [ ]

a) AB + BC b) (A + B)(A + C) c) A’B + AB’C d) (A + C)B
Answer: b
Explanation: (A + B)(A + C) = AA + AC + AB + BC = A + AC + AB + BC = A(1 + C + B) + BC = A + BC.
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61. The logical sum of two or more logical product terms is called _____________. [ ]
a) SOP b) POS c) OR operation d) NAND operation
Answer: a
Explanation: The logical sum of two or more logical product terms, is called SOP (i.e. sum of product).
62. The expression Y=AB+BC+AC shows the _________ operation. [ ]
a) EX-OR b) SOP c) POS d) NOR
Answer: b
Explanation: The given expression has the operation product as well as the sum of that. So, it shows SOP operation.

63. The expression Y=(A+B)(B+C)(C+A) shows the _________ operation. [ ]

a) AND b) POS c) SOP d) NAND
Answer: b
Explanation: The given expression has the operation sum as well as the product of that. So, it shows POS(product of
sum) operation.

64. A product term containing all K variables of the function in either complemented or uncomplemented form is
called a _____________. [ ]
a) Minterm b) Maxterm c) Midterm d) None
Answer: a
Explanation: A product term containing all K variables of the function in either complemented or uncomplemented
form is called a minterm.

65. According to the property of minterm, how many combination will have value equal to 1 for K input variables?
[ ]
a) 0 b) 1 c) 2 d) 3
Answer: b
Explanation: The main property of a minterm is that it possesses the value 1 for only one combination of K input
variables and the remaining will have the value 0.

66. The canonical sum of product form of the function y(A,B) = A + B is ____________. [ ]
a) AB + BB + A’A b) AB + AB’ + A’B c) BA + BA’ + A’B’ d) None
Answer: b
Explanation: A + B = A.1 + B.1 = A(B + B’) + B(A + A’) = AB + AB’ + BA +BA’ = AB + AB’ + A’B = AB + AB’
+ A’B.

67. A variable on its own or in its complemented form is known as a ____________. [ ]

a) Product Term b) Literal c) Sum Term d) None
Answer: b
Explanation: A literal is a single logic variable or its complement. For example — X, Y, A’, Z, X’ etc.

68. Maxterm is the sum of __________of the corresponding Minterm with its literal complemented. [ ]
a) Terms b) Words c) Numbers d) None
Answer: a
Explanation: Maxterm is the sum of terms of the corresponding Minterm with its literal complemented.

69. Canonical form is a unique way of representing ____________. [ ]

a) SOP b) Minterm c) Boolean Expressions d) A page
Answer: c
Explanation: Boolean Expressions are represented through canonical form. An example of canonical form is A’B’C’
+ AB’C + ABC’.

70. There are _____________ Minterms for 3 variables (a, b, c). [ ]

a) 0 b) 2 c) 8 d) None
Answer: c
Explanation: Minterm is given by 2^n. So, 2^3 = 8 minterms are required.
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71. A Karnaugh map (K-map) is an abstract form of _____ diagram organized as a matrix of squares.[ ]
a) Venn Diagram b) Cycle Diagram c) Block diagram d) Triangular Diagram
Answer: a

72. There are ______ cells in a 4-variable K-Map. [ ]

a) 12 b) 16 c) 18 d) None
Answer: b
Explanation: There are 16(2^4) cells in a 4-variable K-map.
73. The K-map based Boolean reduction is based on the following Unifying Theorem: A + A’ = 1. [ ]
a) Impact b) Non Impact c) Force d) None
Answer: b
Explanation: The given expression A +A’ = 1 is based on non-impact unifying theorem.

74. Each product term of a group, w’.x.y’ and w.y, represents the ____________in that group. [ ]
a) Input b) POS c) Sum-of-Minterms d) None
Answer: c
Explanation: In a minterm, each variable w, x or y appears once either as the variable itself or as the inverse. So, the
given expression satisfies the property of Sum of Minterms.

75. The prime implicant which has at least one element that is not present in any other implicant is known as ___.
a) Essential Prime Implicant b) Implicant c) Complement d) None
Answer: a
Explanation: Essential prime implicants are prime implicants that cover an output of the function that no combination
of other prime implicants is able to cover.

76. Product-of-Sums expressions can be implemented using 2-level _______logic circuits. [ ]

a) OR-AND b) NOR c) XOR d) Both OR-AND and NOR
Answer: d
Explanation: Product-of-Sums expressions can be implemented using 2-level OR-AND & NOR logic circuits.

77. Each group of adjacent Minterms (group size in powers of twos) corresponds to a possible product term of the
given____________________. [ ]
a) Function b) Value c) Set d) None
Answer: a
Explanation: Each group of adjacent Minterms (group size in powers of twos) corresponds to a possible product term
of the given function.

78. Don’t care conditions can be used for simplifying Boolean expressions in _____. [ ]
a) Examples b) Terms c) K-maps d) Latches
Answer: c
Explanation: Don’t care conditions can be used for simplifying Boolean expressions in K-maps which helps in
pairing with 1/ 0.

79. It should be kept in mind that don’t care terms should be used along with the terms that are present in [ ]
a) Minterms b) Maxterm c) K-Map d) Latches
Answer: a
Explanation: It should be kept in mind that don’t care terms should be used along with the terms that are present in
minterms which reduces the complexity of the Boolean expression.

80. Using the transformation method you can realize any POS realization of OR-AND with only. [ ]
a) XOR b) NAND c) AND d) NOR
Answer: d
Explanation: Using the transformation method we can realize any POS realization of OR-AND with only NOR.

81. There are many situations in logic design in which simplification of logic expression is possible in terms of XOR
and ______________ operations. [ ]
a) X-NOR b) XOR c) NOR d) NAND
Answer: a
Explanation: There are many situations in logic design in which simplification of logic expression is possible in terms
of XOR and XNOR operations.

82. These logic gates are widely used in ________ design and therefore are available in IC form. [ ]
a) Circuit b) Digital c) Analog d) Block
Answer: b
Explanation: These logic gates(XOR,XNOR,NOR) are widely used in digital design and therefore are available in IC
form.

83. In case of XOR/ XNOR simplification we have to look for the following ______ adjacencies.[ ]
a) Diagonal b) Offset c) Straight d) Both a and b
Answer: d
Explanation: In case of XOR/XNOR simplification we have to look for the following diagonal and offset adjacencies.

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84. The output of a logic gate is 1 when all the input are at logic 0 as shown below. The gate is either [ ]

INPUT OUTPUT INPUT OUTPUT

A B C A B C
0 0 1 0 0 1
0 1 0 0 1 0
1 0 0 1 0 0
1 1 0 1 1 1

a) A NAND or an EX-OR b) An OR or an EX-NOR c) An AND or an EX-OR d) A NOR or an EX-NOR

Answer: d
Explanation: The output of a logic gate is 1 when all inputs are at logic 0. The gate is either a NOR or an EX-NOR.
(The truth tables for NOR and EX-NOR Gates are shown in above figure.)

85. The code where all successive numbers differ from their preceding number by single bit is__. [ ]
a) Binary code b) BCD c) Excess 3 d) Gray
Answer: d
Explanation: The code where all successive numbers differ from their preceding number by single bit is gray code. It
is an unweighted code. The most important characteristic of this code is that only a single bit change occurs when
going from one code number to next.

86. How many AND gates are required to realize Y = CD + EF + G ? [ ]

a) 4 b) 5 c) 3 d) 2
Answer: d
Explanation: To realize Y = CD + EF + G, two AND gates are required.

87. The NOR gate output will be high if the two inputs are _____. [ ]
a) 00 b) 01 c) 10 d) 11
Answer: a
Explanation: In option b, c or d output is low if any of the I/P is high. So, the correct option will be a.

88. How many two-input AND and OR gates are required to realize Y = CD+EF+G? [ ]
a) 2, 2 b) 2, 3 c) 3, 3 d) None
Answer: a
Explanation: Y = CD + EF + G
The number of two input AND gate = 2 The number of two input OR gate = 2.

89. A universal logic gate is one which can be used to generate any logic function. Which of the following is a
universal logic gate? [ ]
a) OR b) AND c) XOR d) NAND
Answer: d
Explanation: NAND can generate any logic function.

90. A full adder logic circuit will have _______. [ ]

a) Two inputs and one output b) Three inputs and three outputs
c) Two inputs and two outputs d) Three inputs and two outputs
Answer: d
Explanation: A full adder circuit will add two bits and it will also accounts the carry input generated in the previous
stage. Thus three inputs and two outputs (Sum and Carry) are there.

91. How many two input AND gates and two input OR gates are required to realize Y = BD + CE + AB? [ ]
a) 1, 1 b) 4, 2 c) 3, 2 d) 2, 3
Answer: a
Explanation: There are three product terms. So, three AND gates of two inputs are required. As only two input OR
gates are available, so two OR gates are required to get the logical sum of three product terms.
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92. A single transistor can be used to build which of the following digital logic gates? [ ]
a) AND gates b) OR gates c) NOT gates d) NAND gates
Answer: c
Explanation: A transistor can be used as a switch. That is, when base is low collector is high (input zero, output one)
and base is high collector is low (input 1, output 0).

93. How many truth table entries are necessary for a four-input circuit? [ ]
a) 4 b) 8 c) 12 d) 16
Answer: d
Explanation: For 2 inputs: 2^2 = 4 truth table entries are necessary.

94. Which input values will cause an AND logic gate to produce a HIGH output? [ ]
a) At least one input is HIGH b) At least one input is LOW
c) All inputs are HIGH d) All inputs are LOW
Answer: c
Explanation: For AND gate, the output is high only when both inputs are high. That’s why the high output in AND
will occurs only when all the inputs are high.

95. Exclusive-OR (XOR) logic gates can be constructed from what other logic gates? [ ]
a) OR gates only b) AND gates and NOT gates
c) AND gates, OR gates, and NOT gates d) OR gates and NOT gates
Answer: c
Explanation: Expression for XOR is: A.(B’)+(A’).B
so in the above expression the following logic gates are used: AND, OR, NOR.

96. The basic logic gate whose output is the complement of the input is the ____. [ ]
a) OR gate b) AND gate c) INVERTER gate d) Comparator
Answer: c
Explanation: It is also called NOT gate and it simply inverts the input.

97. The AND function can be used to _________ and the OR function can be used to ____. [ ]
a) Enable, disable b) Disable, enable c) Synchronize, energize d) Detect, invert
Answer: a
Explanation: Because of their multiplicity and additivity property respectively.

98. The dependency notation “ > = 1” inside a block stands for which operation? [ ]
a) OR b) XOR c) AND d) XNOR
Answer: a
Explanation: The dependency notation “ > = 1” inside a block stands for OR operation.

99. If we use an AND gate to inhibit a signal from passing one of the inputs must be ____. [ ]
a) LOW b) HIGH c) Inverted d) Floating
Answer: a
Explanation: AND gate means A*B and OR gate means A+B and to inhibit means to get low signal, one of the input
must be low. It means (0*1=0 or 1*0=0) we will get low output signal.

100. Logic gate circuits contain predictable gate functions that open their _____. [ ]
a) Outputs b) Inputs c) Pre-state d) None
Answer: b
Explanation: Logic gate circuits contain predictable gate functions that open their inputs because we are free to give
any types of inputs.
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101. In parts of the processor, adders are used to calculate _________. [ ]

a) Addresses b) Table indices c) Increment and decrement operators d) All the above
Answer: d
Explanation: In parts of the processor, adders are used to calculate addresses, table indices, increment and decrement
operators, and similar operations.
102. Total number of inputs in a half adder is _________. [ ]
a) 2 b) 3 c) 4 d) 1
Answer: a
Explanation: Total number of inputs in a half adder is two. Since, an EXOR gates has 2 inputs and carry is connected
with the input of EXOR gates.

103. In which operation carry is obtained? [ ]

a) Subtraction b) Addition c) Multiplication d) Both a and b
Answer: b
Explanation: In addition, carry is obtained. For example: 1 0 1 + 1 1 1 = 1 0 0; in this example carry is obtained after
1st addition (i.e. 1 + 1 = 1 0).

104. If A and B are the inputs of a half adder, the sum is given by ________. [ ]
a) A AND B b) A OR B c) A XOR B d) A EXOR B
Answer: c
Explanation: If A and B are the inputs of a half adder, the sum is given by A XOR B.

105. If A and B are the inputs of a half adder, the carry is given by ________. [ ]
a) A AND B b) A OR B c) A XOR B d) A EXOR B
Answer: a
Explanation: If A and B are the inputs of a half adder, the carry is given by: A(AND)B.

106. Half-adders have a major limitation in that they cannot _______. [ ]

a) Accept a carry bit from a present stage b) Accept a carry bit from a next stage
c) Accept a carry bit from a previous stage d) None
Answer: c
Explanation: Half-adders have a major limitation in that they cannot accept a carry bit from a previous stage,
meaning that they cannot be chained together to add multi-bit numbers. However, the two output bits of a half-adder
can also represent the result A+B=3 as sum and carry both being high.

107. The difference between half adder and full adder is __________. [ ]
a) Half adder has two inputs while full adder has four inputs
b) Half adder has one output while full adder has two outputs
c) Half adder has two inputs while full adder has three inputs
d) All the above
Answer: c
Explanation: Half adder has two inputs while full adder has three outputs; this is the difference between them.

108. If A, B and C are the inputs of a full adder then the sum is given by ______. [ ]
a) A AND B AND C b) A OR B AND C c) A OR B OR C d) A XOR B XOR C
Answer: c
Explanation: If A, B and C are the inputs of a full adder then the sum is given by A OR B OR C.

109. If A, B and C are the inputs of a full adder then the carry is given by ________. [ ]
a) A AND B OR (A OR B) AND C b) A OR B OR (A AND B) C
c) (A AND B) OR (A AND B)C d) A XOR B XOR (A XOR B) AND C
Answer: a
Explanation: If A, B and C are the inputs of a full adder then the carry is given by A AND B OR (A OR B) AND C.

110. How many AND, OR and EXOR gates are required for the configuration of full adder ___. [ ]
a) 1, 2, 2 b) 2, 1, 2 c) 3, 1, 2 d) 4, 0, 1
Answer: b
Explanation: There are 2 AND, 1 OR and 2 EXOR gates required for the configuration of full adder.
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111. Half subtractor is used to perform subtraction of ________. [ ]

a) 2 bits b) 3 bits c) 4 bits d) 5 bits
Answer: a
Explanation: Half subtractor is a combinational circuit which is used to perform subtraction of two bits, namely
minuend and subtrahend.
112. For subtracting 1 from 0, we use to take a _______ from neighbouring bits. [ ]
a) Carry b) Borrow c) Not possible d) None
Answer: b
Explanation: For subtracting 1 from 0, we use to take a borrow from neighbouring bits because carry is taken into
consideration during addition process.

113. How many outputs are required for the implementation of a subtractor? [ ]
a) 1 b) 2 c) 3 d) 4
Answer: b
Explanation: There are two outputs required for the implementation of a subtractor. One for the output and another
for borrow.

114. Let the input of a subtractor is A and B then what the output will be if A = B? [ ]
a) 0 b) 1 c) A d) B
Answer: a
Explanation: The output for A = B will be 0. If A = B, it means that A = B = 0 or A = B = 1. In both of the situation
subtractor gives 0 as the output.

115. Let A and B is the input of a subtractor then the output will be ___________. [ ]
a) A XOR B b) A AND B c) A OR B d) A EXNOR B
Answer: a
Explanation: Since, the output of a subtractor is given by AB’ + BA’ and this is the output of a XOR gate. So, the
final output is AB’ + BA’.

116. Let A and B is the input of a subtractor then the borrow will be _______. [ ]
a) A * B’ b) A’ * B c) A OR B d) A AND B
Answer: b
Explanation: The borrow of a subtractor is received through NAND gate whose one input is inverted. On that basis
the borrow will be (A’ * B).

117. What does minuend and subtrahend denotes in a subtractor? [ ]

a) Their corresponding bits of input b) Its outputs c) Its inputs d) None
Answer: c
Explanation: Minuend and subtrahend are the two bits of input of a subtractor. If A and B are the two inputs of a
subtractor then A is called minuend and B as subtrahend.

118. Full subtractor is used to perform subtraction of ________. [ ]

a) 2 bits b) 3 bits c) 4 bits d) 8 bits
Answer: b
Explanation: Full subtractor is used to perform subtraction of 3 bits, namely minuend bit, subtrahend bit and borrow
from the previous stage.

119. The full subtractor can be implemented using __________. [ ]

a) Two XOR and an OR gates b) Two half subtractors and an OR gate
c) Two multiplexers and an AND gate d) None of the Mentioned
Answer: b
Explanation: The full subtractor can be implemented using two half subtractors and an OR gate.

120. The output of a subtractor is given by (if A, B and X are the inputs) _________. [ ]
a) A AND B XOR X b) A XOR B XOR X c) A OR B NOR X d) A NOR B XOR X
Answer: b
Explanation: The output of a subtractor is given by (if A, B and X are the inputs) A XOR B XOR X.

121. The difference output of a full subtractor is same as _________. [ ]

a) Half adder b) Full adder c) Half subtractor d) None

Answer: b
Explanation: The output of a full adder and a full subtractor are same. If A, B and C are the input of a full adder and a
full subtractor then the output will be given by (A XOR B XOR C).
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