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Q.1) Draw and explain the Timer 1, 16 bit operation in details compare the Timer 0,1, & 2. [9] (Nov-Dec 2022)
Timer 1 Operation (16-bit) in PIC18F4550:
Timer 1 is a 16-bit timer, meaning it counts from 0x0000 to 0xFFFF (65,535) before rolling over. Its higher
resolution makes it useful for longer delays, more accurate timing, and event capture.
Key Features:
 16-bit Resolution: Timer 1 counts from 0 to 65,535.
 Multiple Clock Sources:
o Internal Clock (Fosc/4).
o External clock source (can be selected via T1OSCEN bit in T1CON register).
o Secondary external oscillator option for real-time clock purposes.
 Prescaler: Provides scaling options of 1:1, 1:2, 1:4, and 1:8, enabling flexibility in timing.
 Interrupts: Timer 1 can generate an interrupt when it overflows from 0xFFFF to 0x0000.
 Capture and Compare: Works with Capture/Compare/PWM (CCP) modules for precise event timing,
input capture, or PWM signal generation.
 Power-saving Features: Can operate in Sleep mode using an external oscillator for real-time clock
functions.
Key Registers of Timer 1:
1. TMR1H and TMR1L:
o These are the high and low byte of the 16-bit Timer 1 register. They store the current count of
the timer.
2. T1CON (Timer 1 Control Register):
o Controls the operation of Timer 1, including clock source selection, prescaler settings, enabling
or disabling the timer, and oscillator configurations.
Key bits in T1CON:
o TMR1ON: Enables or disables Timer 1.
o T1CKPS1 and T1CKPS0: Set the prescaler (1:1, 1:2, 1:4, 1:8).
o T1OSCEN: Enables the external oscillator.
o TMR1CS: Selects the clock source (internal or external).
3. TMR1IF: The interrupt flag for Timer 1. It is set when Timer 1 overflows from 0xFFFF to 0x0000.
4. TMR1IE: The interrupt enable bit. If enabled, an interrupt is generated when the TMR1IF flag is set.

Operation in Different Modes:

1. Timer Mode:
o In this mode, Timer 1 increments with the internal clock source (Fosc/4). The prescaler can
slow down the count to achieve longer delays.
2. Counter Mode:
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o When an external clock is selected, Timer 1 operates as a counter, incrementing on each rising
edge of the external signal. This mode is ideal for counting external events like pulses.
3. Capture Mode:
o Timer 1 can work with the Capture mode of the CCP modules, where the timer's value is
latched into the CCP register when an event (such as a rising or falling edge) occurs.
4. Compare Mode:
o In Compare mode, Timer 1 is compared with a set value, and when they match, an action can
be triggered (such as setting a pin high/low or generating an interrupt).
Power-Saving and Real-Time Clock:
 By using an external clock (typically a 32.768 kHz crystal oscillator), Timer 1 can function as a real-
time clock (RTC), even in Sleep mode, which is useful for low-power applications.

Q.2) Write a program for 1 KHz and 10% duty cycle PWM generation, use Fosc= 10MHz [8] (Nov-Dec 2022)

To generate a 1 kHz PWM signal with a 10% duty cycle on the PIC18F49500 (or similar microcontroller like
PIC18F4550) with a 10 MHz clock frequency (Fosc = 10 MHz), you will need to configure one of the CCP
(Capture/Compare/PWM) modules and set up Timer 2 to control the frequency.
Key Calculations for PWM:
1. PWM Period: The PWM period is determined by the PR2 register, the prescaler of Timer 2, and the
system clock frequency. The formula for calculating the PWM period is:

Where:
o PR2 is the value in the Timer 2 period register.
o Tosc is the oscillator period (Tosc=1/Fosc)
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o TMR2 Prescaler is the prescaler value for Timer 2 (options are 1, 4, or 16).
Rearranging for PR2:

Thus,
Duty Cycle: The duty cycle is set by the CCPR1L and CCP1CON registers. The formula for the duty cycle is:

Program
#include <xc.h>
// Configuration bits
#pragma config FOSC = HS // High-Speed Oscillator
#pragma config WDT = OFF // Watchdog Timer Disabled
#pragma config LVP = OFF // Low Voltage Programming Disabled

#define _XTAL_FREQ 10000000 // 10 MHz clock frequency

void pwm_init(void) {
// Step 1: Set the CCP1 module in PWM mode
CCP1CON = 0b00001100; // CCP1 in PWM mode

// Step 2: Set the PWM frequency

PR2 = 249; // PR2 value for 1 kHz frequency

// Step 3: Set the duty cycle (10% duty cycle)

CCPR1L = 10; // Set the duty cycle (10% of 1 kHz)
CCP1CONbits.DC1B = 0; // Least significant bits of duty cycle (set to 0 for now)
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// Step 4: Configure Timer 2

T2CONbits.T2CKPS = 0b11; // Timer 2 prescaler = 16
T2CONbits.TMR2ON = 1; // Turn on Timer 2

// Step 5: Configure the CCP1 pin (typically RC2) as output

TRISCbits.TRISC2 = 0; // Set RC2 as output (PWM1 output pin)
}

void main(void) {
pwm_init(); // Initialize PWM

while (1) {
// Infinite loop (PWM signal will be generated continuously)
}
}

Q.3) Write program to generate delay of 1 ms using timer 0, 16 bit and no prescaler. [9] (Nov-Dec 2022)

To generate a 1 ms delay using Timer 0 in 16-bit mode with no prescaler on the PIC18F4550, we need to
configure Timer 0 and calculate the initial count value that Timer 0 should load to generate the desired delay.
Steps to Implement the Delay:
1. Clock Frequency:
o The PIC18F4550 uses a clock frequency Fosc = 10 MHz, and the internal timer clock (Tosc) will
be Fosc/4 = 2.5 MHz. This means the timer will increment every 400 ns.
2. Timer 0 in 16-bit Mode:
o In 16-bit mode, Timer 0 counts from 0x0000 to 0xFFFF (65,535), and then it overflows and sets
the TMR0IF (Timer 0 Interrupt Flag).
To achieve a 1 ms delay:
o We need the timer to generate an interrupt or overflow after 1 ms.
o The number of timer ticks needed for 1 ms delay:

The timer can count up to 65,535, so we need to preload the timer with an initial value such that it overflows
after counting 2500 ticks.
Initial Value=65,535−2500=63,035=0xF663
So, to generate a 1 ms delay, we will load 0xF663 into TMR0H and TMR0L.
Code to Generate 1 ms Delay Using Timer 0:
The C program for the PIC18F4550 to generate a 1 ms delay using Timer 0 in 16-bit mode with no
prescaler:
#include <xc.h>
// Configuration bits
#pragma config FOSC = HS // High-Speed Oscillator
#pragma config WDT = OFF // Watchdog Timer Disabled
#pragma config LVP = OFF // Low Voltage Programming Disabled

#define _XTAL_FREQ 10000000 // Define crystal frequency (10 MHz)

// Function to configure Timer 0 in 16-bit mode

void timer0_init(void) {
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// Step 1: Configure Timer 0 in 16-bit mode

T0CONbits.T08BIT = 0; // 16-bit mode
T0CONbits.T0CS = 0; // Internal clock (Fosc/4)
T0CONbits.PSA = 1; // No prescaler
T0CONbits.T0PS = 0b000; // Prescaler is bypassed

// Step 2: Load the initial value for 1 ms delay

TMR0H = 0xF6; // High byte of 0xF663
TMR0L = 0x63; // Low byte of 0xF663

// Step 3: Enable Timer 0

T0CONbits.TMR0ON = 1; // Start Timer 0
}

// Function to generate a delay of 1 ms using Timer 0

void delay_1ms(void) {
// Clear the Timer 0 overflow flag (TMR0IF)
INTCONbits.TMR0IF = 0;

// Load the initial value for 1 ms delay

TMR0H = 0xF6; // High byte of 0xF663
TMR0L = 0x63; // Low byte of 0xF663

// Wait until Timer 0 overflows (TMR0IF is set)

while (INTCONbits.TMR0IF == 0);

// Clear the overflow flag for the next use

INTCONbits.TMR0IF = 0;
}
void main(void) {
// Initialize Timer 0
timer0_init();

while (1) {
// Call the delay function to generate a 1 ms delay
delay_1ms();

// Toggle an LED or perform some action here

// Example: Toggle PORTB pin 0
LATBbits.LATB0 = ~LATBbits.LATB0; // Toggle RB0 every 1 ms
}
}

Q.4) State specification of ADC and explain with block schematic functions of inbuilt ADC of PIC 18F4550 [8]
(Nov-Dec 2022) (Nov-Dec 2023)
Specification Analog to Digital Converter
 When we interface sensors to the microcontroller, the output of the sensor many of the times is analog
in nature. But microcontroller processes digital signals.
 Hence we use ADC in between sensors and microcontrollers. It converts an analog signal into digital
and gives it to the microcontroller.
 There are a large number of applications of ADC like in a biometric application, Environment
monitoring, Gas leakage detection, etc.
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So now let’s see ADC in PIC18F4550.

 PIC18f4550 has inbuilt 10-bit 13 channel ADC.
 13-channels of ADC are named as AN0-AN12. It means we can connect 13 different sensors at the same
time.
 10-bit ADC means:
 It will give digital count in the range of 0-1023 (2^10).
Digital Output value Calculation

 To keep things simple, let us consider that Vref is 5V,

For 0Vin digital o/p value = 0
For 5Vin digital o/p value = 1023 (10-bit)
For 2.5Vin digital o/p value = 512 (10-bit)
ADC Registers of PIC18F4550
ADRESH (High byte) and ADRESL (Low byte) Registers are used in combination to store the converted data
i.e. digital data. But the data is only 10-bit wide, so the remaining six bits are not used.
ADCON0: A/D Control Register 0

CHS3:CHS0: Analog Channel Select Bits

CHS3:CHS0 Channels Channel Name

0000 Channel 0 AN0

0001 Channel 1 AN1

0010 Channel 2 AN2

0011 Channel 3 AN3

0100 Channel 4 AN4

0101 Channel 5 AN5

0110 Channel 6 AN6

0111 Channel 7 AN7

1000 Channel 8 AN8

1001 Channel 9 AN9

1010 Channel 10 AN10

1011 Channel 11 AN11

1100 Channel 12 AN12

GO/DONE’: A/D Conversion Status Bit
When ADON=1
1= A/D conversion is in progress
0= A/D is idle
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ADON: A/D Conversion Enable/ON bit

1= A/D conversion is ON (Start conversion).
0= A/D conversion is disabled.
ADCON1: A/D Control Register 1

VCFG1: Voltage Reference Configuration bit

1= Vref –
0= Vss
VCFG0: Voltage Reference Configuration bit
1= Vref +
0= Vdd
PCFG3:PCFG0: A/D Port Configuration Bits:
As the ADC pins in PIC18F4550 are multiplexed with many other functions. So these bits are used to de-
multiplex them and use them as an analog input pin.

ADCON2: A/D Control Register 2

ADCS2:ADCS0: A/D clock conversion select bits:

These bits are used to assign a clock to ADC.
111= FRC Clock derived from A/D RC oscillator
110= FOSC/64
101= FOSC/16
100= FOSC/4
011= FRC Clock derived from A/D RC oscillator
010= FOSC/32
001= FOSC/8
000= FOSC/2
ADFM: A/D Result format select bit:
The 10-bit result will be placed in ADRESH (8-bit) and ADRESL (8-bit).
Consider 10-bit data as follows:

1 = Right Justified. However, the lower 8-bits are kept in ADRESL, and the remaining MSB side two bits kept in
ADRESH. And remaining 6 bits (bit 2-7) of ADRESH filled with 0’s.
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0 = Left Justified. However, the upper 8-bits are kept in ADRESH, and the remaining two lower bits are placed in
ADRESL at bit 7-6 location. And the remaining 6 lower bits of ADRESL filled with 0’s.

ACQT2:ACQT0: A/D Acquisition Time Select Bits:

User can program acquisition time.
Following is the minimum wait time before the next acquisition can be started.
TAD = (A/D Acquisition Time)
000= 0 TAD. Default Acquisition Time for A-D conversion.
001= 2 TAD
010= 4 TAD
011= 6 TAD
100= 8 TAD
101= 12 TAD
110= 16 TAD
111= 20 TAD

Q.5) Explain the timer 2 with block schematic, compare Timer 0,1 and 2. [9] (Nov-Dec 2023)
Timer 2 in the PIC18F4550 is an 8-bit timer, meaning it counts from 0 to 255. It is primarily used for PWM
generation and periodic interrupt generation.
Key Components:
1. TMR2: An 8-bit register that acts as the counter for Timer 2. The timer counts from 0 to 255 (since it's
8-bit) and rolls over back to 0.
2. Prescaler: Divides the input clock (Fosc/4) to slow down the counting rate. The prescaler has
selectable options of 1:1, 1:4, and 1:16. This allows for flexibility in choosing how fast or slow the
timer should count.
3. PR2 (Period Register): This 8-bit register defines the period of the timer. When TMR2 reaches the
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value set in PR2, it resets to 0, and an interrupt flag is set (if interrupts are enabled). The timer will
cycle back from 0 and repeat the process.
4. Postscaler: After the timer reaches the PR2 value and triggers a match, the Postscaler further divides
the output frequency of the timer before generating an interrupt. It can divide by values from 1:1 to
1:16.
5. Interrupt Flag: When the timer matches the value in PR2, the TMR2IF (Timer 2 Interrupt Flag) is
set. If enabled, this can trigger an interrupt.

Functionality of Timer 2:
 Periodic Interrupt Generation: Timer 2 is ideal for generating periodic interrupts because the timer
counter value can be compared against the PR2 register.
 Pulse Width Modulation (PWM): Timer 2 is frequently used in conjunction with the CCP
(Capture/Compare/PWM) modules for generating PWM signals. The period of the PWM signal is
determined by the PR2 register, and the duty cycle is controlled by the CCPRx registers.
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Q.6) Describe the block schematic of compare mode of operation with applications in PIC18F4550 [8] (Nov-Dec
2023)
 PIC18F4550 has an inbuilt CCP module which has Capture, Compare, and PWM mode for various
applications.
 CCP in Compare mode is used to generate a waveform of various duty cycles like PWM and also used to
trigger an event when the pre-determined time expires.
 Also, it is used to generate specific time delay.
 PIC18F4550 has 2 in-built CCP modules i.e. CCP1 and CCP2.
 Output (e.g. Waveform generation) of CCP2 and CCP1 in compare mode is generated on two pins i.e.
RC1 and RC2 respectively.

CCPR1 Register
CCP module has 16-bit register CCPR1 [CCPR1H (8-bit): CCPR1L (8-bit)] given below in which count is loaded
to compare.

CCPR1 Register

The compare mode of the CCP module is selected using bits in the CCP1CON Register.
Only Timer1 and Timer3 can be used for Compare mode in PIC18F4550.

Operation of Compare mode

Operation of Compare mode

In compare mode, the 16-bit CCPR1 register value is constantly compared against either the TMR1 or the TMR3
register pair value shown in the figure given below.
When a match occurs between the CCPR1 Register value and Timer value, the CCP1IF interrupt flag is
generated and one of the following actions may occur on the associated RC2 pin:
1. Toggle output on the RC2 pin.
2. RC2 pin drives to a High level.
3. RC2 pin drives to a low level.
4. Generate software interrupt
5. Generate a special trigger event.
Now, what output logic will generate when a compare match occurs depend on the CCP1CON register.

CCP1CON Register: CCP1 Control Register

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CCP1CON Register
DC1B1:DC1B0:
Used for PWM mode.
CCP1M3:CCP1M0: CCP1 module mode select bit
These bits decide which action takes on compare match.
0010 = Toggle output on match
1000 = Initialize CCP1 pin low, on compare match this pin is set to high.
1001 = Initialize CCP1 pin high, on compare match this pin is set to low.
1010 = On compare match generates software interrupt.
1011 = On compare match trigger special event, reset the timer, start ADC conversion.
So Configure compare mode as per application using CCP1CON Register.
Other combinations are used for Capture and PWM mode.
Interrupt on Match
Also, remember that after every compare match between CCPR1 and Timer1/Timer3 CCP1IF interrupt flag is
set.
This flag is located at PIR1<bit2> Register.
Also, note that the T3CON register is used to select Timer1 or Timer3 for compare mode.

T3CON Register: Timer3 Control Register

T3CON Register

T3CCP2:T3CCP1: Used to select Timer for Compare mode operation.

00 = Timer1 for both CCP module
01 = Timer1 for CCP1 module
Timer3 for CCP2 module
1x = Timer3 for both CCP module
Calculation
Now How to calculate Count for CCPR1?
The following figure illustrates steps to calculate count for the desired delay which to be load into CCPR1
Register.

Application 1
Here let’s generate a square wave of 1 kHz having a 50% duty cycle.
For 50% Duty Cycle
Assume Oscillator frequency = 8MHz
Period of waveform = 1ms (1 KHz given)
So Instruction Cycle = 1/ (FOSC/4) = 1/ (8MHz/4) = 0.5 us
That means Timer will increment its count continuously after each 0.5us delay.
Here I used the Timer3 register.
Now calculate CCPR1 count.
For 50% Duty Cycle – ON time=OFF time=0.5ms
0.5ms/0.5us = 1000 i.e. 0x03E8
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CCPR1 = 0x03E8

PIC18F4550 1kHz 50% duty cycle Square wave generation program

/*
* Generate waveform of 1KHz having 50% duty cycle
* https://www.electronicwings.com
*/

#include "osc.h"
#include <p18f4550.h>

void main()
{
OSCCON=0x72; /* Configure internal clock at 8MHz */
TRISCbits.TRISC2=0;/* Configure RC2 pin as output */
CCP1CON=0x02; /* Module is configured for compare mode and is set up so that upon a compare match
of CCPR1 and TMR3, RC2 is driven low*/
PIR1bits.CCP1IF=0; /* Clear interrupt flag*/
TMR3=0; /* Clear Timer3 Register*/
T3CON=0xC0; /* Timer3 used for compare mode with TMR3 register in 16-bit format*/
CCPR1=1000; /* Load a count for generating 1khz*/
T3CONbits.TMR3ON=1; /* Turn On Timer3*/
while (1)
{
/* Wait for CCP Interrupt flag to set, it is set on compare match between CCPR1 and TMR3*/
while(PIR1bits.CCP1IF==0);
PIR1bits.CCP1IF=0;/* Clear interrupt flag */
TMR3=0;
}
}

Output

Q.8) Write a program for 2.5 KHz and 75 % duty cycle PWM generation with N = 4, use Fosc = 10MHz. [8] (Nov-
Dec 2023) (May-Jun 2023)
To generate a PWM signal with a frequency of 2.5 kHz and a duty cycle of 75% using the PIC18F4550
microcontroller, we'll use one of the CCP (Capture/Compare/PWM) modules in PWM mode. The system clock
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is Fosc = 10 MHz, and we will select a prescaler value of N = 4.

PWM Frequency Formula
The PWM frequency is determined by the following formula:

Where:
 Fosc = 10 MHz (system clock frequency)
 N = Prescaler value (N = 4)
 PR2 = 8-bit period register
Duty Cycle Formula
The duty cycle is set using the CCPRxL register and DCxB1
bits:

Step-by-Step Calculation
1. Calculate PR2 for 2.5 kHz PWM frequency:

2. Calculate the Duty Cycle for 75%:

To achieve a 75% duty cycle, the duty cycle register should be:
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PIC18F4550 PWM Program

#include <xc.h>
// Configuration bits
#pragma config FOSC = HS // External High-Speed Oscillator
#pragma config WDT = OFF // Watchdog Timer disabled

void PWM1_Init() {
// Set CCP1 module to PWM mode
CCP1CON = 0b00001100; // CCP1 in PWM mode, DCxB1:DCxB0 = 00

// Set the PWM period (PR2 = 249 for 2.5 kHz)

PR2 = 249;

// Set the duty cycle (CCPR1L = 187 for 75% duty cycle, DC1B1:DC1B0 = 10)
CCPR1L = 187; // CCPR1L holds the 8 most significant bits
CCP1CONbits.DC1B1 = 1; // DC1B1 bit (bit 1 of the least significant bits)
CCP1CONbits.DC1B0 = 0; // DC1B0 bit (bit 0 of the least significant bits)

// Timer2 configuration
T2CON = 0b00000101; // Timer2 ON, Prescaler = 4
}

void main() {
// Set the direction of the CCP1 pin as output (PWM output on RC2)
TRISCbits.TRISC2 = 0; // Make RC2/CCP1 pin an output

// Initialize PWM
PWM1_Init();

while(1) {
// Main loop (the PWM signal is generated in hardware)
}
}
Explanation:
1. Configuration of CCP1 Module in PWM Mode:
o The CCP1 module is configured in PWM mode by setting the CCP1CON register to 0b00001100.
2. PR2 Register:
o We calculated the value of PR2 = 249 to generate a PWM frequency of 2.5 kHz.
3. CCPR1L Register and Duty Cycle Bits (DC1B1):
o The duty cycle is set to 75% by assigning CCPR1L = 187 (most significant bits) and DC1B1
= 10 (least significant bits).
4. Timer 2 Configuration:
o T2CON is set to 0b00000101 to turn on Timer 2 and use a prescaler of 4.
5. PWM Output Pin:
o The TRISC2 register is used to configure the RC2/CCP1 pin as an output pin for the PWM
signal.

Q.9) Draw and explain the Timer 0, 8 bit operation in details compare the Timer 0,1, and 2. [9] (May-Jun 2023)
In the PIC18F4550, Timer0 is a highly flexible and configurable timer/counter module. It can operate in both
8-bit and 16-bit modes. It also has multiple clock sources, including the internal instruction clock (FOSC/4)
and an external clock source via the T0CKI pin.
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Here, we will focus on Timer 0 in 8-bit mode.

Diagram: Timer0 in 8-bit Operation (Simplified)

Components and Operation:

1. TMR0L Register (Timer 0 Low Register - 8-bit):
o TMR0L is the 8-bit register that holds the current count value of Timer 0. This value increments
(or decrements) depending on the configuration of Timer0.
o When the value in TMR0L overflows from 0xFF to 0x00, an interrupt flag (TMR0IF) is set, and
an interrupt can be triggered if enabled.
2. Prescaler:
o The prescaler divides the input clock frequency before feeding it to Timer 0, allowing for longer
timing intervals. It can be set to various values (1:2, 1:4, 1:8, up to 1:256) or bypassed entirely
(1:1 scaling).
o The prescaler is shared with the Watchdog Timer, so proper configuration is important.
3. Postscaler (Optional):
o After Timer 0 overflows, the postscaler can be used to further divide the overflow event. This
allows for even longer delays before an interrupt occurs.
o The postscaler is rarely used in basic 8-bit mode applications.
4. Clock Source:
o Internal Clock (FOSC/4): The timer can use the internal clock source, which is the system clock
divided by 4. For instance, with a 20 MHz crystal oscillator, FOSC/4 = 5 MHz.
o External Clock (T0CKI pin): Alternatively, the timer can count external events or pulses when
configured in counter mode.
5. Overflow & Interrupt:
o When Timer 0 overflows (i.e., from 255 back to 0), the TMR0IF (Timer 0 Interrupt Flag) is set. If
Timer 0 interrupts are enabled, the microcontroller can jump to the interrupt service routine
(ISR) to handle this event.
Configuration:
To configure Timer 0 in 8-bit mode, certain registers need to be set up:
1. T0CON (Timer 0 Control Register):
o T0CS (Timer0 Clock Source):
 0: Internal clock (FOSC/4).
 1: External clock from T0CKI pin.
o T08BIT (8-bit/16-bit Mode Select):
 0: Timer 0 operates in 16-bit mode.
 1: Timer 0 operates in 8-bit mode.
o T0SE (Timer 0 Source Edge Select):
 Determines on which edge of the clock source the timer increments.
o T0PS (Timer 0 Prescaler Select):
 Sets the prescaler rate from 1:2 up to 1:256.
o T0PSA (Prescaler Assignment):
 Determines whether the prescaler is assigned to Timer 0 or the Watchdog Timer (WDT).
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o TMR0ON (Timer 0 ON/OFF Control):

 0: Timer 0 is off.
 1: Timer 0 is on.
T0CON Register (Example in 8-bit mode with FOSC/4):

Operation Example:
Assume an internal clock of 20 MHz:
 FOSC/4 = 5 MHz (each instruction cycle is 200 ns).
 The prescaler is set to 1:8, so each increment of TMR0 occurs every 1.6 μs (200 ns × 8).
 In 8-bit mode, TMR0 counts from 0 to 255. Therefore, the timer overflows after 256 increments.
 The time to overflow is: Overflow Time=256×1.6 μs=409.6 μs\text{Overflow Time} = 256 \times
1.6 \, \mu s = 409.6 \, \mu sOverflow Time=256×1.6μs=409.6μs So, Timer 0 will overflow
approximately every 409.6 μs.
If an interrupt is enabled, the microcontroller can be programmed to handle the overflow by executing an
interrupt service routine.
Applications:
 Time Delay Generation: By calculating overflow times, precise delays can be generated.
 Event Counting (Counter Mode): Timer 0 can count external events, useful in frequency counting and
similar applications.
 PWM and Signal Generation: Timer0 can be combined with other peripherals for generating square
waves or pulse-width modulation (PWM).
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Q.10) Write program to generate delay of 10 ms using timer 0, 16 bit and no prescaler. [9] (May-Jun 2023)
To generate a delay of 10 ms using Timer 0 in 16-bit mode and no prescaler in a PIC18F4550, we can
calculate the timer overflow value and set up the timer accordingly.
Steps:
1. Clock Calculation:
o Assume the clock frequency of the PIC18F4550 is 20 MHz.
o The internal clock used for the timer is FOSC/4, which means:

2. Therefore, each instruction cycle takes:

3. Time for 1 Timer Tick:

o Since no prescaler is used, each tick of Timer 0 takes 200 ns.
4. Number of Ticks for 10 ms Delay:
o We need to generate a delay of 10 ms (10,000 µs). The number of timer ticks required for this
is:

5. Since Timer 0 is 16-bit, it can count from 0x0000 to 0xFFFF (65536). We need the timer to count 50,000
ticks, so we preload the timer with:
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6. TMR0 Registers:
o TMR0H (Timer 0 High Byte): 0x3C
o TMR0L (Timer 0 Low Byte): 0xB0
CODE
#include <xc.h>
// Configuration bits (adjust as necessary)
#pragma config FOSC = HS // High-Speed Oscillator
#pragma config WDT = OFF // Watchdog Timer disabled

void Timer0_Delay10ms() {
// Set Timer0 in 16-bit mode, no prescaler
T0CON = 0x08; // T08BIT = 0 (16-bit mode), T0CS = 0 (Internal Clock), PSA = 1 (No prescaler)

// Load Timer0 with the calculated value for 10 ms delay

TMR0H = 0x3C; // Load high byte
TMR0L = 0xB0; // Load low byte

// Turn on Timer0
T0CONbits.TMR0ON = 1;

// Wait for Timer0 overflow (TMR0IF)

while (INTCONbits.TMR0IF == 0);

// Clear Timer0 interrupt flag for future use

INTCONbits.TMR0IF = 0;

// Turn off Timer0

T0CONbits.TMR0ON = 0;
}

void main(void) {
// Example usage of the Timer0_Delay10ms function
while (1) {
// Call delay function
Timer0_Delay10ms();

// Toggle an LED or do some other task

LATBbits.LATB0 ^= 1; // Toggle RB0
}
}

Q.11) Explain capture mode of PlC microcontroller, discuss the role of PIR register in capture mode. [9] (May-
Jun 23/24)
Capture Mode in PIC Microcontroller
Capture Mode is a feature of the Enhanced Capture/Compare/PWM (ECCP) module in PIC microcontrollers,
such as the PIC18F4550. This mode allows the microcontroller to capture the value of a timer (typically
Timer1) when an external event occurs. The event can be a rising or falling edge or both on a specific pin
(typically CCP1 or CCP2 pin).
Capture mode is typically used to measure the time between two events (e.g., to measure pulse width,
frequency of a signal, etc.).
How Capture Mode Works:
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1. Timer1 Running in the Background:

o Timer1 is set to run continuously, counting up at a specific rate determined by its prescaler and
clock source.
2. CCPx Pin Monitors the External Event:
o The CCP1 or CCP2 pin (depending on which CCP module is being used) monitors for an edge
(rising or falling) on the input signal. When the configured edge is detected, the microcontroller
captures the current value of Timer1 and stores it in the CCPR1 (for CCP1) or CCPR2 (for
CCP2) register.
3. Edge Selection:
o The capture mode can be configured to trigger on:
 Rising edge.
 Falling edge.
 Both edges (if supported).
4. Capture Register (CCPRx):
o When an event occurs, the current value of Timer1 is captured and stored in the CCPRx
register (16-bit register). This value is the timestamp of the event, and it can be used to
calculate the time difference between events (e.g., pulse width).
5. Interrupt Generation:
o When a capture event occurs, the CCPxIF (Capture/Compare Interrupt Flag) is set. If
interrupts are enabled, the microcontroller will jump to the corresponding Capture Interrupt
Service Routine (ISR) to handle the event.
Role of the PIR Register in Capture Mode:
The PIR (Peripheral Interrupt Request) register plays a crucial role in capture mode because it contains
the interrupt flag for the Capture/Compare/PWM (CCP) module.
In the PIC18F4550, the interrupt flags for the CCP1 and CCP2 modules are located in the PIR1 register:
 PIR1 Register (Peripheral Interrupt Request 1):
o CCP1IF (bit 2): This bit is set when a capture event occurs on the CCP1 pin. It signals that the
current value of Timer1 has been captured and stored in the CCPR1 register.
o CCP2IF (bit 0): This bit is set when a capture event occurs on the CCP2 pin. It signals that the
current value of Timer1 has been captured and stored in the CCPR2 register.
When these flags are set, the microcontroller can execute an interrupt service routine (ISR) to process the
captured timer value.
PIR1 Register Layout (Relevant to Capture Mode):

 CCP1IF (bit 2): Capture/Compare/PWM Interrupt Flag for CCP1.

 CCP2IF (bit 0): Capture/Compare/PWM Interrupt Flag for CCP2.
Note:
 When either CCP1IF or CCP2IF is set, it means that a capture event has occurred, and the
corresponding CCP interrupt should be serviced (if enabled).

Configuring Capture Mode:

1. Set CCPxCON Register:
o Configure the CCPxCON (Capture/Compare/PWM Control Register) to enable capture mode
and specify the edge detection:
 00XX01: Capture on every rising edge.
 00XX10: Capture on every falling edge.
 00XX11: Capture on every 4th rising edge.
 00XX00: Capture on every 16th rising edge.
2. Configure Timer1:
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o Timer1 is usually used as the time base for the capture module. Configure Timer1 with a
suitable prescaler and start it.
3. Enable Capture Interrupts (Optional):
o Enable capture interrupts by setting the CCP1IE or CCP2IE bits in the PIE1 register and enable
global and peripheral interrupts.
4. Read Captured Value:
o When a capture event occurs, read the captured value from the CCPR1H or CCPR2H register.
Applications of Capture Mode:
1. Frequency Measurement: By capturing the time between successive rising or falling edges of a signal,
the frequency of the signal can be calculated.
2. Pulse Width Measurement: The width of a pulse can be measured by capturing both the rising and
falling edges of the signal.
3. Event Timing: Useful for measuring the time between events or for generating timestamps of specific
external events.
Capture mode is an essential feature in applications where precise timing or event tracking is needed. The PIR1
register, specifically the CCP1IF and CCP2IF bits, plays a vital role in indicating when a capture event has
occurred, allowing the microcontroller to respond accordingly.

Q.12) Explain the operation of T0CON and T1CON register of PIC 18F4550. [9] (May-Jun 2024)
The T0CON and T1CON registers in the PIC18F4550 microcontroller are used to control and configure the
operation of Timer 0 and Timer 1, respectively. These timers are versatile modules that can be used for timing
operations, event counting, or generating delays.
1. T0CON Register (Timer 0 Control Register)
The T0CON register is an 8-bit register that controls the operation of Timer 0, which can be configured as an
8-bit or 16-bit timer/counter. It controls various parameters like prescaler, clock source, and timer mode.
T0CON Register Layout (Bits):

Explanation of T0CON Bits:

 Bit 7 - TMR0ON (Timer 0 On/Off Control bit):
o 1: Timer 0 is enabled and starts counting.
o 0: Timer 0 is disabled (stopped).
 Bit 6 - T08BIT (8-bit/16-bit Control bit):
o 1: Timer 0 operates as an 8-bit timer/counter.
o 0: Timer 0 operates as a 16-bit timer/counter.
 Bit 5 - T0CS (Timer 0 Clock Source Select bit):
o 1: External clock from T0CKI pin is used as the clock source.
o 0: Internal clock (FOSC/4) is used as the clock source (instruction cycle clock).
 Bit 4 - T0SE (Timer 0 Source Edge Select bit):
o This bit is valid only when the external clock is selected (T0CS = 1).
o 1: Increment on the falling edge of the clock signal on the T0CKI pin.
o 0: Increment on the rising edge of the clock signal on the T0CKI pin.
 Bit 3 - PSA (Prescaler Assignment bit):
o 1: Prescaler is not assigned to Timer 0 (prescaler is bypassed or used by WDT).
o 0: Prescaler is assigned to Timer 0 (the prescaler is used).
 Bits 2-0 - T0PS2
(Timer 0 Prescaler Select bits):
o These bits set the prescaler value for Timer 0. The prescaler divides the input clock before
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feeding it to Timer 0. This allows for longer delays.

o The available prescaler values are:
T0PS2 Prescaler
000 1:2
001 1:4
010 1:8
011 1:16
100 1:32
101 1:64
110 1:128
111 1:256
2. T1CON Register (Timer 1 Control Register)
The T1CON register is an 8-bit register that controls the operation of Timer 1, which is a 16-bit timer/counter
module. Timer 1 is often used in applications requiring precise timing or event counting, and it can use either
an internal or external clock source.
T1CON Register Layout (Bits):

Explanation of T1CON Bits:

 Bit 7 - RD16 (16-bit Read/Write Mode Enable bit):
o 1: Enables 16-bit read/write operations. When reading or writing to the TMR1 register, both
TMR1H and TMR1L registers are accessed simultaneously.
o 0: Timer 1 operates in two 8-bit registers (you must read/write to TMR1H and TMR1L
separately).
 Bit 6 - T1RUN (Timer 1 System Clock Status bit - Read-only):
o 1: Timer 1 is providing the system clock (only if Timer 1 is used as a clock source).
o 0: Another clock source is providing the system clock.
 Bits 5-4 - T1CKPS1
(Timer 1 Input Clock Prescale Select bits):
o These bits select the prescaler value for Timer 1.
T1CKPS1 Prescaler
00 1:1
01 1:2
10 1:4
11 1:8
 Bit 3 - T1OSCEN (Timer 1 Oscillator Enable bit):
o 1: Enables the Timer 1 oscillator (for low-frequency crystal).
o 0: Disables the Timer 1 oscillator.
o This bit is important when using Timer 1 with an external 32.768 kHz crystal (for RTC
applications).
 Bit 2 - T1SYNC (Timer 1 External Clock Input Synchronization Control bit):
o This bit is valid only when using an external clock source (TMR1CS = 1).
o 1: Do not synchronize external clock input.
o 0: Synchronize the external clock input to the internal phase clock (FOSC).
 Bit 1 - TMR1CS (Timer 1 Clock Source Select bit):
o 1: Selects the external clock from the T1CKI pin as the clock source.
o 0: Selects the internal clock (FOSC/4) as the clock source.
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 Bit 0 - TMR1ON (Timer 1 On/Off Control bit):

o 1: Timer 1 is enabled and starts counting.
o 0: Timer 1 is disabled (stopped).

Q.13) Write an embedded c program to generate square wave of 1KHz with the duty cycle of 25% and prescale
1:16. [10] (May-Jun 2024)

Program:-
#include <p18F4550.h>
// Configuration bits for PIC18F4550
#pragma config FOSC = HS // High-Speed Oscillator (External Oscillator)
#pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled)
#pragma config LVP = OFF // Low-Voltage Programming Disable

#define _XTAL_FREQ 8000000 // Define crystal frequency as 8 MHz

void setupPWM() {
// Set PR2 to 124 for 1kHz frequency
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PR2 = 124;

// Set up Timer2 with 1:16 prescaler

T2CONbits.T2CKPS = 0b11; // Prescaler 1:16
T2CONbits.TMR2ON = 1; // Enable Timer2

// Set the duty cycle to 25%

CCPR1L = 31; // Duty cycle high byte (8 bits)
CCP1CONbits.DC1B = 0; // Set the least significant 2 bits to 0

// Configure CCP1 module for PWM mode

CCP1CONbits.CCP1M = 0b1100; // PWM mode

// Set the CCP1 output pin (RC2) as output

TRISCbits.TRISC2 = 0; // RC2 as output
}

void main(void) {
setupPWM(); // Initialize the PWM

while(1) {
// Infinite loop, PWM runs in hardware
}
}

Q.14) Draw and explain the interrupt structure in priority mode of PIC microcontroller. [8] (May-Jun 2024)
Interrupt Structure in Priority Mode of PIC Microcontroller
The PIC18 series microcontrollers, such as PIC18F4550, feature an interrupt system that allows peripherals or
internal conditions to interrupt the main program flow. The interrupt structure in priority mode is an
advanced system that categorizes interrupts into high-priority and low-priority levels, allowing more flexible
and responsive interrupt handling.
Below is an explanation and a diagram of the interrupt structure in priority mode for a typical PIC18
microcontroller:
Components of the Interrupt Structure:
1. INTCON Register:
o Controls global interrupts and individual external interrupts.
o Key bits:
 GIEH (Global Interrupt Enable High): Enables high-priority interrupts.
 GIEL (Global Interrupt Enable Low): Enables low-priority interrupts.
 PEIE (Peripheral Interrupt Enable): Enables peripheral interrupts.
2. RCON Register:
o Contains the IPEN (Interrupt Priority Enable) bit, which enables the use of interrupt priority
levels.
o When IPEN = 1, the PIC microcontroller uses both high-priority and low-priority interrupts.
3. INTCON2 Register:
o Contains the INTEDG bits to configure edge-triggering for external interrupts.
4. INTCON3 Register:
o Controls external interrupts (like INT1 and INT2) and assigns priority using the INT1IP and
INT2IP bits.
5. Peripheral Interrupts:
o Many peripherals have dedicated interrupt enable and flag bits located in peripheral registers
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like PIE1, PIE2, PIR1, and PIR2.

o The priority for peripheral interrupts is set in the IPR1 and IPR2 registers (Interrupt Priority
Registers).
6. Interrupt Vector Locations:
o High-priority interrupts: Automatically vector to memory address 0x0008.
o Low-priority interrupts: Vector to memory address 0x0018.
o This separation allows independent handling of high- and low-priority interrupts.
Diagram of Interrupt Structure in Priority Mode:

Explanation of Interrupt Handling in Priority Mode:

1. Interrupt Priority Enable (IPEN):
o When the IPEN bit (RCON register) is set, the interrupt system operates in priority mode. This
enables the differentiation between high- and low-priority interrupts.
2. High-Priority Interrupts:
o High-priority interrupts are critical events that require immediate attention. When a high-
priority interrupt occurs:
 The microcontroller vectors to address 0x0008.
 The global interrupt flag (GIEH) allows or blocks these interrupts.
 Once the high-priority interrupt is handled, the program resumes from where it was
interrupted.
 High-priority interrupts can interrupt low-priority interrupt routines.
3. Low-Priority Interrupts:
o Less urgent events generate low-priority interrupts.
 The processor vectors to address 0x0018 when a low-priority interrupt occurs.
 The GIEL bit controls whether low-priority interrupts are enabled or disabled.
 Low-priority interrupts cannot interrupt high-priority interrupts.
4. Global Interrupt Enable:
o The GIEH bit enables/disables high-priority interrupts globally.
o The GIEL bit enables/disables low-priority interrupts globally.
o PEIE enables peripheral interrupts.
5. Handling Multiple Interrupts:
o In priority mode, if both high-priority and low-priority interrupts are enabled, the
microcontroller will handle the high-priority interrupt first. Low-priority interrupts are
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serviced when no high-priority interrupt is active.

6. External Interrupts:
o External interrupts (such as INT0, INT1, INT2) can have their priority levels configured. INT0 is
always high-priority, while INT1 and INT2 can be configured via the INTCON3 register.
Conclusion:
 Priority Mode: Provides a mechanism to handle interrupts based on urgency, allowing critical tasks to
preempt non-critical tasks.
 High vs Low Priority: High-priority interrupts have precedence over low-priority interrupts, ensuring
that urgent conditions are handled quickly.
 Flexibility: By allowing certain peripherals to have priority control, it offers more refined interrupt
handling, making it suitable for applications where real-time response is crucial.
This interrupt structure is particularly useful in systems where multiple sources may trigger interrupts, but
some need to be serviced immediately while others can wait.