Total No. of Questions : 4] SEAT No.

8
23
P-5385 [Total No. of Pages : 2

ic-
tat
[6186]-511

2s
S.E. (Electronics)/(E&Tc)/(Electronics & Computer Engg.) (Insem.)

2:1
02 91
ENGINEERING MATHEMATICS - III

0:4
0
31
(2019 Pattern) (207005) (Semester-III)
9/1 13
Time : 1 Hour] [Max. Marks : 30
0

om
0/2
.23 GP

Instructions to the candidates :

1) Answer Q1 or Q2 and Q3 or Q4.
E
80

2) Figures to the right indicate full marks.

rsic-238
.c
C

3) Neat diagrams must be drawn wherever necessary.

4) Use of non-programmable scientific calculator is allowed.
16

tat
5) Assume suitable data, if necessary.
8.2

es
:12
.24

Q1) a) Solve any two

:42p [10]
02P 91
49

0a
d2y dy
 4 y  2sin x  3e2 x
0

i)  4
31

2
9/1 n13

dx dx
ii) Solve by method of variation of parameters.
P0
0/2
8 0 io

d2y
.23 tG

 y  sec x
dx 2
CE
s

38
d2y
ue

c-2
dy
iii) x2
2
 4 x  6 y  x5
dx dx i
16

tat
Q
8.2

2s

dx dy dz
b)  
x 2  y 2 2 xy  x  y 3 z
.24

[5]
2:1
PU

91
49

0:4

OR
30
31

Q2) a) Solve any two. [10]

SP

i) (D2–20+1)y = xexsinx
01
02

ii) Solve by method of variation of parameters.

0/2
GP
9/1

d2y 2
 y 
CE

dx 2 1  ex
80
.23

d2y dy
 2 x  3 2  2  2 x  3  12 y  6 x
2
iii)
16

dx dx
8.2

P.T.O.
.24
49
 b) An uncharged condenser of capacity C charged by applying an e.m.f. of

8
23
1
value E sin

ic-
through the leads of inductance L and negligible
LC

tat
resistance. The charge 2 on the plate of condenser satisfies the differential

2s
2:1
d 2q Q E t
equation 2   sin

02 91
prove that the charge at any time t is

0:4
dt LC L LC

0
31
9/1 13 Ec  t t t 
given by Q  sin  cos .
2  LC LC 
[5]
0
LC

om
0/2
.23 GP

Q3) a) Find Fourier cosine transform of [5]

E
80

rsic-238
.c
f  x   e 2 x , x  0
C

b) Attempt any ONE [5]

16

tat
i) Find z transform of f (k) = 2k sin3k, k > 0.
8.2

es
ii) Find inverse z transform of

:12
.24

F  z 
1 :42p
02P 91
,z a
49

0a
za
0
31

c) Solve the following difference equation [5]

9/1 n13

f (k+2) – 4 f (k) = 0, f (0)=0, f (1) = 2

P0

OR
0/2
8 0 io
.23 tG

Q4) a) Attempt any ONE [5]

CE
s

38
i) Find Z transform of f  k   k 5k , k  0 .
ue

z2 c-2
i
16

tat
ii) Find inverse z transform of F  z   2 , z  1 by inversion integral
Q
8.2

z 1
2s
.24

method.
2:1
PU

91

b) Find Fourier transform of [5]

49

0:4
30

1 , x  a
31

f  x  
SP

01
02

0 , x  a
0/2
GP


1   , 0    1
9/1

c) Solve  f  x  sin  xdx   [5]

 0 ,  1
CE
80

0
.23


16
8.2
.24

[6186]-511 2
49
Total No. of Questions : 4] SEAT No. :

8
23
PA-4 [Total No. of Pages : 3

ic-
[5931]-6

tat
S.E. (Electronics / E & TC / Electronics & Computer)

6s
8:4
ENGINEERING MATHEMATICS - III

02 91
0:3
(2019 Pattern) (Semester - I) (207005)

0
31
Time : 1 Hour]
6/0 13 [Max. Marks : 30
0
Instructions to the candidates :
1/2
.23 GP

1) Answer Q.1 or Q.2 and Q.3 or Q.4.

2) Figures to the right indicate full marks.
E
81

8
3) Neat diagrams must be drawn wherever necessary.
C

23
4) Use of non-programmable scientific calculator is allowed.

ic-
5) Assume suitable data, if necessary.
16

tat
8.2

6s
Q1) a) Solve any two :
.24

[10]
8:4
91
i) (D2 – 4D + 3)y = x3e2x
49

0:3
30

ii) Solve by variation of parameters method

31
01

(D2 + 4)y = sec 2x

02
1/2
GP

2d2y dy
iii) - 2 - 4 y = x2
6/0

x 2
x
dx dx
CE
81

8
23
dx dy dz
.23

= = 2
ic-
b) Solve : [5]
y + zx -x - yz x - y 2
16

tat
8.2

6s

OR
.24

8:4

Q2) a) Solve any two : [10]

91
49

0:3

d2y
30

+ 4 y = x sin x
31

i)
dx 2
01
02
1/2

e3 x
GP

2
ii) (D - 6D + 9) y = 2
6/0

x
CE
81

Solve by variation of parameters method.

.23

d2y dy
16

2
iii) ( x + a) 2
- 4( x + a) + 6 y = x
dx dx
8.2
.24

P.T.O.
49
 b) A circuit consists of an inductance L and condenser of capacity C in

8
series. An alternating emf Esinnt is applied to it at time t = 0, the initial

23
current and charge being zero, find the current flowing in the circuit at

ic-
tat
2 1
any time t for w  n where w =

6s
[5]
LC

8:4
02 91
0:3
0
31
6/0 13 ìïcos x 0< x<a
Q3) a) Find the Fourier cosine transform of the function f ( x) =ïí
0
ïïî0 n>a
1/2
.23 GP

[5]
E
81

8
b) Attempt any ONE :
C

23
[5]

ic-
16

æ kp ö

tat
i) Find the z - transform of f (k ) = sin ççç + 8÷÷÷, k ³ 0
8.2

6s
è4 ø
.24

8:4
91
49

ii) Find the inverse z - transform of

0:3
30
31

1 1
01
02

f ( z)= ,| z|>
æ 1 ö÷ æ 1 ÷ö 2
1/2

çç z - ÷ çç z - ÷
GP

çè 2 ÷ø çè 3÷ø
6/0
CE
81

8
c) Solve the following difference equation

23
[5]
.23

12f (k + 2) – 7f (k + 1) + f (k) = 0 ; k > 0 ic-

16

tat
8.2

6s

f (0) = 0, f (1) = 3
.24

8:4
91

OR
49

0:3
30
31

Q4) a) Attempt any ONE : [5]

01
02

i) Find the z-transform of f (k) = k 5k, k > 0

1/2
GP
6/0

ii) Find inverse z-transform by inversion integral method

CE
81
.23

1
f ( z) =
( z - 2)( z -3)
16
8.2
.24

[5931]-6 2
49
 b) Find the Fourier sine transform of [5]

8
23
ic-
ì x
ï 0 £ x £1
ï
ï

tat
f ( x ) = í2 - x 1£ x £ 2

6s
ï
ï
ï
î 0
ï x>2

8:4
02 91
0:3
c) Solve the following integral equation [5]

0
31
6/0 13
¥
0
ò
1/2
f ( x)cos λx dx = e-λ , λ > 0
.23 GP

0
E
81

8

C

23
ic-
16

tat
8.2

6s
.24

8:4
91
49

0:3
30
31
01
02
1/2
GP
6/0
CE
81

8
23
.23

ic-
16

tat
8.2

6s
.24

8:4
91
49

0:3
30
31
01
02
1/2
GP
6/0
CE
81
.23
16
8.2
.24

[5931]-6 3
49
Total No. of Questions : 4] SEAT No. :

8
23
PA-5 [Total No. of Pages : 2

ic-
[5931] -7

tat
0s
S.E .(E & TC)

0:2
ELECTRONIC CIRCUITS

02 91
(2019 Pattern) (Semester - I) (204181)

0:4
0
31
Time : 1 Hour]
7/0 13 [Max. Marks : 30
0
Instructions to the candidates:
1/2
.23 GP

1) Solve Q.1 or Q.2, Q.3 or Q.4.

2) Figures to the right indicate full marks.
E
81

3) Draw the neat sketch wherever necessary.

8
C

23
ic-
16

tat
Q1) a) Explain construction and working of N-Type Enhancement MOSFET in
8.2

0s
details? [5]
.24

0:2
91
b) List the non-Ideal characteristics of MOSFET? What is channel length
49

0:4
modulation. Explain in details? [5]
30
31

c) Design a common source amplifier with voltage divider bias for

01
02

ID = 1mA, VDS = 6.4V, VTN = 2.0V, VDD = 10V and Kn = 0.80 mA/V2.
1/2
GP

Assume suitable data as require. [5]

7/0
CE
81

8
23
OR
.23

ic-
16

tat
Q2) a) Using V-I characteristics, show in which regions MOSFET operates?
8.2

0s

Write drain current equation for the respective regions? [5]

.24

0:2
91
49

b) How Body effect & Temperature effect will impact on overall

0:4
30

performance of MOSFET? [5]

31
01
02

c) Determine the current ZD and O/P voltage VDS for the DC bias MOSFET
1/2
GP

circuit using voltage divider bias using parameter as, RG1= 270K ,
7/0

RG2= 240 K , RS = 3.9K , RD = 10K , VDD = 5V, Kn = 0.16mA/V2,

CE
81

VGS = 2.45V, VTN = 1.2V [5]

.23
16
8.2
.24

P.T.O.
49
Q3) a) Explain the effect of negative feedback on amplifier circuit? [5]

8
23
b) Draw block diagram of current series feedback amplifier and derive

ic-
equation of gain, Rif and Rof? [5]

tat
0s
c) Draw a RC phase shift oscillater and calculate Frequency of oscillation

0:2
for R = 8.9kohm and C = 0.1  F. [5]

02 91
0:4
0
31
7/0 13 OR
0
1/2
.23 GP

Q4) a) Calculate the value of Rif, Rof, Avf for a voltage series feedback amplifier
for given specification Ri = 1.2K , AV = 75, Ro = 7.3K ,   0.20. [5]
E
81

8
C

23
b) Compare all four types of feedback amplifier with parameter Avf,

ic-
16

bandwidth, Rif, Rof and output? [5]

tat
8.2

0s
c) What is barskhausen criteria for sustain oscillation? Explain working of
.24

0:2
91
oscillator? [5]
49

0:4
30
31
01

 
02
1/2
GP
7/0
CE
81

8
23
.23

ic-
16

tat
8.2

0s
.24

0:2
91
49

0:4
30
31
01
02
1/2
GP
7/0
CE
81
.23
16
8.2
.24

[5931]-7 2
49
Total No. of Questions : 4] SEAT No. :

8
23
P-5386 [Total No. of Pages : 3

ic-
[6186]-512

tat
0s
S.E. (Electronics/E&TC)

3:1
ELECTRONIC CIRCUITS

02 91
0:4
(2019 Pattern) (Semester - III) (204181)

0
31
0/1 13
0
Time : 1 Hour] [Max. Marks : 30

om
0/2
.23 GP

Instructions to the candidates:

1) Answer Q.1 or Q.2, Q.3 or Q.4.
E
81

rsic-238
.c
2) Figures to the right indicate full marks.
C

3) Draw neat diagram wherever necessary.

16

4) Assume suitable data, if necessary.

tat
8.2

es
:10
.24

Q1) a)
:43p
Draw & Explain drain characteristics of N-EMOSFET. Write drain
02P 91
49

current equation for the respective region? [5]

0a
0
31

b) Explain any two non-ideal current voltage characteristics of MOSFET

0/1 n13

transistor. [5]
P0
0/2

c) For the circuit diagram shown in Figure [1], calculate VDS, ID & VGS.
8 1 io
.23 tG

Assume : R1 = 10 M, R2 = 3.6 M, RD = 10K, Kn = 0.5 mA/V2,

CE
s

38
VTN = 1.5 V. [5]
ue

c-2
i
16

tat
Q
8.2

0s
.24

3:1
PU

91
49

0:4
30
31
SP

01
02
0/2
GP

Figure [1]
0/1

OR
CE
81

Q2) a) Draw the common source E-MOSFET amplifier and explain frequency
.23

response with diagram. [5]

16

b) Explain construction and working of N-Type Enhancement MOSFET

8.2

in details. [5]
.24
49

P.T.O.
 c) For the circuit shown in Figure [2]. Calculate IDQ, VDSQ and VD.

8
Assume : R 1 = 22 M, R D = 3 K, R 2 = 18 M, V TN = 3 V,

23
RS = 0.82 K, Kn = 0.12 mA/V2, VGS = 10.48 V. [5]

ic-
tat
0s
3:1
02 91
0:4
0
31
0/1 13
0

om
0/2
.23 GP
E
81

rsic-238
.c
C

Figure [2]
16

tat
8.2

es
Q3) a) Explain advantages of negative feedback in amplifiers. [5]

:10
.24

:43p
02P 91
b) Explain effect of negative feedback on : [5]
49

0a
0

i) Input impedance
31
0/1 n13

ii) Output impedance

P0
0/2
8 1 io

iii) Gain
.23 tG
CE

iv) Bandwidth
s

38
ue

c-2
v) Gain stability
i
16

tat
c) Identify topology of feedback and determine AVf, Rif, Rof for the
Q
8.2

0s

amplifier shown in Figure [3]. For the MOSFET gm = 2mA/V,

.24

3:1

rd = 40 K. [5]
PU

91
49

0:4
30
31
SP

01
02
0/2
GP
0/1
CE
81
.23
16
8.2

Figure [3]
.24
49

[6186]-512 2
 OR

8
23
Q4) a) Explain Barkhausen Criteria for sustained oscillations and draw the

ic-
circuit diagram of RC phase shift oscillator. [5]

tat
0s
b) Draw the block diagram of Current Series topology and write the

3:1
equation for Rif and Rof. [5]

02 91
0:4
c) Compare different types of feedback topologies with respect to different

0
31
parameter.0/1 13 [5]
0

om
0/2
.23 GP


E
81

rsic-238
.c
16
C

tat
8.2

es
:10
.24

:43p
02P 91
49

0a
0
31
0/1 n13
P0
0/2
8 1 io
.23 tG
CE
s

38
ue

c-2
i
16

tat
Q
8.2

0s
.24

3:1
PU

91
49

0:4
30
31
SP

01
02
0/2
GP
0/1
CE
81
.23
16
8.2
.24
49

[6186]-512 3
Total No. of Questions : 6] SEAT No. :

8
23
P-5387 [Total No. of Pages : 2

ic-
[6186]-513

tat
6s
S.E. (Electronics/Computer Engineering/E&TC) (Insem.)

0:4
DIGITAL CIRCUITS

02 91
0:4
(2019 Pattern) (Semester - III) (204182)

0
31
1/1 13
0
Time : 1 Hour] [Max. Marks : 30

om
0/2
.23 GP

Instructions to the candidates:

1) Answer Q.1 or Q.2, Q.3 or Q.4, Q.5 or Q.6.
E
81

rsic-238
.c
2) Figures to the right indicate full marks.
C

3) Neat diagrams must be drawn wherever necessary.

16

4) Use of non-programmable calculator is allowed.

tat
8.2

5) Assume suitable data, if necessary.

es
:46
.24

:40p
02P 91
Q1) a) Explain the following characteristics of digital IC’s : [6]
49

0a
0

i) Fan In and Fan Out

31
1/1 n13

ii) IIL and IOH

P0
0/2
8 1 io

iii) Propagation delay

.23 tG

b) Draw and explain the operation of CMOS inverter for LOW and HIGH
CE
s

inputs. [4]

38
ue

c-2
OR
i
16

tat
Q2) a) Draw and explain the working of 2-input CMOS NAND gate. [6]
Q
8.2

6s

b) Explain the following characteristics of digital IC’s : [4]

.24

0:4
PU

91

i) Noise Margin
49

0:4
30

ii) Power Dissipation

31
SP

01
02
0/2
GP

Q3) a) Implement and explain the working of full adder using basic gates.
1/1

[5]
CE
81

b) Minimize the following expression using K-map and implement using

.23

logic gates : [5]

16

d( ) indicates don’t care conditions

8.2

Y = m(1, 3, 7, 11, 15) + d(0, 2, 5)

.24
49

P.T.O.
 OR

8
23
Q4) a) Design 3-bit Gray to Binary code converter. [6]

ic-
tat
b) Design full subtractor using half subtractors. [4]

6s
0:4
02 91
0:4
Q5) a) Design and implement BCD to Excess-3 code converter using logic

0
31
gates. [6]
1/1 13
b) Draw and explain the working of 2-input TTL NAND gate. [4]
0

om
0/2
.23 GP

OR
E
81

rsic-238
.c
Q6) a) Explain the difference between current sourcing and current sinking in
C

TTL logic. [4]

16

tat
b) Minimize the following function using Quine Mc Clusky method.[6]
8.2

es
:46
.24

F(A, B, C, D) = m(0, 1, 2, 3, 5, 7, 8, 9, 11, 14)

:40p
02P 91
49

0a
0
31
1/1 n13


P0
0/2
8 1 io
.23 tG
CE
s

38
ue

c-2
i
16

tat
Q
8.2

6s
.24

0:4
PU

91
49

0:4
30
31
SP

01
02
0/2
GP
1/1
CE
81
.23
16
8.2
.24
49

[6186]-513 2
Total No. of Questions : 6] SEAT No. :

8
23
PA-423 [Total No. of Pages : 2

ic-
[5931]-8

tat
S.E. (Electronics/E&TC/Electronics & Computer)

1s
0:3
DIGITAL CIRCUITS

02 91
0:4
(2019 Pattern) (Semester - I) (204182)

0
31
8/0 13
0
Time : 1 Hour] [Max. Marks : 30
1/2
.23 GP

Instructions to the candidates:

E

1) Answer Q.1 or Q.2, Q.3 or Q.4, Q.5 or Q.6.

81

8
C

23
2) Figures to the right indicate full marks.

ic-
3) Neat diagrams must be drawn wherever necessary.
16

tat
4) Use of non-programmable calculator allowed.
8.2

1s
5) Assume suitable data, if necessary.
.24

0:3
91
49

0:4
30

Q1) a) Explain the following characteristics of digital IC’s. [6]

31
01
02

i) Figure of Merit
1/2
GP

ii) Propagation delay

8/0

iii) VIH and VOH

CE
81

8
23
b) Draw and explain the working of CMOS Inverter. [4]
.23

OR ic-
16

tat
8.2

1s

Q2) a) Draw and explain the working of 2-input TTL NAND gate. List advantages
.24

0:3

of Totem Pole. [6]

91
49

0:4

b) Explain the following characteristics of digital IC’s. [4]

30
31

i) Noise Margin
01
02

ii) Fan out and fan in

1/2
GP
8/0
CE

Q3) a) Design full adder using logic gates. [4]

81
.23

b) Minimize the following expression using K-map and implement using

logic gates : Y = Σm (1, 3, 5, 9, 11, 13). [6]
16
8.2

OR
.24

P.T.O.
49
Q4) a) Design 3-bit Gray code to Binary converter. [6]

8
23
b) Design full subtractor using logic gates. [4]

ic-
tat
1s
0:3
Q5) a) Minimize the following function using K-map and implement it using only

02 91
0:4
NAND gates. F(P, Q, R, S) = Σm (4, 5, 6, 7, 8, 12) + d (1, 2, 3, 9, 11, 14)

0
31
[6]
8/0 13
0
b) Compare TTL and CMOS logic families.
1/2 [4]
.23 GP

OR
E
81

8
C

23
Q6) a) Explain the current parameters in TTL logic. [4]

ic-
16

tat
b) Minimize the following function using Quine Mc Clusky method.
8.2

F(A, B, C, D) = Σπ (0, 3, 5, 7, 12, 15) + d (2, 9).

1s
[6]
.24

0:3
91
49

0:4
30


31
01
02
1/2
GP
8/0
CE
81

8
23
.23

ic-
16

tat
8.2

1s
.24

0:3
91
49

0:4
30
31
01
02
1/2
GP
8/0
CE
81
.23
16
8.2
.24

[5931]-8
49

2
Total No. of Questions : 4] SEAT No. :

8
23
P-5388 [Total No. of Pages : 3

ic-
[6186]-514

tat
6s
S.E. (ELECTRONICS/E&TC) (Insem)

3:2
02 91
ELECTRICAL CIRCUITS

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(2019 Pattern) (Semester - III) (204183)

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Time : 1 Hour] [Max. Marks : 30

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Instructions to the candidates:

1) Answer Q1 or Q2 and Q3 or Q4.
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2) Neat diagrams and waveforms must be drawn wherever necessary.

3) Figures to the right side indicate full marks.
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4) Use of nonprogrammable calculator is allowed.
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5) Assume Suitable data if necessary.
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Q1) a) Using source transformation, convert the given network in fig.1 with a
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single current source and a resistor. [5]

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fig. 1
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b) Using Nodal Analysis, determine the current through the 5 resistor for
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the network shown in fig.2 [5]

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fig. 2
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P.T.O.
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Q2) a) Using super mesh analysis, Find the current in the 3 resistor of the
network shown in Fig.4. [5]
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b) Using superposition theorem, find the current through the 3 resistor in

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Fig.5 [5]
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c) State and explain Maximum Power Transfer theorem with suitable

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example. [5]
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Q3) a) What is the significance of Initial conditions? Write the note on initial
conditions in the basic circuit elements. [7]
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[6186]-514 2
 b) In the given network of fig.6, the switch is closed at t = 0. With zero

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current in the inductor, find i, di/dt and di2/dt2 at t = 0+. [8]

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Q4) a) Derive the equation for the Complementary Solution for current through
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inductor for driven R-L Circuit. Draw natural Response of the Circuit
for various values of t. [7]
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b) In the network of Fig.7 the switch is closed at t = 0. With the capacitor

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uncharged, find value for i, di/dt and di2/dt2 at t = 0+. [8]
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Fig. 7
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[6186]-514 3
Total No. of Questions : 4] SEAT No. :

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PA-6 [Total No. of Pages : 3

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S.E. (Electronics/Electronics & Telecommunication)

5s
ELECTRICAL CIRCUITS

9:1
02 91
(2019 Pattern) (Semester - I) (204183)

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31
Time : 1 Hour] 9/0 13 [Max. Marks : 30
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Instructions to the candidates:
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1) Answer Q.1 or Q.2, Q.3 or Q.4.

2) Neat diagrams must be drawn wherever necessary.
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3) Figures to the right indicate full marks.
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4) Assume suitable data, if necessary.

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Q1) a) Using KVL, find the value of R in the Fig.a [5]
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b) Using node analysis, find the node voltages V1 and V2 in the network of
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Fig.b [5]
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c) State and explain Maximum Power Transfer theorem with suitable

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example. [5]
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Q2) a) Using super mesh analysis, Find the current through 3Ω resistor in the

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network of Fig.c [5]

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b) Using Thevenin’s theorem, Find the current through the 2Ω resistor

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connected between terminals A and B in the Fig.d [5]

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c) When to use superposition theorem? List out its applications and
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limitations. [5] ic-

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Q3) a) In the given network of Fig.e, the switch is closed at t = 0. With zero current
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in the inductor, find the values of i, di/dt, and d 2i/dt2 at t = 0+. [6]
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 b) In Fig.f, the switch is closed at t = 0 Find Vc(t) for t > 0. [5]

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c) What is the significance of initial conditions? Explain initial condition for

resistor, capacitor and inductor. [4]
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Q4) a) Write short note on underdamped, overdamped and critical damped
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systems. [6]
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b) The network of Fig.g is under steady state with switch at the position 1.
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At t = 0, switch is moved to position 2. Find i (t) [5]

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c) For the network shown in Fig.h, the switch is open for a long time and
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closes at t = 0. Determine Vc (t). [4]

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