SCHOOL OF COMPUTING AND ENGINEERING SCIENCES

BACHELOR OF SCIENCE IN ELECTRICAL AND ELECTRONICS ENGINEERING

1st SEMESTER 2024
BEE 4102: CONTROL SYSTEMS_II Lab_2

DATE: July, 2024

1. Title:
Analogue Lead, Lag Controllers Analysis and Implementation

2. Objective:
2.1 Build a Lead controller for an RLC network
2.2 Build a Lag controller for an RLC network
2.3 Plot the time response of the RLC network containing a forward loop lead compensator
2.4 Plot the time response of the RLC network containing a forward loop lag compensator

3. Learning Outcome:
3.1 Show that forward loop lead network improves the speed of response of RLC network.
3.2 Show that forward loop lag network increases the damping of the RLC network.

4 Homework to be done as group work.

4.1 Introduction
Fig. 1.1 shows the circuit diagram of an RLC network. If the capacitor C has no charge and
switch S1 is closed at t=0, the charging of capacitor C, output voltage Vc(t), produces a time
response similar to a second order control system time response to a unit step. Fig. 1.2 shows
the step response of the RLC circuit.

R1 = 220Ω; R2 =220Ω;
C=2.2*10-9 F; L=100*10-6H;

Fig. 1.1 RLC Network

Page 1 of 5
 This part of the experiment will give you experience making the measurements with the digital
multimeter (DMM). Because the electrodes of this device are isolated from the circuit ground and the
grounds in AD2, you may make voltage measurements directly across any of the components, whether
or not they are grounded. Figure 4.3: Series RC Circuit
Q3. If the capacitor C were made smaller, what would happen to the current phasor diagrams?
itotal i2
1. Set the function generator to give +a sinusoidal wave output with amplitude
i1 of 2V, o↵set = 0V,
and frequency = 10 kHz. Check the voltage (VS ) and frequency values onC CH1 of the oscilloscope
: 0.01µF
and record them in Table 4.3. Keep CH1 across FGEN throughout the experiment.
2V RM S R1 : 10k⌦
2. Connect CH2 of the oscilloscope across inductor L and measure VL .
RS2
3. Connect CH2 of the oscilloscope across resistor R and measure VR . Do not : 100⌦CH2 leads.
remove
Part (2) - Parallel RL Circuit RS1 : 100⌦
4. Compute the peak-to-peak current Ipp in the circuit by applying the Ohm’s law to the resistor.
itotal
Thatpart
This is Iof = Vexperiment
pp the R /R. will give you experience making similar measurements using the oscillo-
scope. In this part of the experiment, record all voltages
Figure and currents as peak-to-peak values.
5. Measure the phase angle between VR and VS 5.3: Parallel
by using theRC Circuit
cursors on the oscilloscope display.
Press STOP to improve accuracy when taking cursor measurements. Record this value as meas
in the table. itotal i2
1. Before constructing
+ the circuit in Figure 5.3,i1measure circuit components using the DMM: one
6. Compute the 10k⌦inductive
resistor, reactance
two 100⌦Xsense L by resistors,
applying and Ohm’s onelaw Lto:µF
0.01 thecapacitor.
100mH inductor. (BeThat is to
sure XLwait
= until the
VL /IP P . capacitance measurement stabilizes.) Record the measured values in Table 5.1.

7. Compute the total P Fig. 1.2ZStepby

4VPimpedance Response R1 : 2.2k⌦
applying of RLC
Ohm’s Circuit
law to the circuit (Z = Vs\0 / I\ ).
T otal
Table 5.1: Measured Values
Use the supply voltage set in step 1 and the current found in step 4. Remember, the impedance
E1C09 11/03/2010 13:29:57 Page 505 R : 22⌦
has both a magnitude and a phase angle (measured relative to theS2resistor). Convert the value to
rectangular form and record it in theRtable. Nominal Value Measured Value
S1 : 22⌦
itotal
8. Compute theAphase lead/lag network Rshown
Vin Fig. 2 is built=toarctan(V
change the time response of the RLC net-
1 10k⌦
angle11/03/2010
E1C09 between V
13:29:59S and
Page 507R . Recall that L /VR ). Record this
value as calc work
in the and
table,inserted
and compare between
S1it to the
the100⌦value10V source
measured and
on the switch S1.
oscilloscope.
FigureR5.4: Parallel RL Circuit
9.6 Physical Realization of Compensation 505
RS2 100⌦
C2 C4 Lead Network
C
1. Before constructing the circuit in Figure 5.4,0.01µF Rof1=Compensation
9.6 Physical Realization
measure circuit components using the 24,000Ω;
DMM and R2=6,200Ω; 507
Impedance Analyzer. Record the C 1
R
measured values in Table 5.3.
2
C3
R34
R 4 C1=0.01*10 F; C2=0.0082*10-9 F;
-9
23
2. Construct the V (t)
vii(ω)
circuit shown in Figure
– R1 5.3. Set the
R3= 6,200Ω;
R3 function generator to Rprovide
R4=24,000Ω;
a sine wave with
R1 4
a voltage of 2.0 Vrms at 1.0 kHz. +
Verify the voltage
R3 and frequency
– – with
Vο(ω) vo(t)your oscilloscope while
+
the circuit is connected and operating; adjust if necessary. + Lag
LeadNetwork
Network+
+
vi (t)
R2
2R1
30 [V⇠], measure the voltage drop across1=R5 25,000Ω;
C
vo (t)
R =6,200Ω;
R2The
=6,220Ω;
2 R =24,000Ω;
3. Using the DMM voltmeter in AC mode each resistor.
-9 -9 F; C2=0.01*10-9
-9
voltage drops are small,Lag
socompensator
measure
C1 C
as accurately as possible and keep three
=0.0082*10
C1=0.1*10
1
significant F; C2 = 0.082*10 F;F;
– – figures in
Fig. 2 Lead/Lag
R2C2 > R1CNetwork
1 Lead compensator R
R33=
= 24,000Ω;
6,220Ω; RFIGURE R4=6200Ω;
4=25,000Ω;
9.63 Lag-lead
R3C3 > R4C4 compensator implemented
Lag28 with operational
Isolation Lead with cascaded lag and lead
FIGURE 9.61 Lag-lead compensator implemented amplifiers
gain = –1 networks with isolation

4.2 Lead and Lag

Othercompensation
compensators can bepreparation
realized by cascading compensators shown in the
table. For example, a lag-lead compensator can be formedExample 9.10 the lag
by cascading
compensator with the lead compensator, as shown in Figure 9.61. As an example, let
Show that theone
us implement RLC circuit
of the transfer
controllers function
we designed earlier is
Realizing given
a Lead
in the as;
Compensator
chapter.
PROBLEM: Realize the lead compensator designed in Example 9.4 (Compensator b).
"#
Gp = SOLUTION:
" The transfer
# function ofExample 9.9
the lead compensator is
!
$($ &' ( )( ( '*$ ) (("( $ ))
#! #! sþ4
Gc ðsÞ ¼ ð9:51Þ
Implementing a PID Controller
s þ 20:09
4.2.1 LeadPROBLEM:
Compensator
Comparinganalysis
Implement the PID
the transfer functionofofExample
controller a lead network
9.5. shown in Table 9.11 with 10 Marks
Eq. (9.51), we obtain the following two relationships:
Apago PDF Enhancer
SOLUTION: The transfer function of the PID controller
1 is
Show that for the lead/lag controller shown
Apago
ðs þ 55:92Þðs
Rþ1C
¼ 4 in Fig. 2 the transfer
0:5Þ PDF Enhancerð9:52Þ function is given as;
Gc ðsÞ ¼ ð9:45Þ
and
s
$
which can be put in the form
,% ($) *' -$ ($( #$ )$ ) 1 1
Gclead = , ($) = * - $ whereR1R C 1C
þ
R12 C> R2C2
27:96
¼ 20:09 ð9:53Þ
& ( ! ($( Gc ðsÞ ) ¼ s þ 56:42 þ ð9:46Þ
#! )! s there are three network elements and
Hence, R1 C ¼ 0:25, and R2 C ¼ 0:0622. Since
Comparing thetwoPID
equations, weinmay
controller Tableselect one Eq.
9.10 with of the element
(9.46), values
we obtain thearbitrarily.
following Letting
Using therelationships:
three values given
C ¼ 1 mF, then in
R1 ¼Fig. 2, and
250 kV use R2 MATLAB
¼ 62:2 kV. to plot on the same graph, the bode fre-
quency response of GRp,2 þGCclead
1 and
¼ 56:42 Gp * Gclead. ð9:47Þ
R1 C2

What is the phase margin

R2 Cof G andSkill-Assessment
1 ¼1p
Gp * Gcleadð9:48Þ
? Exercise 9.5
PROBLEM: Implement the compensators shown in a. and b. below. Choose 179 a kΩ 0.1 µ F
and passive realization if possible.
1 0:1Þðs þ 5Þ
ðs þ 5.6 µ F
a. Gc ðsÞ ¼ ¼ 27:96 ð9:49Þ
R1 C2 s vi (t) v1(t)
Since there
b. Gare
c ðsÞ four
¼
ðs þ 0:1Þðs þ 2Þ Pageequations,
unknowns and three 2 of 5 we – vo(t)
ðs þ 0:01Þðs þ 20Þ
arbitrarily select a practical value for one of the elements. Selecting +
C2 ¼ 0:1 mF,ANSWERS:
the remaining values are found to be R1 ¼ 357:65 kV, 358 kΩ
R2 ¼ 178;891 kV, and C ¼ 5:59 mF.
a. G (s) is1 a PID controller and thus requires active realization. Use Figure 9.60
c
 Using the values given in Fig. 2, use MATLAB to plot on the same graph, the step re-
sponse of Gp, and Gp * Gclead.

Fill the following table;

Table 1 – Phase Lead Compensated Network Performance

Transfer Phase Corner Fre- Delay Time %Overshoot Settling Time
Function Margin quency (ωc) (Step Input (Step Input (Step Input
Time Time Time
Response) Response) Response)
Gp
Gp*Gclead

How does the phase lead compensator change the transient response of the RLC net-
work?

4.2.2 Lag Compensator analysis 10 Marks

Show that for the lead/lag controller shown in Fig. 2 the transfer function is given as;
$
,% ($) *' -$ ($( #$ )$ )
Gclag = , ($) = *( -! ($( $ )
where R1C1 < R2C2
& #! )!

Using the values given in Fig. 2, use MATLAB to plot on the same graph, the bode fre-
quency response of Gp, Gclag and Gp * Gclag.

What is the phase margin of Gp and Gp * Gclag?

Using the values given in Fig. 2, use MATLAB to plot on the same graph, the step re-
sponse of Gp, and Gp * Gclag.

Fill the following Table;

Table 2 – Phase Lag Compensated Network Performance

Transfer Phase Corner Fre- Delay Time %Overshoot Settling Time
Function Margin quency (ωc) (Step Input (Step Input (Step Input
Time Time Time
Response) Response) Response)
Gp
Gp*Gclag

How does the phase lag compensator change the transient response of the RLC net-
work?

Upload your preparations on the drive before doing the lab.

Page 3 of 5
5 Practical Experiment

5.1 RLC network Step Response 5 Marks

Use a signal generator to apply a variable frequency square wave with an ampli-
tude of 2.5V and a frequency of 100Khz to simulate the opening and closing of
switch S1 and the step response. Fill the following table.

Table 3 – RLC Network step response

Transfer Square Delay %Over- Settling Steady Sketch
Function wave Time shoot Time (Step State the Step
fre- (Step In- (Step In- Input Time Value Response
quency put Time put Time Response)
(ω) Response) Response)
Gp

Simulate your circuit in proteus and compare your practical results with the simu-
lated values.

5.2 Lead Compensator plus RLC network Step Response 10 Marks

Use a high slew rate Op Amp like the AD8014 to build the phase lead network
shown in Fig. 2 plus the RLC network shown in Fig. 1.1. Use a signal generator to
apply a variable frequency square wave with an amplitude of 2.5V and a frequency
of 100Khz to simulate the opening and closing of switch S1 and the step response
of the lead compensated RLC network. Fill the following table.

Table 4 – Lead network plus RLC Network step response

Transfer Square Delay Time %Over- Settling Steady Sketch
Function wave fre- (Step Input shoot Time (Step State the Step
quency Time (Step Input Input Time Value Response
(ω) Response) Time Response)
Response)
Gp*Gclead

How does the phase lead compensator change the transient response of the RLC net-
work?
Simulate your circuit in proteus and compare your practical results with the simu-
lated values.

5.3 Lag Compensator plus RLC network Step Response 10 Marks

Use a high slew rate Op Amp like the AD8014 to build the phase lag network
shown in Fig. 2 plus the RLC network shown in Fig. 1.1. Use a signal generator to
apply a variable frequency square wave with an amplitude of 2.5V and a frequency
of 100Khz to simulate the opening and closing of switch S1 and the step response
of the lag compensated RLC network. Fill the following table.

Page 4 of 5
 Table 5 – Lag network plus RLC Network step response
Transfer Square Delay Time %Over- Settling Steady Sketch the
Function wave fre- (Step Input shoot Time (Step State Step Re-
quency Time (Step Input Input Time Value sponse
(ωc) Response) Time Response)
Response)
Gp*Gclag

How does the phase lag compensator change the transient response of the RLC net-
work?
Simulate your circuit in proteus and compare your practical results with the simu-
lated values.

6. Lab Report

6.1 Use these guidelines

https://drive.google.com/drive/u/4/folders/1jgHSNB5IAyTtZuBOynnLXtSN3z4EdD2n
to write your individual lab report detailing your journey through items 1 to 6.
6.2 Where can we use the lead network?
6.3 Where can we use the lag network?

5 Marks

Page 5 of 5