ADDRESSES AND ADDRESSING MODES

Presenter

Ashioba Nwanze C. (PhD)

WEEK ONE
1
Objectives – week four
 Identifies the different address instructions
 Write programs using different address instructions
 Identifies the different addressing mode

 Identifies the syntax for various addressing mode

 Write programs to implement the addressing mode

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 Computer instruction sets can have zero, one, two or three addresses.
 The symbols ADD, SUB, MUL and DIV for the four arithmetic operations; MOVE for the transfer-type
operation; and LOAD and STORE for transfers to and from memory and AC register.
 Computers with three-address instruction formats can use each address field to specify either a processor register
or a memory operand.
 The general instruction format for the three-address instruction is:
 <opcode><operand-1>, <operand-2>, <result>
 <operation><source-1 operand>, <source-2 operand>, <destination>
 The statement A := B + C; can be represented using the three address instruction as
 ADD B, C, A
 In this instruction operands B and C are called the source operands, operand A is called destination operand and
ADD is the operation to be performed on the operands.
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 The program in assembly language that evaluates X = (A + B) * (C + D) is shown below, together with
comments that explain the register transfer operation of each instruction.
 Using the syntax of the three address notation
<operation><source-1 operand>, <source-2 operand>, <destination>, we have the expression as:
ADD A,B, R1 R1→M[A]+M[B]
ADD C,D, R2 R2→M[C]+M[D]
MUL R1,R2, X M[X] →R1*R2
An example of a commercial computer that uses three-address instructions is the Cyber 170.

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Two Address Instructions
 Two-address instructions are the most common in commercial computers.
 The two-address mode reduces the space requirement.
 Here each address field can specify either a processor register or memory word.
 The general format for two address instruction is:
<Operation><Source operand><Destination operand>
 The statement a := a + b can be represented using the two address
ADD B, A
 Here operand B is the source operand and operand A serves as both source operand and destination operand.

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 The program to evaluate X = (A + B)* (C + D) using two address instructions is as follows:
 Using the two address <Operation><Source operand><Destination operand> , we have
MOVE A, R1 R1→M[A]
ADD B, R1 R1→RI+M[B]
MOV C, R2 R2→M[C]
ADD D, R2 R2→R2+M[D]
MUL R2, R1 R1→R1*RP
MOVE X, R1 M[X] →R1

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One-Address Instructions
 The general instruction format for one address instruction is:
<Operation><source>
 The one address instruction can be represented symbolically as
ADD A
 The instruction adds the contents of variable A into the processor register called accumulator and store the sum
back into the accumulator destroying the previous contents of the accumulator.
 Few more examples of one address instructions are:
LOAD A: This instruction copies the content of memory location A into the accumulator.
STORE B: This instruction copies the contents of accumulator into memory location B.

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 One-address instructions use an implied accumulator (AC) register for all data manipulation.
 For multiplication and division there is a need for a second register.
 However, here we will neglect the second register and assume that the AC contains the result of all operations.
 The program to evaluate X = (A+B)*(C+D) is:
LOAD A AC→M[A]
ADD B AC→AC+M[B]
STORE T M[T] →AC
LOAD C AC → M[C]
ADD D, A AC→AC+M[D]
MUL T AC→AC * M[T]
STORE X M[X] →AC
All operations are done between the AC register and a memory operand. T is the address of a temporary memory
location required for storing the intermediate result.
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Zero-Address Instructions
 In these instructions, the locations of all operands are defined implicitly.
 Such instructions are found in machines that store operands in a structure called a pushdown stack.
 A stack-organized computer does not use an address field for the instructions ADD and MUL.
 The PUSH and POP instructions, however, need an address field to specify the operand that communicates with
the stack.

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 The following program shows how X = (A + B) * (C + D) will be written for a stack organized computer. (TOS
stands for top of stack.)
PUSH A TOS→A
PUSH B TOS→B
ADD T TOS→ (A+B)
PUSH C TOS→C
PUSH D TOS→D
ADD T TOS→ (C+D)
MUL T TOS→ (C+D)*(A+B)
POP X M[X] → TOS
 To evaluate arithmetic expressions in a stack computer, it is necessary to convert the expression into reverse
Polish notation.
 The name “zero-address” is given to this type of computer because of the absence of an address field in the
computational instructions.

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Addressing mode

Register Direct Modes

 These effective addressing modes specify that the operand is in one of the 16 multifunction registers (eight data
and eight address registers).
 The operation is performed directly on the actual contents of the register.
 Notation: An
Dn; where n is between 0 and 7.
Example: CLR. L D1;CLEAR ALL 32 BITS OF D1.
ADD A1, A2 ;ADD LOW ORDER WORD OF A1 TO LOW ORDER OF A2.

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Addressing mode

Memory Address
 The following effective addressing modes specify that the operand is in memory and provide the specific
address of the operand.
 Address Register Indirect - The address of the operand is in the address register specified by the register field.
 Notation: (An)
Examples:
MOVE #5,(A5) ;Move value 5 to word whose address is contained in A5.
SUB.L (A1),D0 ;Subtract from D0 the value in the long word whose address is contained in A1.

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Addressing mode

 Address Register Indirect with Post-increment - The address of the operand is in the address register specified
by the register field.
 After the operand address is used, it is incremented by one, two, or four, depending upon whether the size of the
operand is byte (.B), word (.W), or long (.L).
 Notation: (An)+
Examples:
MOVE.B (A2)+,D2 ;Move byte whose address is in A2 to low order byte of D2; increment A2 by 1.
MOVE.L (A4)+,D3 ;Move long word whose address is in A4 to D3; increment A4 by 4.

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Addressing mode

 Address Register Indirect with Pre-decrement - The address of the operand is in the address register specified
by the register field.
 Before the operand address is used, it is decremented by one, two, or four, depending upon whether the operand
size is byte (.B), word (.W), or long (.L).
 Notation: -(An)
 Examples:
 CLR -(A2); Subtract 2 from A2; clear word whose address is now in A2.
 CMP.L -(A0),D0 ;Subtract 4 from A0; compare long word whose address is now in A0 with contents of
D0.

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 Address Register Indirect with Displacement - The address of the operand is the sum of the address in the
address register and the sign-extended displacement.
 Notation: d(An)
 Examples:
 AVAL EQU 5; AVAL is equated to 5 (for use in next instruction).
CLR.B AVAL(A0);Clear byte whose address is given by adding value of AVAL (=5) to contents of A0.
MOVE #2,10(A2);Move value 2 to word whose address is given by adding 10 to contents of A2.
(AVAL).

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 Address Register Indirect with Index - The address of the operand is the sum of the address in the address
register, the sign-extended displacement, and the contents of the index (A or D) register.
 Notations: d(An,Ri) } Specifies low order word of index register.
 d(An,Ri.W)}
 d(An,Ri.L) Specifies entire contents of index register.
 Examples:
 ADD AVAL(A1,D2),D5 ;Add to low order word of D5 the word whose address is given by addition of contents
of A1, the low order word of index register (D2), and the displacement (AVAL).

Basic Concepts
Addresses and addressing
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 Absolute Short Address - The 16-bit address of the operand is sign extended before it is used. Therefore, the
useful address range is 0 through $7FFF and $FFFF8000 through $FFFFFFFF.
 Notation: XXX
 Example: JMP $400;Jump to hex address 400
 Absolute Long Address - The address of the operand is the 32-bit value specified.
 Notation: XXX
 Example: JMP $12000 ;Jump to hex address 12000

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 Program Counter with Displacement - The address of the operand is the sum of the address in the program
counter and the sign-extended
 displacement integer. The assembler calculates this sign-extended displacement by subtracting the address of
displacement word from the value of the operand field.
 Notation: <expression>(PC) Forced program counter-relative.
 Note that <expression> is interpreted as a program address rather than a displacement.
 Example: JMP TAG(PC) ;Force the evaluation of 'TAG' to be program counter-relative.

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 Program Counter with Index - The address is the sum of the address in the program counter, the sign-extended
displacement value, and the contents of the index (A or D) register.
 Notations: <expression>(Ri.W) Specifies low order word of index register. .W is optional (default).
 <expression>(Ri.L) Specifies entire contents of index register.
 <expression>(PC,Ri) Forced program counter-relative. Ri.W or Ri.L legal. NOTE: <expression> is interpreted
as a program address rather than a displacement.
 Examples: MOVE T(D2),TABLE ;Moves word at location (T plus contents of D2) to word location defined by
TABLE. T must be a relocatable symbol.
 JMP TABLE(A2.W) ;Transfers control to location defined by TABLE plus the lower 16-bit content of A2 with
sign extension. TABLE must be a relocatable symbol.
 JMP TAG(PC,A2.W) ;Forces evaluation of 'TAG' to be program counter-relative with index.

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 Immediate Data - An absolute number may be specified as an operand by immediately preceding a number or
expression with a '#'character.
 The immediate character (#) is used to designate an absolute number other than a displacement or an absolute
address.
 Notation: #XXX
 Examples:
 MOVE #1,D0;Move value 1 to low order word of D0.
 MOVE #(5>>2+3*5), D0
 SUB.L #1,D0;Subtract value 1 from the entire contents of D0.

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