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20RA210 Internal Question 1 Answer Key

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10 views5 pages

20RA210 Internal Question 1 Answer Key

Uploaded by

Senthil
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SRI RAMAKRISHNA ENGINEERING COLLEGE

[Educational Service: SNR Sons Charitable Trust]


[Autonomous Institution, Reaccredited by NAAC with ‘A+’ Grade]
[Approved by AICTE and Permanently Affiliated to Anna University, Chennai]
[ISO 9001:2015 Certified and all eligible programmes Accredited by NBA]
VATTAMALAIPALAYAM, N.G.G.O. COLONY POST, COIMBATORE – 641 022.

Department of Robotics and Automation


Internal Test – I
Date 17.08.2023 Department R&A
Semester V Class/section III
Duration 2:00 Hours Maximum marks 50
Course Code &Title: 20RA210 & MICROCONTROLLERS &EMBEDDED SYSTEMS
Course Outcomes Addressed:
CO1: Identify the need for embedded systems.
CO2: Demonstrate the architecture of ARM RISC processor.

Questions Cognitive
PART – A (Answer All Questions) (10*1 =10 Marks) Level/CO
1. Name the category of the embedded systems that are used in automotive control
systems, industrial automation, and robotics
a) Real-time b) Mobile c) Networked d) Safety-critical R/ CO1
embedded embedded embedded embedded systems
systems systems systems
2. The "power consumption" specification of an embedded system is U/ CO1
a) The clock b) The number c) The size of the d) Energy efficiency
frequency of of I/O ports data cache and battery life
the processor
3. Recall the purpose of the Real-Time Clock (RTC) module in embedded systems
a) Managing b) Providing c) Keeping track d) Processing complex R/ CO1
external internet of time and date algorithms
displays connectivity
4. Identify the layer in the embedded software architecture contains the main
application logic and interacts directly with users or other systems U/CO1
a) Application b) Middleware c) Hardware d)Kernel Layer
Layer Layer Abstraction Layer
(HAL)
5. Point out the purpose of the "SPI" (Serial Peripheral Interface) protocol in
embedded communication software, U/ CO1
a) Managing b) Ensuring c) Enabling d) Providing power
internet real-time task communication management features
connectivity execution between
microcontrollers
and peripheral
devices
6. RISC stand for
a) Reduced b) Random c) Robust d) Real-time Interface R/ CO2
Instruction Set Instruction Set Integrated System for System Control
Computing Control Configuration
7. Identify the type stage is responsible for decoding the fetched instruction and
identifying the required registers in the 3-stage pipeline R/ CO2
a) Instruction b) Instruction c) Execution (EX) d) Write Back (WB)
Fetch (IF) Decode (ID)
8. The "TDMI" in ARM7TDMI stands for Thumb, Debug, and Embedded ICE. R/CO2
9. The ARM7TDMI is an example of an ARM processor that features a 3-stage
R/ CO2
pipeline for efficient instruction processing.
10. JTAG (Joint Test Action Group) interfaces, often used in hardware debugging,
allow developers to access the internal state of a processor and perform boundary R/ CO2
scan testing.

PART – B (Answer All Questions) (5*2 =10 Marks) Cognitive


Level/CO
11. Write down the main differences between Von Neumann and Harvard
architecture.

U/CO1

12. Differentiate between CISC and RISC processor.

U/CO1

List the important considerations when selecting a processor.


 Instruction set
13.  Maximum bits in an operand R/ CO2
 Clock frequency
 Processor ability
14. Illustrate the Current Program Status Register and mention FLAG bits. Ap/CO2
15. Identify the function of following instructions one by one:
i) SUB r0, r1, #5
Function:
The instruction subtracts the value in register r1 from the immediate value 5 and
stores the result in register r0. U/CO2
ii) ADD r2, r3, r3, LSL, #2
Function:
The instruction adds the value in register r3 to itself after performing a logical
shift left by 2 bits (equivalent to multiplying by 4 due to the shift by 2 bits), and
stores the result in register r2.
PART – C (3*10 = 30 Marks)
16. Compulsory Question:
Explain ARM7TDMI Architecture with all important features and
extensions.

U/CO2

Any Two Questions


17. Illustrate with functional description about the different phases of 5-stage
pipeline ARM processor. Ap/ CO2
With a neat sketch explain the block diagram of hardware architecture of
18. embedded systems.

U/ CO1

19. Elaborate the process of generation of executable images. U/CO1


S.No. Cognitive Level addressed Marks Percentage
1. Remember (R) 9 18
2. Understand (U) 39 78
3. Apply (Ap) 02 04
4. Analyze (An) - -
5. Evaluate (E) - -
6. Create (C) - -
Total 50 100

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