Integrated Circuits and Application

ECE2001B
Course Objectives and Course Outcomes
Course Code ECE2001B
Course Category Core Engg.
Course Title Integrated Circuits and Application
Teaching Scheme and Credits L T Laboratory Credits
3 0 2 3+0+1
Weekly load hrs
Pre-requisites: Linear Integrated Circuits

Course Objectives:
1. To introduce basics of the Op- amp and its parameters.
2. To design and test various linear op-amp applications and various active filters
3.To design and test various non-linear Op- amp applications
4.Study, design and test convertors.

Course Outcomes: After completion of this course students will be able to

1. Classify Op-amps; identify parameters for a particular application. (CL-II)
2.Design and test linear applications of Op-amp and various types of active filters for given
specifications. (CL-VI)
3.Design and test non-linear applications of Op-amp. (CL-VI)
4.Design, build and test convertors
 Course Contents
Op-amp Basics: Block diagram of Op-Amp, Differential Amplifier
configurations, DC and AC analysis, Level shifter, current mirror, Op-amp
parameters, effect of temperature on parameters, frequency response of Op-
amp. Inverting and Non-inverting amplifiers Voltage follower, Summing,
averaging scaling amplifier, difference amplifier [12]

Linear Applications:, V to I, I to V ,Integrator ideal and practical,

differentiator ideal and practical, Instrumentation Amplifier, Bridge Amplifiers.
Need of active filters, classification based on order, alignment and function,
Sallen and Key topology, LPF, HPF, BPF, BRF and All pass filter, first order and
second order [13]

Non-Linear Applications: Voltage comparators, Schmitt trigger, Precision

rectifiers, square wave and triangular wave generators.[10]

Convertors and PLL: V to F, F to V using IC LM331, , DAC and ADC basics.

Binary weighted and R-2R DAC types ,SAR and Flash type ADC. Phase Locked
Loop using IC 565.Introduction to Mixed signal processing Integrated Circuits
like MAX 31855/MAX31865/ ADUX1020 or equivalent.[10]
Laboratory Exercises / Practical's:
1. Measurement of Op-amp parameters: Input offset voltage, input offset current and
bias current, Slew rate. External Offset Nulling. (OP-07C, LF 356, LM741C).
2. Design and build Integrator for given specifications.
3. Design and build Instrumentation amplifier (3 Op-amp based) for given specifications

4.Design and build Active LPF/ HPF for given specification for 1st and 2nd order filters
5. Design and build Inverting Schmitt trigger (Symmetric and Asymmetric)for given
specifications
6. Design and build various configurations of Precision rectifier. Use Schottky diodes..
(HWR and FWR)

7. Design and build Square wave and triangular wave generator for given specifications
with variable duty cycle and voltage limiters
8.Design a 2-bit R-2R DAC or simulate 2-bit flash ADC. Verify performance using ICs
for eg. MC1408(DAC) or equivalent, ADC0808 or equivalent
9.Interfacing of a sensor with IA/any suitable amplifier for specific application or any op-
amp based application either on simulation/hardware.
Text Books:
 Ramakant A. Gayakwad, Op-Amps and Linear Integrated Circuits. New Delhi: PHI,
4th Edition, 2015

Reference Books:
 Salivahanan and V. S. Kanchana Bhaaskaran, Linear Integrated Circuits. New Delhi:
McGraw Hill Education Pvt. Ltd, 2nd Edition, 2014

 Sergio Franco, Design with Operational Amplifiers and Analog Integrated Circuits.
USA: McGraw Hill Higher Education, 4th Edition, 2016

Additional Study Material:

Nptel.ac.in/courses/122106025/19
Assessment Scheme
Class Continuous Assessment (CCA) (30 Marks)

Assignment /Quiz Mid Term Test

15 15

Laboratory Continuous Assessment (LCA) (30 Marks)

Mid-term File Practical End Term
Examination
Assessment

10 10 10

End Term Examination:

End Term exam of 40 Marks will be based on entire syllabus.
 Unit I
1-1 Op-Amp Fundamentals
 Lesson Plan
Topic

Introduction to Op-Amp, nomenclature, prefix and suffix of ICs

Block diagram of op-amp

Differential amplifier configuration, Differential amplifier analysis-Dc

Op-amp Parameters , Numericals on DC and AC analysis

Op-amp Parameters , Numericals on DC

Constant Current source & Current mirror

Level Translator and output Stage
Revision
 Lesson Plan
Topic
Op-amp parameters

frequency response of Op-amp

Inverting and Non-inverting amplifiers

Voltage follower

Summing, averaging scaling amplifier

difference amplifier

Numericals
 Op-Amp Fundamentals

What is an Integrated Circuit?

Where do you use an Integrated Circuit?
Why do you prefer an Integrated Circuit to the circuits made by
interconnecting discrete components?
Integrated Circuit (IC)
Definition:
The “Integrated Circuit” or IC is a miniature, low cost electronic
circuit consisting of active and passive components that are
irreparably joined together on a single crystal chip of silicon. In
1958 Jack Kilby of Texas Instruments invented first IC

In 1958 Jack Kilby of Texas Instruments invented first IC

Applications of an Integrated Circuit

 Communication

 Control

 Instrumentation

 Computer

 Electronics
Advantages of an Integrated Circuit:
 Small size

 Low cost

 Less weight

 Low supply voltages

 Low power consumption

 Highly reliable

 Matched devices

 Fast speed
Classification :
 Digital ICs
 Linear ICs
 Linear Integrated Circuit
A linear IC is a solid-state analog device characterized by a infinite
number of possible operating states. It operates over a continuous
range of input levels. –Analog chips
Digital IC has a finite number of discrete input and
output states.
Integrated circuits means the fabrication of a large no, of
semiconductor devices, on a small silicon chip.
Linear circuits are those which obeys superposition theorem,
(a*x1+b*x2) = (a*y1+b*y2).
Most commonly used analog chip- Op-Amp
 Packages

The metal can (TO)

The Flat Package
Package

The Dual-in-Line (DIP)

Package
 Temperature Ranges
1. Military temperature range :
-55o C to +125o C (-55o C to +85o C)

2. Industrial temperature range :

-20o C to +85o C (-40o C to +85o C )

3. Commercial temperature range:

0o C to +70o C (0o C to +75o C )
The standard practice is to specify IC parameters at room temperature
i.e. 25 degree C
Performance and cost are the important factors in
selecting an IC
 Operational Amplifier(Op-Amp)
The term “Operational Amplifier” denotes a special type of
amplifier that, by proper selection of its external components, could
be configured for a variety of mathematical operations.

HISTORY
In 1960 at FAIRCHILD SEMICONDUCTOR CORPORATION,
Robert J. Widlar fabricated Op-Amp with the help of IC
fabrication technology.
In 1968 FAIRCHILD introduced the op-amp that became the
industry standard.
 What is an Op-Amp?
An operational amplifier (op-amp) is a DC-coupled high-gain
electronic voltage amplifier.

Direct-coupled high gain amplifier usually consisting of one or more

differential amplifiers.

Output stage is generally a push-pull or push-pull complementary-

symmetry pair.
What is an Op-Amp:
 An “Operational amplifier” is a direct coupled high-gain amplifier
usually consisting of one or more differential amplifiers and usually
followed by a level translator and output stage.

 The operational amplifier is a versatile device that can be used to

amplify dc as well as ac input signals and was originally designed
for computing mathematical functions as addition, subtraction,
multiplication and integration.
What is an Op-Amp:
 Op-Amps are differential amplifiers, and their output voltage is
proportional to the difference of the two input voltages.

 Op-Amps have five basic terminals, i.e. two input terminals, one
output terminal and two power supply terminals.

 The two input terminals, called the inverting and non-inverting, are
labeled with – and +, respectively.
 Power supply connection:
 The power supply voltage may range from about + 5V to + 22V.
 Most linear ICs (particularly op-amps) use one or more different
amplifiers which require both +ve & -ve power supply for proper
operation of ckt
 The common terminal of the V+ and V- sources is connected to a
reference point or ground.

Single Power Supply Single Power Supply

–15V Common +15V

Figure 1: Dual Power Supply

Pin Configuration of IC 741C

Figure 2: Pin Configuration of IC741

Figure 3: Symbolic representation of Op-Amp
Prefix and Suffix of Op-Amp ICs
There are multiple IC Manufacturers producing millions of ICs per
year.
Each manufacturer uses specific code and assigns a specific type
number to the ICs it produces.

For Example: 741 was originally manufactured by Fairchild

and is sold as the “µA741”
where “µA” represents the identifying initials
used by Fairchild.
Ordering Information: Generally in ordering IC following information
must be specified

µA741 T C

Device type Package type commercial temp range

(op-amp) (mini DIP) ( 0o to +70o C )
Manufacturer’s Designation for Linear ICs
Manufacturers Prefix
Fairchild µA, µAF
National Semiconductor LM,LH, LF, TBA
Motorola MC, MFC
RCA CA,CD
Texas Instruments SN
Signetics N/S, NE, SE, SU
Burr-Brown BB

For Example,
Fairchild’s original µA741 is also manufactured by various other manufacturers as
LM741, MC1741, CA 3741…

Note: Initials used by manufacturers in designating digital ICs may differ

from linear ICs
Fairchild’s original μA741 is also manufactured by other
manufactures as follows
 National Semiconductor - LM741

 Motorola - MC1741

 RCA - CA3741

 Texas Instruments - SN52741

 Signetics - N5741
Some linear ICs are available in different classes, such as
A,C,E,S and SC.
 741 -Military grade op-amp (-550 to 1250)

 741C -Commercial grade op-amp(-00 to 750 )

 741A -Improved version of 741

 741E -Improved version of 741C

 741S -Military grade op-amp with higher slew rate

 741SC -Commercial grade op-amp with higher slew

rate
Block Diagram of Op-Amp

Figure 4: Block diagram of Op-Amp

The operational amplifier is a direct-coupled high

gain amplifier usable from 0 to over 1MHz
Block Diagram of Op-Amp Explanation
The input stage is a dual input balanced output differential amplifier. This stage
provides most of the voltage gain of the amplifier and also establishes the input
resistance of the Op-Amp.

The intermediate stage of Op-Amp is another differential amplifier which is

driven by the output of the first stage. This is usually dual input unbalanced
output.

Because direct coupling is used, the dc voltage level at the output of

intermediate stage is well above ground potential. Therefore level shifting circuit
is used to shift the dc level at the output downward to zero with respect to
ground.

The output stage is generally a push pull complementary amplifier. The output
stage increases the output voltage swing and raises the current supplying
capability of the Op-Amp. It also provides low output resistance.
Different Amplifier Configurations
Differential Amplifier: Differential amplifier is a basic building block of an op-
amp. The function of a differential amplifier is to amplify the difference between
two input signals.

Two Emitter biased circuits are

Shown in Figure 5.

 Q1 and Q2 are identical

Transistors

 RC1, RC2 are identical resistors

 RE1, RE2 are identical resistors

 Magnitude of +VCC is equal to

magnitude of –VEE.

Figure 5: Two Identical Emitter-biased

Circuits
Dual Input Balanced output differential Amplifier
 Amplifier in the Figure 6 amplifies
Difference between two signals V1
and V2

 Ideally, the output voltage is zero

when the two inputs are equal.

 When v1 is greater then v2 the

output voltage with the polarity
shown appears.

 When v1 is less than v2, the output

voltage has the opposite polarity.

RE1|| RE2

Figure 6: Dual Input Balanced Output

Differential Amplifier
Four Differential Amplifier Circuit Configurations

 Dual Input, Balanced Output

 Dual Input, Unbalanced Output
 Single Input, Balanced Output
 Single Input, Unbalanced Output

The Configurations listed are defined by the number of input signals used and
the way the output signal is measured.

If two input signals are used, then the configuration is said to be Dual-Input
otherwise Signal-Input configuration.

If the output voltage is measured between two collectors, it is referred to as

Balanced Output, because both the collectors are at the same DC potential
with respect to ground.

If output is measured at one of the collector with respect to ground, the

configuration is called an Unbalanced Output.
 Dual input, balanced output
differential amplifier

Dual input, unbalanced output

differential amplifier

Single input balanced

output differential amplifier

Single input unbalanced

output differential amplifier.
 Multistage Amplifier
 A multistage amplifier with a desired gain can be obtained
using direct connection between successive stages of
differential amplifiers.

 The advantage of direct coupling is that it removes the

lower cut off frequency imposed by the coupling
capacitors, and they are therefore, capable of amplifying
dc as well as ac input signals.
Numericals:
Based on DA design
D.C. Analysis
To obtain the
operating point
(ICC and VCEQ) for
differential amplifier
dc equivalent circuit is
drawn by reducing the
input voltages v1 and
v2 to zero

Figure 7: DC equivalent circuit of Dual Input

Balanced Output Differential Amplifier.
D.C. Analysis Contd….

The internal resistances of the input signals are

denoted by RS because RS1= RS2. Since both emitter
biased sections of the different amplifier are
symmetrical in all respects, therefore, the operating
point for only one section need to be determined.
The same values of ICQ and VCEQ can be used for
second transistor Q2.
D.C. Analysis Contd….
Applying KVL to the base emitter loop of the transistor Q1.

The emitter current in Q1 and Q2 are independent of collector

resistance RC.
D.C. Analysis Contd….
The voltage at the emitter of Q1 is approximately equal to
-VBE if the voltage drop across R is negligible.
Knowing the value of IC the voltage at the collector VCis
given by VC =VCC – IC RC
and VCE = VC – VE
= VCC – IC RC + VBE
VCE = VCC + VBE – ICRC -----(2)

From the two equations VCEQ and ICQ can be determined.

This dc analysis applicable for all types of differential
amplifier.
D.C. Analysis Contd….Numericals
The following specifications are given for the dual input, balanced-
output differential amplifier:
RC = 2.2 kΩ, RE = 4.7 kΩ, Rin 1 = Rin 2 = 50 Ω , +VCC = 10V, -VEE =
-10 V, βdc =100 and VBE = 0.715V.
Determine the operating points (ICQ and VCEQ) of the two
transistors.

The values of ICQ and VCEQ are same for both the
transistors.
Ac Analysis
re model
re=dynamic resistance between base and emitter junction
26 mV
re=

Rc Rc
Ad= (for balanced) Ad= (for unbalanced)
re re
Rin=2βac*re (balanced or unbalanced)
Ro=Rc (balanced or unbalanced)
Properties of the Differential Amplifier Circuit Configuration

Input Output
Configuration Circuit Voltage Gain
Resistance Resistance

Dual Input Ri1 = Ri2 =

Ad= RC/re R01 = R02 = Rc
Balanced Output 2βac re

Dual Input
Ri1 = Ri2 =
Unbalanced Ad= RC/2re R0 = Rc
2βac re
Output

Single Input
Ad= RC/re Ri = 2βac re R01 = R02 = Rc
Balanced Output

Single Input
Unbalanced Ad= RC/2re Ri = 2βac re R0 = Rc
Output
 Numerical:
The following specifications are given for the dual input, balanced-
output differential amplifier:
RC= 2.2 kΩ, RE= 4.7 kΩ, Rin 1 = Rin 2 = 50 Ω , +VCC = 10V, -VEE = -
10 V, βdc =100 and VBE = 0.715V.
Determine a) and Voltage Gain, b)Input Resistance,
c)Output Resistance, d)voltage gain
 VCEQ = VCC + VBE – ICRC
= 10+0.7-(0.989*2.2)
= 8.52 Volts

At room temp = 26mV, = /

Voltage gain = Ad= RC/re = 2200/25.3 = 86.96
Input Resistance Ri1 = Ri2 = 2βac re = 2 × 100 ×25.3
= 5.06 KΩ
The Output Resistance seen looking back into the circuit
from each of the two output terminals Ro1 = Ro2 = 2.2 KΩ
FET Differential Amplifiers
In the differential amplifier for very high input resistance, FETs can
be used instead of BJTs.
In FET following replacement has to be done for Voltage Gain, Input
Resistance and Output Resistance formulas of BJT.

The Voltage Gain of the JFET dual-input, balanced- output

differential amplifier is
Difference between BJT, FET and MOSFET
BJT FET MOSFET

Ri 2βac re RG RG

Ro RC RD RD

Gain (Adm) RC/2re -gm×RD -gm×RD

Datasheet of LM741
Datasheet of LF356
Datasheet of Op07
Differential Amplifier characteristics
•Inverting (-) and Noninverting inputs (+)
Rc
Vo =
re

•Common mode rejection ratio CMRR

Rc cm
A = Ac =
re
A
CMRR=
A
CMRR
Differential mode: out of phase input, no feedback, gain is
Rc
independent of RE , Ad =
re
Common mode: negative feedback, it reduces Ac Higher RE,
more is the negative feedback, so less is Ac
Ad
CMRR =
Ac

To increase CMRR , increase Ad , decrease Ac

Ad increase Rc power dissipation, size, space (so not a
feasible solution)

Ac increase RE but Q point is dependent on RE so Q point

will be shifted which is not desirable
To improve CMRR
The methods to improve CMRR:
1. To use constant current bias
2. To use current mirror circuit
3. To use active load
 Constant Current Bias
 To set up dc emitter current IE, the constant current bias circuit can be used.
 It provides current stabilization and assures a stable operating point for
differential amplifier.

 The resistance RE in
Figure7 is replaced
by constant current
transistor (Q3)
shown in Figure 9.
 The dc collector
current in Q3 is
established by
R1,R2, & RE.

Assures stable operating point

Figure 9: Dual Input Balanced Output Differential
Amplifier using Constant Current Bias
Constant Current Bias Contd…
Apply voltage divider rule, voltage at the base of Q3 is

Because the 2 halves of the DA are symmetrical,

each has half of the current IC3, is
Constant Current Bias Contd…
The collector current Ic3 in transistor Q3 is fixed &
must be invariant as no signal is injected into emitter
or base of Q3.
Thus Q3 is source of constant emitter current for Q1 &
Q2 of Differential Amplifier .
Constant Current bias also provides very high source
resistance
Since the ac equivalent of the dc current source is
open circuit.
Therefore the effective value of RE will become ∞, Ac
will be zero----CMRR will be ∞
Current Mirror:

Figure 12: Block Diagram of Current Mirror

Current Mirror is the circuit in which the output current

is forced to be equal to the input current.
The output current is a mirror image of the input current
It is used to set up constant emitter current in
Differential amplifier stages
Special case of Constant Current Bias
It requires fewer components than constant current
circuit
Because of its simplicity and ease of fabrication, most commonly used
Current Mirror Contd…
Q3 and Q4 are identical

Figure 13: Current Mirror Circuit

Current Mirror Contd…
Appling KVL to base-emitter section of Q3, we get
– I2 R2 – VBE3 + VEE = 0
Rearranging, We get
I2 = (VEE – VBE3)/R2
From equation it is clear that once the current I2 is set up, IC3(IO) is
automatically established to be nearly equal to I2
Cascade Differential Amplifier

Figure 14: Cascade Differential Amplifier

Cascade Differential Amplifier Contd…
In two stage differential amplifier shown in Figure 14, the first
stage is dual-input balanced-output and second stage is dual
input unbalanced output differential amplifier.
Second stage is driven by the output of the first stage differential
amplifier.
Both the stages use emitter biasing technique (the combination
of RE and VEE) to set up the emitter currents in the differential
amplifier.
for proper operation of the different stages the matching of the
transistors and resistors is essential.
Level Translator/Shifter
Because of the direct coupling, the dc level at the emitter rises
from stages to stage. This increase in dc level tends to shift the
operating point of the succeeding stages and therefore limits the
output voltage swing and may even distort the output signal.

e.g. In the cascade differential amplifier stage the voltage at

emitter of Q1 &Q2 is -0.715V and the voltage at emitter of Q3 & Q4
of the second stage is increased, it is 7.12V. Thus operating point
changes by cascading the differential amplifier.

The voltage at the output of the second stage is above the

Ground(0V), thus DC level shifts & therefore it limits the peak-to-
peak output voltage swing.
To shift the output dc level to zero, level translator or shifter
circuits are used. An emitter follower with voltage divider is the
simplest form of level translator as shown in Figure 15.

Thus a dc voltage at the base of Q produces 0V dc at the output.

It is decided by R1 and R2.

In this case, level shifter is common collector amplifier which

shifts the level by 0.7V. If this shift is not sufficient, the output
may be taken at the junction of two resistors in the emitter lead.
Level Shifter using Common Collector Configuration
• Emitter resistance RE is replaced by
O/p of 2nd voltage divider circuit shown in
stage of DA Figure 15.
• Voltage across R2 is adjusted such
that the shifted output tends to
zero.
• Apply KVL to input section
( Base-Emitter ) of transistor Q1.
• Vin – VBE – I (R1 + R2) = 0

Figure 15: Emitter follower with

voltage divider
Level Translator/Shifter Contd…

By proper selection of R1 and R2, we can control output voltage

level. For R2=0, Vo = 0
The major drawback of this circuit is ac signal level at the
output will be reduced by a factor along with dc shift.

Three level shifter are as follows:

1. Emitter follower with voltage divider
2. Emitter follower with constant current bias
3. Emitter follower with current mirror
Emitter follower with voltage divider is the simplest among three.
Level Translator/Shifter Contd…

Figure 16: Emitter follower Figure 17: Emitter follower with

with constant current bias current mirror

It is possible to replace R2 by constant current bias shown in Figure 16 &

current mirror shown in Figure 17, can adjust the value of IE in such a
way that output can be a zero dc voltage. Their presence does not reduce
amplitude of ac signal.
Output Stage:
 Input stages of an Op-Amp produces large gain but they have a
big output resistance also the gain stage of Op-Amp cannot
provide more than some tens of milliamp current. Therefore
the output stage (impedance separator) is included which
allows the connection of load without decrease in amplification.
 It is capable of supplying load current, voltage and low output
resistance.
 The output stage is generally a complementary push pull
amplifier.
 The output stage provides a low output resistance,
fairly high current load capabilities and high efficiency.
Output Stage Contd…
The o/p stage must satisfy following requirements:
1. Low o/p resistance
2. Large current sourcing capacity
3. Large o/p voltage swing
Types of o/p stages:
1. Simple complementary o/p stage
2. Complementary o/p stage with diode
Complementary Output Stage

Figure 18: Complementary Push Pull Class AB Amplifier

Q15 & Q16 will turn ON & OFF alternately. But due to dead band , crossover distortion
gets introduced which can be reduced by connecting 2 diodes between transistor bases.
Complementary Output Stage Contd…

Figure 20: Equivalent circuit of

Figure 19: Complimentary Emitter Complimentary Emitter
Follower with diodes(Class AB) Follower with diodes(Class AB)
Block Diagram of Op-Amp

Figure 4: Block diagram of Op-Amp

The operational amplifier is a direct-coupled high

gain amplifier usable from 0 to over 1MHz
Op-Amp Internal Structure

Figure 21: Op-Amp Internal Structure with Different Stages

Op-Amp 741 Internal Structure
741:
The 741 Op-Amp

 20 transistors, 11 resisitors, one frequency compensating capacitor differential

amplifier formed by Q1, Q2, Q3 and Q4.
 The bias current for the first stage is generated in the collector of Q10 from the
Widlar current source composed of Q10, Q11 and R4
 The current mirror formed by transistors Q8 and Q9 provide the bias current (IEE)
of the differential amplifier formed by Q1, Q2, Q3 and Q4.
https://coefs.uncc.edu/dlsharer/files/2012/04/G5.pdf
 The short circuit protection is provided by Q15, Q21, Q22, Q24, R6 and R7. The
function of this network is to limit the current in the output transistors – all to
prevent overheating and possible burnout of the IC
 Transistors Q5, Q6, and Q7 and resistors R1, R2, and R3 form the active load circuit
of the input stage.
 The intermediate stage of the 741 is composed of transistors Q13, Q16, Q17, and
resistors R8 and R9.
 The output of the intermediate stage is taken from the collector of Q17
 The capacitor C1 is in the feedback path of the intermediate stage to provide
frequency compensation
 The output stage of the 741 consists of transistors Q14, Q18, Q19, Q20, and Q23.
The input to the final stage is at Q23, which is configured as an emitter- follower
amplifier to minimize the loading effect of the output stage on the intermediate
stage.
 Transistors Q14 and Q20 are a complementary symmetry (push-pull) pair, or Class
AB amplifier
 some Op-Amps use Darlington pair complementary symmetry to increase the
output capability. The Darlington pair made up of Q18 and Q19 is fed by the
current source Q13 and is used to bias the output transistors Q14 and Q20. The
Darlington pair replaces the diodes in the diode-compensated complementary
symmetry output stage and is preferred over two individual transistors connected
as diodes since it can be fabricated in a smaller area.
 Practice Numerical

Q.1) For the Dual Input Unbalanced Output Differential Amplifier

Rc1 = Rc2 =8 KΩ , RE =4KΩ , RS1 = RS2 = 50Ω, dc = ac = 100 , VCC
= VEE = 10V and VBE = 0.7V.
Determine:
1) The DC parameters ICQ and VCEQ
2) The Voltage Gain
3) The input and output resistance

Q.2) Define CMRR and explain any one method to improve CMRR in
brief.