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Low Power VLSI Circuits and Systems

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0% found this document useful (0 votes)
6 views2 pages

Low Power VLSI Circuits and Systems

Uploaded by

Saranya
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Code: EC20APE703 R 20

B.Tech IV Year I Semester Supplementary Examinations May – 2024


LOW POWER VLSI CIRCUITS AND SYSTEMS
(Electronics & Communication Engineering)
Time: 3 hrs. Max Marks: 60
PART-A
(Compulsory Question)
1. Answer the following 05 x 02 = 10 Marks
a) Define sub-threshold swing. 2M
b) What are the disadvantages of resistive load inverters? 2M
c) What is Glitching power dissipation? 2M
d) What is Adaptive Voltage Scaling? 2M
e) List out the approaches for minimizing leakage power. 2M
PART-B
Answer All five Units 05 x 10 = 50 Marks
UNIT-I
2. a) Derive the expression for Ids in saturation and active region. 5M
b) What is the need for low-power VLSI chips? Explain the various sources of 5M
dynamic and static power dissipation.
OR
3. a) Effects of short channel length. 5M
b) Explain the three modes of operation of nMOS transistor. 5M
UNIT-II
4. a) Explain about Elmore delay. 5M
b) Design EX-OR gate using pass transistor logic. 5M
OR
5. a) Explain the operation of CMOS inverter with neat sketches. 5M
b) What is charge sharing problem? How can it be overcome? 5M
UNIT-III
6. a) Explain in detail the Monte Carlo method for estimating glitch power. 5M
b) What are the factors influencing the leakage current in deep sub-micrometer 5M
transistors?
OR
7. a) Briefly explain various sources of power dissipation. 5M
b) What is switching power dissipation? Explain How it can be minimized. 5M
UNIT-IV
8. a) Explain why voltage scaling is considered to be the most dominant approach to 5M
reduce switching power.
b) Explain Dynamic Voltage and Frequency scaling (DVFS). 5M
OR
9. a) What is multi-level voltage scaling (MVS) and Explain the challenges in MVS? 5M
b) Briefly explain various architectural approaches for low-power. 5M

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Code: EC20APE703 R 20
UNIT-V
10. a) Explain how a power management technique can be used to reduce total power 5M
dissipation.
b) Discuss various methods for the fabrication of MOS transistors with multiple 5M
threshold Voltages.
OR
11. a) Explain how standby power is reduced in the MTCMOS technique. Discuss its 5M
advantages and disadvantages.
b) What are the advantages and disadvantages of MTCMOS circuits. 5M
*****

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