I/O AND MEMORY

Input/Output Organization: Bus Structure - Bus Operation - Arbitration

Memory System: Basic Concepts - Semiconductor RAM Memories - Read-only Memories - Direct Memory
Access - Memory Hierarchy - Cache Memories - Performance Considerations - Virtual Memory - Memory
Management Requirements - Secondary Storage.

Bus:
• A bus is a communication system that carry data, addresses, and control signals between components
inside a computer or between computers. These components are linked to the bus, allowing them to
interact and collaborate effortlessly, and these all together are called bus architecture.
• The width (number of data lines), speed, and protocols of bus architectures can vary.
• A bus’s width refers to the number of parallel data lines it contains, which defines how much data can
be sent simultaneously. A wider bus offers faster data transfer but may require more physical
connections.

Bus Structure
• A system bus usually consists of a range of distinct lines, typically numbering from fifty to hundreds.
Each line is designated for a specific function, and these lines can be divided into three main functional
categories: data lines, address lines, and control lines. Figure shows the bus structure.

• There are three types of bus lines: Data bus, Address bus, and Control bus.
Communication over each bus line is performed in cooperation with another.
• The data bus is a signal line for exchanging the data between the CPU and the memory, and between
the CPU and I/O, and handles the data stored in the specified location.
The data exchanged includes numerical values for calculation, the calculation results, input signals
from external devices, and signals output to external devices.
• Data Bus: Carries the actual data being transferred. The width (number of bits) of the data bus
determines how much data can be transferred at once (e.g., 8-bit, 16-bit, 32-bit).
• The address bus is a signal line that specifies the location of the memory and I/O.
When exchanging data, it is necessary to specify the takeoff-destination of the data or the storage
destination of the data. The address bus specifies this location.
• Address Bus: Carries the addresses of where the data is stored in memory. The width of the address
bus determines how much memory can be addressed.
• The control bus is a signal line that specifies whether to read or write to the location specified by the
address bus. The memory and I/O specified on the address bus receive the data which sent on the data

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 bus when instructed "Write" by the control bus. When instructed "Read" by the control bus, the data
is output to the data bus.
• Control Bus: Carries control signals that manage the operations of the computer, including read/write
signals, interrupt requests, and clock signals.
• Figure shows Bus line type

Data Lines (DL)

• Data Lines (DL) are electrical channels or conductors within a computer’s bus architecture that are
specifically dedicated to transferring actual data between different computer system components.
• These lines carry binary information in the form of digital signals, such as numbers, instructions, and
other data.
• Data lines facilitate parallel data transfer, meaning multiple bits of data can be sent simultaneously.
• Each data line can only transmit one bit at a time. For example, a computer system with a 32-bit data
bus can transfer 32 bits of data in parallel.
Address Lines (AL)
• An address line is a collection of electrical channels or conductors within a computer’s bus
architecture specifically designated to carry memory addresses.
• These lines indicate the source or destination of data during memory read and write operations.
• The number of address lines in the address bus impacts the range of memory addresses that the
computer system may access.
• The bus module is determined by the higher-order bits, while the address of memory locations or I/O
ports is determined by the lower-order bits.
• When the processor needs to read a word from memory, it simply places the relevant word’s address
on the address line.
Control Lines (CL)
• In bus architecture, control lines are specific lines that transmit control signals between different
computer system components.
• These control signals coordinate and govern the flow of data and instructions between various
hardware components, ensuring that actions are carried out in the correct order, and the overall system
runs smoothly.
• Control lines act as communication channels for signals that control the behaviour of the computer’s
internal components, such as the central processor unit (CPU), memory modules, input/output
devices, and other peripherals.
• These signals are required for memory read and write operations, input/output operations, interrupts,
and other control activities.
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 • Some common control signals transmitted through control lines are as follows:
Control Signal Description

Memory Write This command moves the data on the data bus to the addressed memory location.

Memory Read This instruction sends the data from the addressed memory location to the data bus.

I/O Read Enabling this control line sends data from the addressed I/O port to the data bus.

When a command is sent over this control line, data from the data bus is sent to the
I/O Write
designated I/O port.

The activation of this control line signifies that the component has signalled its desire to
Bus Request
take control of the bus.

The activation of this control line signifies that the bus has been allocated to the
Bus Grant
component that made the request.

Transfer ACK This control line indicates that data has been received or placed on the data bus.

Interrupt
This control line indicates that there are pending interrupts.
Request

Interrupt ACK When the pending interrupt is serviced, this control line acknowledges it.

Reset This control line’s bit information initializes all modules.

Single Bus Structure

• In a single bus structure, one common bus is used to communicate between peripherals and processors.
Advantages of Single Bus Structure
• Simplicity: The design is simplistic in nature and hence is easy to roll out and even administer.
• Cost-Effective: It is more expensive to have a large number of buses and wiring to power the smart
grids, so fewer buses and less wiring leads to least expensive system.
• Ease of Maintenance: Since there are fewer components that are generally involved, it is easier to
diagnose and even rectify any problems that may exist.
Disadvantages of Single Bus Structure
• Bandwidth Limitation: Because all the components feed off this bus, the rate at which data is
transferred is rather slow and therefore creates a bottleneck.
• Slower Performance: This is because when many components in the computer request access to the
central processing unit or the RAM at the same time then the system slows down.

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Double Bus Structure
• In a double bus structure, one bus is used to fetch instructions while other is used to fetch data, required
for execution. It is to overcome the bottleneck of a single bus structure.
• In Multiple bus structure, it allows multiple communications to occur simultaneously.

Advantages of Double Bus Structure

• Improved Performance: The efficiency is improved because the system can manage more data at
once since it consists of two buses which are one for memory and the other for I/O.
• Better Bandwidth Utilization: Every bus can work on its own which will help to decrease the traffic
and increase the speed of data exchange.
• Scalability: The system can be expanded more easily, as the two buses can accommodate more
components without significant performance degradation.
Disadvantages of Double Bus Structure
• Increased Complexity: The design is slightly cumbersome requiring several parts which have to be
fitted properly.
• Higher Cost: The major drawbacks of more buses and wiring are that it brings about an overall
increase in the cost of the system.
• Challenging Maintenance: Identifying problems becomes even more challenging mainly because of
the numerous parts and contact points.

Differences between Single Bus and Double Bus Structures:

S. No. Single Bus Structure Double Bus Structure

The same bus is shared by three units The two independent buses link various units
1.
(Memory, Processor, and I/O units). together.

One common bus is used for communication Two buses are used, one for communication from
2.
between peripherals and processors. peripherals and the other for the processor.

Here, the I/O bus is used to connect I/O units and

The same memory address space is utilized
3. processor and other one, memory bus is used to
by I/O units.
connect memory and processor.

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S. No. Single Bus Structure Double Bus Structure

Instructions and data both are transferred in Instructions and data both are transferred in
4.
same bus. different buses.

5. Its performance is low. Its performance is high.

6. The cost of a single bus structure is low. The cost of a double bus structure is high.

7. Number of cycles for execution is more. Number of cycles for execution is less.

8. Execution of the process is slow. Execution of the process is fast.

9. Number of registers associated are less. Number of registers associated are more.

At a time, single operand can be read from

10. At a time two operands can be read.
the bus.

Advantages- Advantages-
11. • Less expensive • Better performance
• Simplicity • Improves Efficiency

Bus Operations
• Read Operation:
• The CPU places the address of the memory location on the address bus.
• The control bus sends a read signal.
• The addressed memory unit places the data on the data bus.
• The CPU reads the data from the data bus.
• Write Operation:
• The CPU places the address of the memory location on the address bus.
• The CPU places the data to be written on the data bus.
• The control bus sends a write signal.
• The memory unit stores the data from the data bus at the specified address.
• Block transfer operations
• Read or write several contiguous memory locations
• Example Cache line fill
• Interrupt operations

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 • We can transfer this information using three different modes of transfer.
1. Programmed I/O
2. Interrupt- initiated I/O
3. Direct Memory Access (DMA)

1. Programmed I/O
• Programmed I/O uses the I/O instructions written in the computer program. The instructions in the
program initiate every data item transfer.
• Usually, the data transfer is from a memory and CPU register. This case requires constant monitoring
by the peripheral device's CPU.
Advantages:
• Programmed I/O is simple to implement.
• It requires very little hardware support.
• CPU checks status bits periodically.

Disadvantages:
• The processor has to wait for a long time for the I/O module to be ready for either transmission or
reception of data.
• The performance of the entire system is severely degraded.

2. Interrupt-initiated I/O
• In the above section, we saw that the CPU is kept busy unnecessarily. We can avoid this situation by
using an interrupt-driven method for data transfer.
• The interrupt facilities and special commands inform the interface for issuing an interrupt request
signal as soon as the data is available from any device. In the meantime, the CPU can execute other
programs, and the interface will keep monitoring the I/O device.
• Whenever it determines that the device is ready for transferring data interface initiates an interrupt
request signal to the CPU.
• As soon as the CPU detects an external interrupt signal, it stops the program it was already executing,
branches to the service program to process the I/O transfer, and returns to the program it was initially
running.
Working of CPU in terms of interrupts:
• CPU issues read command.
• It starts executing other programs.
• Check for interruptions at the end of each instruction cycle.
• On interruptions: -
o Process interrupt by fetching data and storing it.
• Starts working on the program it was executing.
Advantages:
• It is faster and more efficient than Programmed I/O.
• It requires very little hardware support.
• CPU does not check status bits periodically.
Disadvantages:
• It can be tricky to implement if using a low-level language.
• It can be tough to get various pieces of work well together.
• The hardware manufacturer / OS maker usually implements it, e.g., Microsoft.

3. Direct Memory Access (DMA)

• The data transfer between any fast storage media like a memory unit and a magnetic disk gets limited
with the speed of the CPU. Thus, it will be best to allow the peripherals to directly communicate with
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 the storage using the memory buses by removing the intervention of the CPU. This mode of transfer
of data technique is known as Direct Memory Access (DMA).
• During Direct Memory Access, the CPU is idle and has no control over the memory buses. The DMA
controller takes over the buses and directly manages data transfer between the memory unit and I/O
devices.

CPU Bus Signal for DMA transfer

• Bus Request - We use bus requests in the DMA controller to ask the CPU to relinquish the control
buses.
• Bus Grant - CPU activates bus grant to inform the DMA controller that DMA can take control of the
control buses. Once the control is taken, it can transfer data in many ways.
Types of DMA transfer using DMA controller:
• Burst Transfer: In this transfer, DMA will return the bus control after the complete data transfer. A
register is used as a byte count, which decrements for every byte transfer, and once it becomes zero,
the DMA Controller will release the control bus. When the DMA Controller operates in burst mode,
the CPU is halted for the duration of the data transfer.
• Cyclic Stealing: It is an alternative method for data transfer in which the DMA controller will transfer
one word at a time. After that, it will return the control of the buses to the CPU. The CPU operation is
only delayed for one memory cycle to allow the data transfer to “steal” one memory cycle.
Advantages
• It is faster in data transfer without the involvement of the CPU.
• It improves overall system performance and reduces CPU workload.
• It deals with large data transfers, such as multimedia and files.
Disadvantages
• It is costly and complex hardware.
• It has limited control over the data transfer process.
• Risk of data conflicts between CPU and DMA.

Bus Arbitration
• Bus arbitration refers to the process used to control access to a shared communication bus among
multiple devices or components, such as CPUs, memory units, and input/output devices.
• Since only one device can use the bus at any given time to avoid data collisions, arbitration schemes
determine which device gets access to the bus based on specific criteria.
• There are two main types of bus arbitration:
1. Centralized Arbitration: A single arbiter (controller) manages access. Devices send requests to the
arbiter, which grants permission to one device at a time, often using a priority scheme.

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 2. Distributed Arbitration: Each device participates in the arbitration process. Devices communicate
directly with each other to negotiate bus access, which can reduce bottlenecks associated with a
centralized arbiter.
Common arbitration methods include:
• Fixed Priority: Devices are assigned static priorities; higher priority devices get access first.
• Round Robin: Each device gets a turn in a cyclic manner, ensuring fair access.
• Random: A device is selected randomly, which can be simpler but may lead to uneven access.

• Effective bus arbitration is crucial for system performance and ensuring fair access among devices.

Methods of Centralized BUS Arbitration:

There are three bus arbitration methods:
(i) Daisy Chaining method:
• It is a simple and cheaper method where all the bus masters use the same line for making bus requests.
• The bus grant signal serially propagates through each master until it encounters the first one that is
requesting access to the bus. This master blocks the propagation of the bus grant signal; therefore, any
other requesting module will not receive the grant signal and hence cannot access the bus.
• During any bus cycle, the bus master may be any device – the processor or any DMA controller unit,
connected to the bus.

Advantages:
• Simplicity and Scalability.
• The user can add more devices anywhere along the chain, up to a certain maximum value.
Disadvantages:
• The value of priority assigned to a device depends on the position of the master bus.
• Propagation delay arises in this method.
• If one device fails then the entire system will stop working.

(ii) Polling or Rotating Priority method:

• In this, the controller is used to generate the address for the master (unique priority), the number of
address lines required depends on the number of masters connected in the system.
• The controller generates a sequence of master addresses. When the requesting master recognizes its
address, it activates the busy line and begins to use the bus.

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Advantages –
• This method does not favour any particular device and processor.
• The method is also quite simple.

Disadvantages –
• Adding bus masters is difficult as increases the number of address lines of the circuit.

(iii) Fixed priority or Independent Request method:

• In this, each master has a separate pair of bus request and bus grant lines and each pair has a priority
assigned to it.
• The built-in priority decoder within the controller selects the highest priority request and asserts the
corresponding bus grant signal.

Advantages
• This method generates a fast response.
Disadvantages
• Hardware cost is high as a large no. of control lines is required.

Distributed BUS Arbitration:

• In this, all devices participate in the selection of the next bus master.
• Each device on the bus is assigned a 4bit identification number.
• The priority of the device will be determined by the generated ID.

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Bus Standards
Various standards define bus protocols and physical characteristics:
• PCI (Peripheral Component Interconnect): A popular standard for connecting peripherals.
• USB (Universal Serial Bus): Used for connecting a wide variety of devices.
• I2C, SPI: Protocols for connecting lower-speed peripherals.
Bus Topology
• Parallel Bus: Multiple lines carry data simultaneously, which can lead to faster data transfer but may
have issues like signal degradation over distance.
• Serial Bus: Data is transferred one bit at a time over a single line, which can be slower but is simpler
and often more reliable over longer distances.
Bus Speed
• Bus speed is determined by the clock rate and the width of the bus.
• Faster buses can move more data in the same amount of time.

Memory System:
Basic Concepts
• A computer is an electronic device and that accepts data, processes on that data, and gives the desired
output. It performs programmed computation with accuracy and speed.
• Or in other words, the computer takes data as input and stores the data/instructions in the memory.
After processes the data, it converts into information. Finally, gives the output.
• Memory is fundamental for data storage and retrieval.

Semiconductor RAM Memories

• A type of electronic memory known as semiconductor memory stores digital data by making use of
semiconductor materials, most commonly silicon.
• Data is stored in binary format in this memory, with “1s” and “0s” representing electrical charges.
• It is the essential sort of memory utilized in PCs, cell phones, and other electronic gadgets.
• Semiconductor RAM (Random Access Memory) is a type of volatile memory that uses semiconductor
technology to store data temporarily while a computer is powered on.

1. Types of Semiconductor RAM

a. Static RAM (SRAM)
• Structure: Uses bistable latching circuitry (flip-flops) to store each bit.
• Speed: Faster than DRAM; suitable for cache memory.
• Volatility: Volatile; data is lost when power is off.
• Density: Lower density compared to DRAM, resulting in higher cost per bit.
• Use Cases: Cache memory (L1, L2, L3), high-speed applications.

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b. Dynamic RAM (DRAM)
• Structure: Stores each bit in a capacitor and a transistor; requires periodic refreshing to maintain data.
• Speed: Slower than SRAM; suited for main memory.
• Volatility: Volatile; data is lost when power is off.
• Density: Higher density than SRAM, leading to lower cost per bit.
• Use Cases: Main memory in computers, laptops, and servers.
2. Subtypes of DRAM
• Synchronous DRAM (SDRAM): Operates in sync with the system clock, improving performance.
• Double Data Rate SDRAM (DDR SDRAM): Transfers data on both the rising and falling edges of
the clock signal, effectively doubling the data rate. Variants include DDR, DDR2, DDR3, DDR4, and
DDR5.
• Graphics DRAM (GDDR): Optimized for graphics processing, with higher bandwidth suitable for
GPUs.
• Low-Power DRAM (LPDRAM): Designed for mobile devices, focusing on power efficiency.

3. Key Concepts
a. Memory Cell
• The fundamental building block of RAM, consisting of a storage element (like a capacitor for DRAM)
and a control element (like a transistor).
b. Refresh Cycle
• In DRAM, the process of recharging the capacitors to prevent data loss, as the charge can dissipate
over time.
c. Access Time
• The time taken to read or write data to the memory cell.
d. Latency
• The delay between the request for data and the delivery of that data. Lower latency is crucial for
performance.
e. Capacity
• Refers to the amount of data that can be stored, typically measured in gigabytes (GB) or terabytes
(TB).
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4. Applications
• SRAM: Often used for cache in CPUs and other high-speed applications.
• DRAM: Predominantly used as the main memory in personal computers, servers, and mobile devices.

Advantages of Semiconductor Memory

• High Speed: Fast data retrieval from semiconductor memory enables responsive performance and
smooth operation. Applications like gaming, real-time video, and online transaction all depend on this.
• Low power consumption: Compared to other types of memory, such as magnetic storage,
semiconductor memory is very energy efficient. This is important for laptops and mobile devices, as
it extends battery life.
• High storage density: Semiconductor memory can pack an enormous measure of information into a
minuscule space. Because of this, it is ideal for high-performance computing systems and portable
devices like smartphones and tablets where space is at a premium.
• Scalability: Semiconductor memory innovation can be effortlessly scaled to satisfy the rising needs
of registering.
• Non-volatile (except for RAM): Non-volatile semiconductor memory, such as read-only memory
(ROM) and flash memory, stores data even when the power is turned off. Because of this, they are
excellent for storing long-term data like operating systems and firmware.

Disadvantages of Semiconductor Memory

• Volatile (for RAM): When the power is turned off, data stored in traditional RAM are lost.
• Can be much expensive: When compared to other types of storage, such as hard disk drives, high-
performance or large-capacity semiconductor memory can be expensive.
• Limited lifespan (for Flash memory): Flash memory has a set number of compose cycles before it
breaks down. As a result, flash memory devices will eventually require replacement.
• Security issues: Semiconductor memory can be helpless against information breaks and hacking. This
is due to the fact that the data is stored electronically and can be accessed in the event that the device
is hacked.
• Effect on the Environment: The process of manufacturing semiconductor memory chips can be
resource-intensive and harmful to the environment. However, efforts are being made to develop
production methods that are more environmentally friendly.

Applications of Semiconductor Memory

Semiconductor memory is used in a wide variety of applications, including:
• Digital Cameras: Used for storing photographs and recordings.
• Smartphones: Used for storing applications, music, photos and other valuable information.
• Computers: Used for storing program instruction and working data.
• USB drivers: Used for storing potable data storage.
• Solid state drive (SSD): Used for high-performance storage in computers.
• MP3 Player: Used to store music.

Read-only Memories
• ROM stands for Read-Only Memory.
• It is a non-volatile memory that is used to store important information which is used to operate the
system.
• As its name refers to read-only memory, we can only read the programs and data stored on it. It is also
a primary memory unit of the computer system. The information is stored in the ROM in binary
format. It is also known as permanent memory.

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Block Diagram of ROM
• As shown in below diagram, there are k input lines and n output lines in it.
• The input address from which we wish to retrieve the ROM content is taken using the k input lines.
Since each of the k input lines can have a value of 0 or 1, there are a total of 2 k addresses that can be
referred to by these input lines, and each of these addresses contains n bits of information that is output
from the ROM.
• A ROM of this type is designated as a 2k x n ROM.

Block Diagram of ROM

Internal Structure of ROM
The internal structure of ROM has two basic components.
• Decoder
• OR gates

Internal Structure of ROM

• A circuit known as a decoder converts an encoded form, such as binary coded decimal, or BCD, into
a decimal form.
• As a result, the output is the binary equivalent of the input. The outputs of the decoder will be the
output of every OR gate in the ROM.
• Let’s use a 64 x 4 ROM as an example. This read-only memory has 64 words with a 4-bit length. As a
result, there would be four output lines. Since there are only six input lines and there are 64 words in
this ROM, we can specify 64 addresses or minimum terms by choosing one of the 64 words that are
available on the output lines from the six input lines. Each address entered has a unique selected word.

Working of ROM
• A small, long-lasting battery within the computer powers the ROM, which is made up of two primary
components: the OR logic gates and the decoder.

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 • In ROM, the decoder receives binary input and produces decimal output. The decoder’s decimal output
serves as the input for ROM’s OR gates.
• ROM chips have a grid of columns and rows that may be switched on and off. If they are turned on,
the value is 1, and the lines are connected by a diode. When the value is 0, the lines are not connected.
Features of ROM
• ROM is a non-volatile memory & Information stored in ROM is permanent.
• Information and programs stored on it, we can only read and cannot modified.
• Information and programs are stored on ROM in binary format.
• It is used in the start-up process of the computer.

Types of Read-Only Memory (ROM)

Now we will discuss the types of ROM one by one:
1. MROM (Masked read-only memory): We know that ROM is as old as semiconductor technology.
MROM was the very first ROM that consists of a grid of word lines and bit lines joined together
transistor switches. This type of ROM data is physically encoded in the circuit and only be
programmed during fabrication. It was not so expensive.
2. PROM (Programmable read-only memory): PROM is a form of digital memory. In this type of
ROM, each bit is locked by a fuse or anti-fuse. The data stored in it are permanently stored and can
not be changed or erasable. It is used in low-level programs such as firmware or microcode.
3. EPROM (Erasable programmable read-only memory): EPROM also called EROM, is a type of
PROM but it can be reprogrammed. The data stored in EPROM can be erased and reprogrammed again
by ultraviolet light. Reprogrammed of it is limited. Before the era of EEPROM and flash memory,
EPROM was used in microcontrollers.
4. EEPROM (Electrically erasable programmable read-only memory): As its name refers, it can be
programmed and erased electrically. The data and program of this ROM can be erased and programmed
about ten thousand times. The duration of erasing and programming of the EEPROM is near about
4ms to 10ms. It is used in microcontrollers and remote keyless systems.
Advantages of ROM
• It is cheaper than RAM and it is non-volatile memory.
• It is more reliable as compared to RAM.
• Its circuit is simple as compared to RAM.
• It doesn’t need refreshing time because it is static.
• It is easy to test.
Disadvantages of ROM
• It is a read-only memory, so it cannot be modified.
• It is slower as compared to RAM.
Difference Between RAM and ROM
RAM ROM

RAM stands for Random Access Memory. ROM stands for Read Only Memory.

Data in ROM cannot modify or erased, you can

You can modify, edit or erase data in RAM.
only read data of ROM.

RAM is a volatile memory that stores data as long as ROM is a non-volatile memory that retain data
power supply is given. even after the power is turned off.

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 RAM ROM

Speed of RAM is more than speed of ROM. ROM is slower than RAM.

RAM is costly as compared to ROM. ROM is cheap as compared to RAM.

A RAM chip can store only a few gigabytes (GB) of A ROM chip can store multiple megabytes (MB)
data. of data.

CPU can easily access data stored in RAM. CPU cannot easily access data stored in ROM.

RAM is used for the temporary storage of data ROM is used to store firmware, BIOS, and other
currently being processed by the CPU. data that needs to be retained.

Direct Memory Access

• DMA Controller is a hardware device that allows I/O devices to directly access memory with less
participation of the processor.
• Direct Memory Access uses hardware for accessing the memory, that hardware is called a DMA
Controller.
• It has the work of transferring the data between Input Output devices and main memory with very less
interaction with the processor.
• The direct Memory Access Controller is a control unit, which has the work of transferring data.
DMA Controller Diagram in Computer Architecture
• DMA Controller is a type of control unit that works as an interface for the data bus and the I/O Devices.
• As mentioned, DMA Controller has the work of transferring the data without the intervention of the
processors, processors can control the data transfer.
• DMA Controller also contains an address unit, which generates the address and selects an I/O device
for the transfer of data. Here we are showing the block diagram of the DMA Controller.

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Working of DMA Controller
The DMA controller registers have three registers as follows.
• Address register – It contains the address to specify the desired location in memory.
• Word count register – It contains the number of words to be transferred.
• Control register – It specifies the transfer mode.
• Note: All registers in the DMA appear to the CPU as I/O interface registers. Therefore, the CPU can
both read and write into the DMA registers under program control via the data bus.
• The figure below shows the block diagram of the DMA controller. The unit communicates with the
CPU through the data bus and control lines.
• Through the use of the address bus and allowing the DMA and RS register to select inputs, the register
within the DMA is chosen by the CPU. RD and WR are two-way inputs.
• When BG (bus grant) input is 0, the CPU can communicate with DMA registers. When BG (bus grant)
input is 1, the CPU has relinquished the buses and DMA can communicate directly with the memory.

Working Diagram of DMA Controller

Explanation:
The CPU initializes the DMA by sending the given information through the data bus.
• The starting address of the memory block where the data is available (to read) or where data are to be
stored (to write).
• It also sends word count which is the number of words in the memory block to be read or written.
• Control to define the mode of transfer such as read or write.
• A control to begin the DMA transfer

Modes of Data Transfer in DMA

There are two modes of data transfer in DMA that are described below.
• Burst Transfer: In this transfer, DMA will return the bus control after the complete data transfer. A
register is used as a byte count, which decrements for every byte transfer, and once it becomes zero,
the DMA Controller will release the control bus. When the DMA Controller operates in burst mode,
the CPU is halted for the duration of the data transfer.

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 • Cyclic Stealing: It is an alternative method for data transfer in which the DMA controller will transfer
one word at a time. After that, it will return the control of the buses to the CPU. The CPU operation is
only delayed for one memory cycle to allow the data transfer to “steal” one memory cycle.
• Examples: 8237IC DMA & 8257 IC DMA

Advantages of DMA Controller

• Data Memory Access speeds up memory operations and data transfer.
• CPU is not involved while transferring data.
• DMA requires very few clock cycles while transferring data.
• DMA distributes workload very appropriately.
• DMA helps the CPU in decreasing its load.
Disadvantages of DMA Controller
• Direct Memory Access is a costly operation because of additional operations.
• DMA Controller increases the overall cost of the system.
• DMA Controller increases the complexity of the software.

Memory Hierarchy
• Memory Hierarchy is an enhancement to organize the memory such that it can minimize the access
time.
• The Memory Hierarchy was developed based on a program behaviour known as locality of references.
The figure below clearly demonstrates the different levels of the memory hierarchy.

• There are multiple levels present in the memory, each one having a different size, different cost, etc.
• Some types of memory like cache, and main memory are faster as compared to other types of memory
but they are having a little less size and are also costly whereas some memory has a little higher storage
value, but they are a little slower.
• Accessing of data is not similar in all types of memory, some have faster access whereas some have
slower access.

Types of Memory Hierarchy

This Memory Hierarchy Design is divided into 2 main types:
• External Memory or Secondary Memory: Comprising of Magnetic Disk, Optical Disk, and
Magnetic Tape i.e. peripheral storage devices which are accessible by the processor via an I/O Module.
• Internal Memory or Primary Memory: Comprising of Main Memory, Cache Memory & CPU
registers. This is directly accessible by the processor.

17
Memory Hierarchy Design
1. Registers
• Registers are small, high-speed memory units located in the CPU.
• They are used to store the most frequently used data and instructions.
• Registers have the fastest access time and the smallest storage capacity, typically ranging from 16 to
64 bits.
2. Cache Memory
• Cache memory is a small, fast memory unit located close to the CPU.
• It stores frequently used data and instructions that have been recently accessed from the main memory.
• Cache memory is designed to minimize the time it takes to access data by providing the CPU with
quick access to frequently used data.
3. Main Memory
• Main memory, also known as RAM (Random Access Memory), is the primary memory of a computer
system.
• It has a larger storage capacity than cache memory, but it is slower.
• Main memory is used to store data and instructions that are currently in use by the CPU.
Types of Main Memory
• Static RAM: Static RAM stores the binary information in flip flops and information remains valid
until power is supplied. It has a faster access time and is used in implementing cache memory.
• Dynamic RAM: It stores the binary information as a charge on the capacitor. It requires refreshing
circuitry to maintain the charge on the capacitors after a few milliseconds. It contains more memory
cells per unit area as compared to SRAM.
4. Secondary Storage
• Secondary storage, such as hard disk drives (HDD) and solid-state drives (SSD), is a non-volatile
memory unit that has a larger storage capacity than main memory.
• It is used to store data and instructions that are not currently in use by the CPU.
• Secondary storage has the slowest access time and is typically the least expensive type of memory in
the memory hierarchy.
5. Magnetic Disk
• Magnetic Disks are simply circular plates that are fabricated with either a metal or a plastic or a
magnetized material.
• The Magnetic disks work at a high speed inside the computer and these are frequently used.
6. Magnetic Tape
• Magnetic Tape is simply a magnetic recording device that is covered with a plastic film.
• It is generally used for the backup of data.
• In the case of a magnetic tape, the access time for a computer is a little slower and therefore, it requires
some amount of time for accessing the strip.
Characteristics of Memory Hierarchy
• Capacity: As we move from top to bottom in the Hierarchy, the capacity increases.
• Access Time: It is the time interval between the read/write request and the availability of the data. As
we move from top to bottom in the Hierarchy, the access time increases.
• Cost Per Bit: As we move from bottom to top in the Hierarchy, the cost per bit increases i.e. Internal
Memory is costlier than External Memory.
Advantages of Memory Hierarchy
• It helps in removing some destruction, and managing the memory in a better way.
• It helps in spreading the data all over the computer system.
• It saves the consumer’s price and time.
System-Supported Memory Standards
According to the memory Hierarchy, the system-supported memory standards are defined below:

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 Secondary
Name Register Cache Main Memory
Memory

Size <1 KB less than 16 MB <16GB >100 GB

DRAM (capacitor
Implementation Multi-ports On-chip/SRAM Magnetic
memory)

Access Time 0.25ns to 0.5ns 0.5 to 25ns 80ns to 250ns 50 lakh ns

20000 to 1 lakh
Bandwidth 5000 to 15000 1000 to 5000 20 to 150
MB

Operating
Managed by Compiler Hardware Operating System
System

Backing from Main from Secondary

From cache -
Mechanism Memory Memory

Cache Memories
• Cache memory is a small, high-speed storage area in a computer.
• The cache is a smaller and faster memory that stores copies of the data from frequently used main
memory locations.
• Cache memory is much faster than the main memory (RAM). When the CPU needs data, it first checks
the cache. If the data is there, the CPU can access it quickly. If not, it must fetch the data from the
slower main memory.
Characteristics of Cache Memory
• Cache memory is an extremely fast memory type that acts as a buffer between RAM and the CPU.
• Cache Memory holds frequently requested data and instructions so that they are immediately available
to the CPU when needed.
• Cache memory is costlier than main memory or disk memory but more economical than CPU registers.
• Cache Memory is used to speed up and synchronize with a high-speed CPU.
• Figure show the Cache memory

Cache Performance
When the processor needs to read or write a location in the main memory, it first checks for a corresponding
entry in the cache.
• If the processor finds that the memory location is in the cache, a Cache Hit has occurred and data is
read from the cache.

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 • If the processor does not find the memory location in the cache, a cache miss has occurred. For a cache
miss, the cache allocates a new entry and copies in data from the main memory, then the request is
fulfilled from the contents of the cache.
• The performance of cache memory is frequently measured in terms of a quantity called Hit ratio.
Hit Ratio(H) = hit / (hit + miss) = no. of hits / total accesses
Miss Ratio = miss / (hit + miss) = no. of miss / total accesses = 1 - hit ratio(H)
• We can improve Cache performance using higher cache block size, and higher associativity, reduce
miss rate, reduce miss penalty, and reduce the time to hit in the cache.
Cache Mapping
There are three different types of mapping used for the purpose of cache memory which is as follows:
• Direct Mapping
• Associative Mapping
• Set-Associative Mapping
1. Direct Mapping
• The simplest technique, known as direct mapping, maps each block of main memory into only one
possible cache line. or In Direct mapping, assign each memory block to a specific line in the cache.
• If a line is previously taken up by a memory block when a new block needs to be loaded, the old block
is trashed. An address space is split into two parts index field and a tag field.
• The cache is used to store the tag field whereas the rest is stored in the main memory.
• Direct mapping`s performance is directly proportional to the Hit ratio.
i =j modulo m
where
i= cache line number
j = main memory block number
m = number of lines in the cache

20
2. Associative Mapping
• In this type of mapping, associative memory is used to store the content and addresses of the memory
word.
• Any block can go into any line of the cache. This means that the word id bits are used to identify which
word in the block is needed, but the tag becomes all of the remaining bits. This enables the placement
of any word at any place in the cache memory.
• It is considered to be the fastest and most flexible mapping form. In associative mapping, the index
bits are zero.

3. Set-Associative Mapping
• This form of mapping is an enhanced form of direct mapping where the drawbacks of direct mapping
are removed.
• Set associative addresses the problem of possible thrashing in the direct mapping method. It does this
by saying that instead of having exactly one line that a block can map to in the cache, we will group a
few lines together creating a set.
• Then a block in memory can map to any one of the lines of a specific set.
• Set-associative mapping allows each word that is present in the cache can have two or more words in
the main memory for the same index address.
• Set associative cache mapping combines the best of direct and associative cache mapping techniques.
• In set associative mapping the index bits are given by the set offset bits. In this case, the cache consists
of a number of sets, each of which consists of a number of lines.

Relationships in the Set-Associative Mapping can be defined as:

21
 m=v*k
i= j mod v
where
i = cache set number
j = main memory block number
v = number of sets
m = number of lines in the cache number of sets
k = number of lines in each set

Application of Cache Memory

Here are some of the applications of Cache Memory.
• Primary Cache: A primary cache is always located on the processor chip. This cache is small and its
access time is comparable to that of processor registers.
• Secondary Cache: Secondary cache is placed between the primary cache and the rest of the memory.
It is referred to as the level 2 (L2) cache. Often, the Level 2 cache is also housed on the processor chip.
• Locality of reference is a concept in computer science that describes how programs tend to access a
relatively small, localized set of memory locations repeatedly over time. This principle can be broken
down into two types:
• Temporal Locality: If a particular memory location is accessed, it's likely to be accessed again
soon. For example, a loop that repeatedly accesses the same variables exhibits temporal
locality.
• Spatial Locality: If a memory location is accessed, it's likely that nearby memory locations
will be accessed soon after. This is often seen in array processing, where elements are accessed
in sequence.
Advantages
• Cache Memory is faster in comparison to main memory and secondary memory.
• Programs stored by Cache Memory can be executed in less time.
• The data access time of Cache Memory is less than that of the main memory.
• Cache Memory stored data and instructions that are regularly used by the CPU, therefore it increases
the performance of the CPU.

22
Disadvantages
• Cache Memory is costlier than primary memory and secondary memory .
• Data is stored on a temporary basis in Cache Memory.
• Whenever the system is turned off, data and instructions stored in cache memory get destroyed.
• The high cost of cache memory increases the price of the Computer System.

Performance Considerations
Performance refers to the speed and efficiency at which a computer system can execute tasks and
process data. A high-performing computer system is one that can perform tasks quickly and efficiently while
minimizing the amount of time and resources required to complete these tasks.
There are several factors that can impact the performance of a computer system, including:
• Processor speed: The speed of the processor, measured in GHz (gigahertz), determines how quickly
the computer can execute instructions and process data.
• Memory: The amount and speed of the memory, including RAM (random access memory) and cache
memory, can impact how quickly data can be accessed and processed by the computer.
• Storage: The speed and capacity of the storage devices, including hard drives and solid-state drives
(SSDs), can impact the speed at which data can be stored and retrieved.
• I/O devices: The speed and efficiency of input/output devices, such as keyboards, mouse, and
displays, can impact the overall performance of the system.
• Software optimization: The efficiency of the software running on the system, including operating
systems and applications, can impact how quickly tasks can be completed.
Improving the performance of a computer system typically involves optimizing one or more of these factors
to reduce the time and resources required to complete tasks. This can involve upgrading hardware components,
optimizing software, and using specialized performance-tuning tools to identify and address bottlenecks in the
system.

Computer performance is the amount of work accomplished by a computer system. It basically depends on
the response time, throughput, and execution time of a computer system. Response time is the time from the
start to completion of a task. This also includes:
• Operating system overhead.
• Waiting for I/O and other processes
• Accessing disk and memory
• Time spent executing on the CPU or execution time.
Throughput is the total amount of work done in a given time. CPU execution time is the total time a CPU
spends computing on a given task. It also excludes time for I/O or running other programs. This is also referred
to as simply CPU time. Performance is determined by execution time as performance is inversely proportional
to execution time.
Performance = (1 / Execution time)
And,
(Performance of A / Performance of B)
= (Execution Time of B / Execution Time of A)

If given that Processor A is faster than processor B, that means execution time of A is less than that of execution
time of B. Therefore, performance of A is greater than that of performance of B. Example – Machine A runs
a program in 100 seconds, Machine B runs the same program in 125 seconds
(Performance of A / Performance of B)
= (Execution Time of B / Execution Time of A)
= 125 / 100 = 1.25
That means machine A is 1.25 times faster than Machine B.

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And, the time to execute a given program can be computed as:
Execution time = CPU clock cycles x clock cycle time
Since clock cycle time and clock rate are reciprocals, so,
Execution time = CPU clock cycles / clock rate
The number of CPU clock cycles can be determined by,
CPU clock cycles
= (No. of instructions / Program ) x (Clock cycles / Instruction)
= Instruction Count x CPI
Which gives,
Execution time = Instruction Count x CPI x clock cycle time
= Instruction Count x CPI / clock rate

Units for CPU Execution Time

How to Improve Performance?

To improve performance, you can either:
• Decrease the CPI (clock cycles per instruction) by using new Hardware.
• Decrease the clock time or Increase clock rate by reducing propagation delays or by use pipelining.
• Decrease the number of required cycles or improve ISA or Compiler.

Uses and Benefits of Performance of Computer

Some of the key uses and benefits of a high-performing computer system include:
• Increased productivity: A high-performing computer can help increase productivity by reducing the
time required to complete tasks, allowing users to complete more work in less time.
• Improved user experience: A fast and efficient computer system can provide a better user experience,
with smoother operation and fewer delays or interruptions.
• Faster data processing: A high-performing computer can process data more quickly, enabling faster
access to critical information and insights.
• Enhanced gaming and multimedia performance: High-performance computers are better suited for
gaming and multimedia applications, providing smoother and more immersive experiences.
• Better efficiency and cost savings: By optimizing the performance of a computer system, it is
possible to reduce the time and resources required to complete tasks, leading to better efficiency and
cost savings.

Virtual Memory
• Virtual memory is a memory management technique used by operating systems to give the appearance
of a large, continuous block of memory to applications, even if the physical memory (RAM) is limited.
• It allows the system to compensate for physical memory shortages, enabling larger applications to run
on systems with less RAM.
• A memory hierarchy, consisting of a computer system’s memory and a disk, enables a process to
operate with only some portions of its address space in memory.
• A virtual memory is what its name indicates- it is an illusion of a memory that is larger than the real
memory. We refer to the software component of virtual memory as a virtual memory manager.
• The basis of virtual memory is the non-contiguous memory allocation model. The virtual memory
manager removes some components from memory to make room for other components.

24
 • The size of virtual storage is limited by the addressing scheme of the computer system and the amount
of secondary memory available not by the actual number of main storage locations.
Working of Virtual Memory
• It is a technique that is implemented using both hardware and software. It maps memory addresses
used by a program, called virtual addresses, into physical addresses in computer memory.
• All memory references within a process are logical addresses that are dynamically translated
into physical addresses at run time. This means that a process can be swapped in and out of the main
memory such that it occupies different places in the main memory at different times during the course
of execution.
• A process may be broken into a number of pieces and these pieces need not be continuously located in
the main memory during execution. The combination of dynamic run-time address translation and the
use of a page or segment table permits this.
• If these characteristics are present then, it is not necessary that all the pages or segments are present in
the main memory during execution. This means that the required pages need to be loaded into memory
whenever required. Virtual memory is implemented using Demand Paging or Demand Segmentation.

Types of Virtual Memory

• In a computer, virtual memory is managed by the Memory Management Unit (MMU), which is often
built into the CPU. The CPU generates virtual addresses that the MMU translates into physical
addresses.
• There are two main types of virtual memory:
• Paging
• Segmentation
Paging
• Paging divides memory into small fixed-size blocks called pages.
• When the computer runs out of RAM, pages that aren’t currently in use are moved to the hard drive,
into an area called a swap file. The swap file acts as an extension of RAM. When a page is needed
again, it is swapped back into RAM, a process known as page swapping. This ensures that the operating
system (OS) and applications have enough memory to run.
Demand Paging:
• The process of loading the page into memory on demand (whenever a page fault occurs) is known as
demand paging. The process includes the following steps are as follows:

25
 • If the CPU tries to refer to a page that is currently not available in the main memory, it generates an
interrupt indicating a memory access fault.
• The OS puts the interrupted process in a blocking state. For the execution to proceed the OS must bring
the required page into the memory.
• The OS will search for the required page in the logical address space.
• The required page will be brought from logical address space to physical address space. The page
replacement algorithms are used for the decision-making of replacing the page in physical address
space.
• The page table will be updated accordingly.
• The signal will be sent to the CPU to continue the program execution and it will place the process back
into the ready state.
Hence whenever a page fault occurs these steps are followed by the operating system and the required page is
brought into memory.

What is Page Fault Service Time?

• The time taken to service the page fault is called page fault service time. The page fault service time
includes the time taken to perform all the above six steps.
Let Main memory access time is: m
Page fault service time is: s
Page fault rate is : p
Then, Effective memory access time = (p*s) + (1-p)*m

Segmentation
• Segmentation divides virtual memory into segments of different sizes.
• Segments that aren’t currently needed can be moved to the hard drive. The system uses a segment table
to keep track of each segment’s status, including whether it’s in memory, if it’s been modified, and its
physical address.
• Segments are mapped into a process’s address space only when needed.
Combining Paging and Segmentation
• Sometimes, both paging and segmentation are used together. In this case, memory is divided into
pages, and segments are made up of multiple pages. The virtual address includes both a segment
number and a page number.

Virtual Memory vs Physical Memory

• When talking about the differences between virtual memory and physical memory, the biggest
distinction is speed. RAM is much faster than virtual memory, but it is also more expensive.
• When a computer needs storage for running programs, it uses RAM first. Virtual memory, which is
slower, is used only when the RAM is full.
Feature Virtual Memory Physical Memory (RAM)

An abstraction that extends the

The actual hardware (RAM) that stores data and
Definition available memory by using disk
instructions currently being used by the CPU
storage

Location On the hard drive or SSD On the computer’s motherboard

Speed Slower (due to disk I/O operations) Faster (accessed directly by the CPU)

26
Feature Virtual Memory Physical Memory (RAM)

Capacity Larger, limited by disk space Smaller, limited by the amount of RAM installed

Cost Lower (cost of additional disk storage) Higher (cost of RAM modules)

Data
Indirect (via paging and swapping) Direct (CPU can access data directly)
Access

Volatility Non-volatile (data persists on disk) Volatile (data is lost when power is off)

What is Swapping?
• Swapping is a process out means removing all of its pages from memory, or marking them so that they
will be removed by the normal page replacement process. Suspending a process ensures that it is not
runnable while it is swapped out. At some later time, the system swaps back the process from the
secondary storage to the main memory. When a process is busy swapping pages in and out then this
situation is called thrashing.

What is Thrashing?
• At any given time, only a few pages of any process are in the main memory, and therefore more
processes can be maintained in memory. Furthermore, time is saved because unused pages are not
swapped in and out of memory. However, the OS must be clever about how it manages this scheme.
In the steady state practically, all of the main memory will be occupied with process pages, so that the
processor and OS have direct access to as many processes as possible. Thus when the OS brings one
page in, it must throw another out. If it throws out a page just before it is used, then it will just have to
get that page again almost immediately. Too much of this leads to a condition called Thrashing. The
system spends most of its time swapping pages rather than executing instructions. So a good page
replacement algorithm is required.
• In the given diagram, the initial degree of multiprogramming up to some extent of point(lambda), the
CPU utilization is very high and the system resources are utilized 100%. But if we further increase the
27
 degree of multiprogramming the CPU utilization will drastically fall down and the system will spend
more time only on the page replacement and the time taken to complete the execution of the process
will increase. This situation in the system is called thrashing.
Causes of Thrashing

1. High Degree of Multiprogramming:

• If the number of processes keeps on increasing in the memory then the number of frames allocated to
each process will be decreased. So, fewer frames will be available for each process. Due to this, a page
fault will occur more frequently and more CPU time will be wasted in just swapping in and out of
pages and the utilization will keep on decreasing.
For example:
Let free frames = 400

Case 1: Number of processes = 100

Then, each process will get 4 frames.

Case 2: Number of processes = 400

Each process will get 1 frame.

• Case 2 is a condition of thrashing, as the number of processes is increased, frames per process are
decreased. Hence CPU time will be consumed just by swapping pages.

2. Lacks of Frames:
• If a process has fewer frames, then fewer pages of that process will be able to reside in memory and
hence more frequent swapping in and out will be required. This may lead to thrashing. Hence a
sufficient number of frames must be allocated to each process in order to prevent thrashing.
Recovery of Thrashing
• Do not allow the system to go into thrashing by instructing the long-term scheduler not to bring the
processes into memory after the threshold.
• If the system is already thrashing then instruct the mid-term scheduler to suspend some of the
processes so that we can recover the system from thrashing.
Performance in Virtual Memory
• Let p be the page fault rate( 0 <= p <= 1).
• if p = 0 no page faults
• if p =1, every reference is a fault.
Effective access time (EAT) = (1-p) * Memory Access Time + p * Page fault time.
Page fault time = page fault overhead + swap out + swap in +restart overhead
The performance of a virtual memory management system depends on the total number of page faults, which
depend on “paging policies” and “frame allocation”

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Frame Allocation
A number of frames allocated to each process in either static or dynamic.
• Static Allocation: The number of frame allocations to a process is fixed.
• Dynamic Allocation: The number of frames allocated to a process changes.
Paging Policies
• Fetch Policy: It decides when a page should be loaded into memory.
• Replacement Policy: It decides which page in memory should be replaced.
• Placement Policy: It decides where in memory should a page be loaded.
Applications of Virtual memory
Virtual memory has the following important characteristics that increase the capabilities of the computer
system. The following are five significant characteristics of Lean.
• Increased Effective Memory: One major practical application of virtual memory is, virtual memory
enables a computer to have more memory than the physical memory using the disk space. This allows
for the running of larger applications and numerous programs at one time while not necessarily needing
an equivalent amount of DRAM.
• Memory Isolation: Virtual memory allocates a unique address space to each process and that also
plays a role in process segmentation. Such separation increases safety and reliability based on the fact
that one process cannot interact with and or modify another’s memory space through a mistake.
• Efficient Memory Management: Virtual memory also helps in better utilization of the physical
memories through methods that include paging and segmentation.
How to Manage Virtual Memory?
1. Adjust the Page File Size
• Automatic Management: All contemporary operating systems including Windows contain the auto-
configuration option for the size of the page file. But depending on the size of the RAM, they are set
automatically, although the user can manually adjust the page file size if required.
• Manual Configuration: For tuned up users, the setting of the custom size can sometimes boost up the
performance of the system. The initial size is usually advised to be set to the minimum value of 1. To
set the size of the swap space equal to 5 times the amount of physical RAM and the maximum size 3
times the physical RAM.
2. Place the Page File on a Fast Drive
• SSD Placement: If this is feasible, the page file should be stored in the SSD instead of the HDD as a
storage device. It has better read and write times, and the virtual memory may prove beneficial in an
SSD.
• Separate Drive: Regarding systems having multiple drives involved, the page file needs to be placed
on a different drive than the OS and that shall in turn improve its performance.
3. Monitor and Optimize Usage
• Performance Monitoring: Employ the software tools used in monitoring the performance of the
system in tracking the amounts of virtual memory. High page file usage may signify that there is a lack
of physical RAM or that virtual memory needs a change of settings or addition in physical RAM.
• Regular Maintenance: Make sure there is no toolbar or other application running in the background,
take time and uninstall all the tool bars to free virtual memory.
4. Disable Virtual Memory for SSDs (with Sufficient RAM)
• Sufficient RAM: If for instance your system has a big physical memory, for example 16GB and above
then it would be advised to freeze the page file in order to minimize SSD usage.
5. Optimize System Settings
• System Configuration: Change some general properties of the system concerning virtual memory
efficiency. This also involves enabling additional control options in Windows such as adjusting
additional system setting option on the operating system.
• Regular Updates: Ensure that your drivers are run in their newest version because new releases
contain some enhancements and issues regarding memory management.
29
Advantages of Virtual Memory
• More processes may be maintained in the main memory: Because we are going to load only some
of the pages of any particular process, there is room for more processes. This leads to more efficient
utilization of the processor because it is more likely that at least one of the more numerous processes
will be in the ready state at any particular time.
• A process may be larger than all of the main memory: One of the most fundamental restrictions in
programming is lifted. A process larger than the main memory can be executed because of
demand paging. The OS itself loads pages of a process in the main memory as required.
• It allows greater multiprogramming levels by using less of the available (primary) memory for each
process.
• It has twice the capacity for addresses as main memory.
• It makes it possible to run more applications at once.
• When only a portion of a program is required for execution, speed has increased.
• Memory isolation has increased security.
• It makes it possible for several larger applications to run at once.
• Memory allocation is comparatively cheap.
• It is efficient to manage logical partition workloads using the CPU.
• Automatic data movement is possible.
Disadvantages of Virtual Memory
• It can slow down the system performance, as data needs to be constantly transferred between the
physical memory and the hard disk.
• It can increase the risk of data loss or corruption, as data can be lost if the hard disk fails or if there is
a power outage while data is being transferred to or from the hard disk.
Memory Management Requirements
• Memory management keeps track of the status of each memory location, whether it is allocated or free.
• It allocates the memory dynamically to the programs at their request and frees it for reuse when it is
no longer needed.
Relocation
• The available memory is generally shared among a number of processes in a multiprogramming
system, so it is not possible to know in advance which other programs will be resident in main memory
at the time of execution of this program.
• Swapping the active processes in and out of the main memory enables the operating system to have a
larger pool of ready-to-execute process.
• When a program gets swapped out to a disk memory, then it is not always possible that when it is
swapped back into main memory then it occupies the previous memory location, since the location
may still be occupied by another process. We may need to relocate the process to a different area of
memory. Thus, there is a possibility that program may be moved in main memory due to swapping.

30
 • The figure depicts a process image. The process image is occupying a continuous region of main
memory. The operating system will need to know many things including the location of process control
information, the execution stack, and the code entry. Within a program, there are memory references
in various instructions and these are called logical addresses.
• After loading of the program into main memory, the processor and the operating system must be able
to translate logical addresses into physical addresses. Branch instructions contain the address of the
next instruction to be executed.
• Data reference instructions contain the address of byte or word of data referenced.
Protection
• There is always a danger when we have multiple programs at the same time as one program may write
to the address space of another program. So, every process must be protected against unwanted
interference when other process tries to write in a process whether accidental or incidental.
Sharing
• A protection mechanism must have to allow several processes to access the same portion of main
memory. Allowing each processes access to the same copy of the program rather than have their own
separate copy has an advantage.
• For example, multiple processes may use the same system file and it is natural to load one copy of the
file in main memory and let it shared by those processes.
• It is the task of Memory management to allow controlled access to the shared areas of memory without
compromising the protection. Mechanisms are used to support relocation supported sharing
capabilities.
Logical organization
• Main memory is organized as linear or it can be a one-dimensional address space which consists of a
sequence of bytes or words.
• Most of the programs can be organized into modules, some of those are unmodifiable (read-only,
execute only) and some of those contain data that can be modified.
• To effectively deal with a user program, the operating system and computer hardware must support a
basic module to provide the required protection and sharing. It has the following advantages:
• Modules are written and compiled independently and all the references from one module to another
module are resolved by `the system at run time.
• Different modules are provided with different degrees of protection.
• There are mechanisms by which modules can be shared among processes. Sharing can be provided
on a module level that lets the user specify the sharing that is desired.
Physical organization
• The structure of computer memory has two levels referred to as main memory and secondary memory.
• Main memory is relatively very fast and costly as compared to the secondary memory. Main memory
is volatile. Thus, secondary memory is provided for storage of data on a long-term basis while the main
memory holds currently used programs.
• The major system concern between main memory and secondary memory is the flow of information
and it is impractical for programmers to understand this for two reasons:
• The programmer may engage in a practice known as overlaying when the main memory available
for a program and its data may be insufficient. It allows different modules to be assigned to the
same region of memory. One disadvantage is that it is time-consuming for the programmer.
• In a multiprogramming environment, the programmer does not know how much space will be
available at the time of coding and where that space will be located inside the memory.

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 26-Sep-2024

Secondary Storage Devices

• Secondary storage device used to

securely store data permanently.
• It is not accessible by the Processor.
• Data will not be lost when is power
cut or computer is switched off.
• More reliability and high capacity
than primary storage device.

SSG 1

Size of Secondary Storage Devices

• Floppy Disk – 1.4MB

• CD Drive – 700 MB
• DVD Drive – 4.7 GB
• Blu-ray Disk – 25 GB
• Pen Drive – 1 GB to 32 GB
• Hard Disk – 1 TB
• SSD – 512 GB

SSG 2

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Importance of Hexa Decimal

• Numbers 0 to 9, A to F (10 to 15)

• Used Address lines and Data Lines
• Used for memory and data representation

SSG 3

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Address Line and Data Line

• Numbers 0 and 1 used for address line and data line
• Each data(1 byte) needs one memory address

SSG 5

Address Line and Data Line

Three Address Lines Data

2^3=8 Bytes of Data 1 Byte
b3 b2 b1 Address Data(Hex) Data(Dec)
0 0 0 0 0A 10
• 3 Address Lines (3 bits)
0 0 1 1 15 21
• 2^3 = 8
0 1 0 2 05 05
• 8 bytes of storage
0 1 1 3 09 09
• 8 memory locations
1 0 0 4 22 34
1 0 1 5 25 37
• 0 to 7
1 1 0 6 30 48
1 1 1 7 08 08

SSG 6

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• 4 Address Lines (4 bits)

• 2^4 = 16
• 16 bytes of storage
• 16 memory locations ( 0 to 9, A to F)
• Adding 1 bit – doubles the storage

Four Address Lines Four Address Lines

b4 b3 b2 b1 Address Data(Hex) b4 b3 b2 b1 Address Data(Hex)
0 0 0 0 0 0A 1 0 0 0 8 0A
0 0 0 1 1 15 1 0 0 1 9 15
0 0 1 0 2 05 1 0 1 0 A 05
0 0 1 1 3 09 1 0 1 1 B 09
0 1 0 0 4 22 1 1 0 0 C 22
0 1 0 1 5 25 1 1 0 1 D 25
0 1 1 0 6 30 1 1 1 0 E 30
0 1 1 1 7 08 1 1 1 1 F 08

SSG 7

Example
• 16 Address Lines
• 0000 0000 0000 0000 -> 0000 H
• 0000 0000 0000 0001 -> 0001 H
• 0000 0000 0000 0010 -> 0002 H
• :
• 0000 0000 0000 1001 -> 0009 H
• 0000 0000 0000 1010 -> 000A H • 2^16 = 65536
• : • 65536 bytes of storage
• 0000 0000 0000 1111 -> 000F H • 65536 memory locations ( 0000
• 0000 0000 0001 0000 -> 0010 H to FFFF -> 0 to 65535)
• :
• 1111 1111 1111 1111 -> FFFF H

SSG 8

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BCC
BCC
By
By
SSG SSG

Example

• 10 Address Lines -> 2^10 -> 1024 Bytes -> 1KB

• 20 Address Lines -> 2^20 -> 2^10 2^10 -> 1024 KBytes -> 1 MB
• 30 Address Lines -> 2^30 -> 2^10 2^20 -> 1024 MBytes -> 1 GB
• 40 Address Lines -> 2^40 -> 2^10 2^30 -> 1024 GBytes -> 1 TB

SSG 10

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Problem 1 : Number of address lines required to store 16 GB data

• 16 GB
• 16 2^30
• 2^4 2^30
• 34 Address Lines
Problem 2 : Number of address lines required to store 512 GB data
• 512 GB
• 512 2^30
• 2^9 2^30
• 39 Address Lines
Problem 3 : Number of address lines required to store 32 MB data
• 32 MB
• 32 2^20
• 2^5 2^20
• 25 Address Lines
SSG 11

Components of Hard Disk

• Platters
• Spindle
• Read / Write Heads
• Controller
• Tracks and Sectors

SSG 12

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Platters
• A hard drive contains a series of rotating platters within a sealed case. The
sealed case is known as Head Disk Assembly, or HDA.
• It is a rigid, round disk which is coated with magnetically sensitive material.
• Data is stored in binary code (0s and 1s).
• It is encoded by polarizing magnetic areas, or domains, on the disk surface.
• Data can be written to and read from both surfaces of a platter.

01010100111010101010

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Spindle
• Multiple platters are connected by a spindle.
• The spindle is connected to a motor which rotates at a constant speed
(several thousands revolutions per minute).
• The spindle rotates continuously until power is removed from the spindle
motor.
• Many hard drive failures occur when the spindle motor fails.
Spindle

Platters

Read / Write Heads

• Data is read and written by read/write heads, or R/W heads.
• Most drives have two R/W heads per platter, one for each surface of the
platter.
• When reading data, they detect magnetic polarization on the platter surface.
• When writing data, they change the magnetic polarization on the platter
surface.
• Since reading and writing data is a magnetic process, the R/W heads never
actually touch the surface of the platter. There is a microscopic air gap
between the read/write heads and the platter. This is known as the head
flying height.

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R/W Head

R/W Head

Actuator

Controller
• The controller is a printed circuit board, mounted at the bottom of the disk
drive. It contains a microprocessor (as well as some internal memory,
circuitry, and firmware) that controls:
• power to the spindle motor and control of motor speed
• how the drive communicates with the host CPU
• reads/writes by moving the actuator arm, and switching between R/W heads
• optimization of data access
Controller

Interface
HDA

Power
Connector
- 18
Bottom View of Disk Drive

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Tracks and Sectors

• Data is recorded in tracks. A track is a concentric ring around the
spindle which contains data.
• A track can hold a large amount of data.
• Tracks are numbered from the outer edge of the platter, starting
at track zero.
• A track is divided into sectors. Sector
• A sector is the smallest individually-addressable unit of storage.
• The number of sectors per track is based upon the specific drive.
• Sectors typically hold 512 bytes of user data.

Track

Platter

Seek Time
• Seek time is the time for
read/write heads to move
between tracks

• Seek time specifications

include:
• Full stroke
• Average
• Track-to-track

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Rotational Speed / Latency

• It is the time it takes the platter to rotate and position the data under
the read/write head.
• It dependents upon the rotation speed of the spindle and is measured
in milliseconds (ms)
• Ex rotational latency is around 5.5 ms for a 5,400 rpm drive, and
around 2.0 ms for a 15,000 rpm drive.

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Memory Size
• Number of Plotters -4 ( Double sided)
• Number of Tracks – 4
• Number of Sectors in each Track – 8
• Storage of each sector – 512 Bytes
• Memory capacity = 4x2x4x8x512 = 1,31,072 Bytes =128KB
• Number of address lines required is
• 17

Option 2
• Storage of each sector – 1024 Bytes
• Memory capacity = 4x2x4x8x1024 = 256 KBytes =256 KB
• Number of address lines required is
• 18

Zoned-Bit Recording
Sector
• Number of Plotters -4 ( Double
sided)
• Number of Sectors in one side
of plotter – 200
• Storage of each sector – 512
Bytes
• Memory capacity =
Track 4x2x200x512 = =800KB
Platter Without Platter With • Number of address lines
Zones Zones required is
• 20

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