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Unit I - Students

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5 views43 pages

Unit I - Students

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koteeswaran259
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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You are on page 1/ 43

09-Aug-2024

UNIT I COMPUTER FUNDAMENTALS

• Computer Types - Functional Units – Basic Operational Concepts -


Number Representation and Arithmetic Operations - Performance
Measurements - Instruction Set Architecture: Memory Locations and
Addresses - Instructions and Instruction Sequencing - Addressing
Modes

SSG 1

Computer

• A computer is an electronic device that has storage, computations, input


(data), output (data) and networking capabilities.
• With the growing AI, computers also have learning capabilities from the
data provided.
• The input and output data can be in different forms like text, images, audio
and video.
• A computer processes the input according to the set of instructions
provided to it by the user and gives the desired output.
• Computers are of various types and they can be categorized in two ways on
the basis of size and on the basis of data handling capabilities.
SSG 2

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Computer Types
• On the basis of data handling capabilities, the computer
is of three types:
• Analogue Computer
• Digital Computer
• Hybrid Computer
• On the basis of size, the computer can be of five types:
• Super Computer
• Mainframe Computer
• Mini Computer
• Workstation
• Micro Computer
SSG 3

Analogue Computer

• Analog computers are designed to process analogue data.


• Analogue data is continuous data that changes continuously and cannot have
discrete values.
• We can say that analogue computers are used where we don't need exact
values always such as speed, temperature, pressure and current.
• Analogue computers directly accept the data from the measuring device
without first converting it into numbers and codes.
• Speedometer and mercury thermometer are examples of analogue
computers.

SSG 4

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Digital Computer

• It is designed to perform calculations and logical operations at high speed.


• It accepts the raw data as input in the form of digits or binary numbers (0 and 1) and
processes it with programs stored in its memory to produce the output.
• All modern computers like laptops, desktops including smartphones that we use at home
or office are digital computers.
• It allows you to store a large amount of information and to retrieve it easily whenever you
need it.
• You can easily add new features to digital systems more easily.
• Different applications can be used in digital systems just by changing the program without
making any changes in hardware
• The cost of hardware is less due to the advancement in the IC technology.
• Reproducibility of results is higher as the output is not affected by noise, temperature,
humidity, and other properties of its components.
SSG 5

Hybrid Computer

• Hybrid computer has features of both analogue and digital computer.


• It is fast like an analogue computer and has memory and accuracy like digital computers.
• It can process both continuous and discrete data. It accepts analogue signals and convert
them into digital form before processing. So, it is widely used in specialized applications
where both analogue and digital data is processed.
• For example, a processor is used in petrol pumps that converts the measurements of fuel
flow into quantity and price. Similarly, they are used in airplanes, hospitals, and scientific
applications.
• Its computing speed is very high due to the all-parallel configuration of the analogue
subsystem.
• It produces precise and quick results that are more accurate and useful.
• It helps in the on-line data processing.
SSG 6

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Super Computer

• Biggest and fastest computers (in terms of speed of processing data).


• Supercomputers are designed such that they can process a huge amount of
data, like processing trillions of instructions or data just in a second. This is
because of the thousands of interconnected processors in supercomputers.
• It is basically used in scientific and engineering
applications such as weather forecasting,
scientific simulations, and nuclear energy
research.
• It was first developed by Roger Cray in 1976.

SSG 7

Characteristics of Super Computer

• Supercomputers are the computers that are the fastest and they are also very
expensive.
• It can calculate up to ten trillion individual calculations per second, this is also
the reason which makes it even faster.
• It is used in the stock market or big organizations for managing the online
currency world such as Bitcoin etc.
• It is used in scientific research areas for analyzing data obtained from
exploring the solar system, satellites, etc.

SSG 8

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Mainframe Computer

• It can support hundreds or thousands of users at the same time. It also supports multiple
programs simultaneously. So, they can execute different processes simultaneously.
• All these features make the mainframe computer ideal for big organizations like banking,
telecom sectors, etc., which process a high volume of data in general.
Characteristics of Mainframe Computers
• It is also an expensive or costly computer.
• It has high storage capacity and great performance.
• It can process a huge amount of data (like data involved in the banking sector) very
quickly.
• It runs smoothly for a long time and has a long life.

SSG 9

Mini Computer

• It is a medium size multiprocessing computer.


• In this type of computer, there are two or more processors, and it supports 4
to 200 users at one time.
• Minicomputer is similar to Microcontroller.
• Minicomputers are used in places like institutes or departments for different
work like billing, accounting, inventory management, etc.
• It is smaller than a mainframe computer but larger in comparison to the
microcomputer.
Characteristics of Minicomputer
• Its weight is low. It is easy to carry anywhere.
• Less expensive than a mainframe computer and it is fast.
SSG 10

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Workstation

• A workstation computer is designed for technical or scientific applications.


• It consists of a fast microprocessor, with a large amount of RAM and a high-
speed graphic adapter. It is a single-user computer.
• It is generally used to perform a specific task with great accuracy.
Characteristics of Workstation Computer
• It is expensive or high in cost.
• They are exclusively made for complex work purposes.
• It provides large storage capacity, better graphics, and a more powerful CPU
when compared to a PC.
• It is also used to handle animation, data analysis, CAD, audio and video
creation, and editing.
SSG 11

Micro Computer

• Personal Computers is also known as a microcomputer.


• It is basically a general-purpose computer designed for individual use.
• It consists of a microprocessor as a central processing unit(CPU), memory,
input unit, and output unit. This kind of computer is suitable for personal
work such as making an assignment, watching a movie, or at the office for
office work, etc.
• For example, Laptops and desktop computers.
Characteristics of Personal Computer (PC)
• In this limited number of software can be used.
• It is the smallest in size.
• It is designed for personal use and easy to use.
SSG 12

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Functional Units
• A computer consists of five functionally independent main parts:
• Input • Memory • Arithmetic and Logic Unit (ALU)
• Output • Control Units
Program: A list of instructions that performs a task.
Data: Numbers and encoded characters that are used as operands by
the Instructions.
Bit: String of binary digits called bits.
Binary-coded decimal (BCD)
Alphanumeric characters:
ASCII (American Standard Code for Information Interchange)
EBCDIC (Extended Binary-Coded Decimal Interchange Code)

SSG 13

Functional Units

SSG 14

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Input Units

• Computers accept coded information through input units.


• The most common input device is the keyboard.
• Whenever a key is pressed, the corresponding letter or digit is automatically
converted into its corresponding binary code and transmitted to the
processor.,
• Ex: keyboard, joysticks, trackballs, mouse and touchpad – graphical input
devices
• Ex: Microphones: It is used to captures audio input and converted into
digital code for storage and processing
• Ex: Cameras can be used to capture video input.

SSG 15

Memory Units
• The function of memory unit is to store programs and data.
• It is divided into ‘n’ number of blocks. Each block is divided into ‘n’ number of cells.
• Each cell is capable of storing one bit information at a time.

Primary storage
• It is made up of semiconductor material. So it is called Semiconductor memory.
• Data storage capacity is less than secondary memory. Cost is too expensive than
secondary memory.
• CPU can access data directly. Because it is an internal memory.
• Data accessing speed is very fast than secondary memory.
• When the memory is accessed, usually only one word of data is read or written.
• The number of bits in each word is referred to as the word length of the computer,
typically 16,32 or 64 bits.
• Ex.RAM & ROM

SSG 16

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RAM vs ROM
RAM ROM
Random Access Memory Read Only Memory
Volatile memory Non volatile memory
Data lost when the power turns off It retains data even in the absence of a
and that is used to hold data and power source and that is store
program while they are running. programs between runs.
Temporary storage medium Permanent storage medium
User perform both read and write
User can perform only read operation
operation

SSG 17

Cache Memory
• A small, fast memory that acts as a buffer for a slower, larger memory.
• At the start of program execution, the cache is empty. All program instructions and
required data are stored in the main memory.
• As execution proceeds, instructions are fetched into the processor chip and a copy of each
is placed in the cache.
• Cache memory contains the user frequently accessed information.
Secondary Memory
• Secondary memory (Nonvolatile storage) is a form of storage that retains data even in the
absence of a power source.
• It is made up of magnetic material. So it is called magnetic memory.
• Data storage capacity is high than primary memory.
• Cost is too low than primary memory.
• CPU cannot access data directly. Because it is an external memory.
• Data accessing speed is very slow than primary memory.
• Ex. Magnetic disk, Hard Disk, CD, DVD, Floppy Disk
SSG 18

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Arithmetic Logic Unit


• Computer programs are executed in the ALU of the processor.
• Arithmetic or logic operations such as addition, subtraction, multiplication, division or
comparison of numbers are bringing the required operands into the processor and the
operation is performed by the ALU
• The operands for operations are stored in high-speed storage elements called
registers.
• Each register can store one word of data.
• Access times to registers are somewhat faster than access times to the fastest cache
unit in the memory hierarchy.
Output Unit
• Its function is to send processed results to the outside such as monitor or printer.
• Ex: Printer - mechanical impact heads, ink jet scanners, laser printers.
• Ex: Monitor – CRT, LCD and LED

SSG 19

Control Unit
• The control unit coordinates the following operations like memory, arithmetic and logic,
input and output units, store and process information and perform input and output
operations and sends control signals to other units and senses their states.
• The timing signals that govern the I/O transfers are generated by the control circuits.
• Timing signals also control data transfer between the processor and the memory.
• Timing signals are the signals that determine when a given action is to take place.
• A physically separate unit that interacts with other parts of the machine.
• A large set of control lines (wires) carries the signals used for timing and synchronization
of events in all units.
• The operations of a computer: The computer accepts information in the form of
programs and data through an input unit and stores it in the memory. Information stored
in memory is fetched, under program control, into an ALU, where it is processed.
Processed information leaves the computer through an output unit. All activities inside
the machine are directed by the control unit.

SSG 20

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Interconnection between Functional Components


• A computer consists of input unit that
takes input, a CPU that processes the
input and an output unit that produces
output.
• All these devices communicate with
each other through a common bus.
• A bus is a transmission path, made of a
set of conducting wires over which data
or information in the form of electric
signals, is passed from one component
to another in a computer. The bus can
be of three types – Address bus, Data
bus and Control Bus.
• Following figure shows the connection
of various functional components:
SSG 21

Interconnection between Functional Components

• The address bus carries the address location of the data or instruction.
• The data bus carries data from one component to another and the
control bus carries the control signals.
• The system bus is the common communication path that carries signals
to/from CPU, main memory and input/output devices.
• The input/output devices communicate with the system bus through the
controller circuit which helps in managing various input/output devices
attached to the computer.

SSG 22

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Basic Operational Concepts


• The primary function of a computer system is to execute a program, sequence of instructions. These
instructions are stored in computer memory.
• These instructions are executed to process data which are already loaded in the computer memory
through some input devices.
• After processing the data, the result is either stored in the memory for further reference, or it is sent
to the outside world through some output port.
• To perform the execution of an instruction, in addition to the arithmetic logic unit, and control unit,
the processor contains a number of registers used for temporary storage of data and some special
function registers.
• The special function registers include program counters (PC), instruction registers (IR), memory
address registers (MAR) and memory and memory data registers (MDR).
• The Program counter is one of the most critical registers in CPU.
• The Program counter monitors the execution of instructions. It keeps track on which instruction is
being executed and what the next instruction will be.
• The instruction register IR is used to hold the instruction that is currently being executed.

23

Basic Operational Concepts


• The contents of IR are available to the control unit, which generate the timing signals that control, the
various processing elements involved in executing the instruction.
• The two registers MAR and MDR are used to handle the data transfer between the main memory and
the processor
• The MAR holds the address of the main memory to or from which data is to be transferred.
• The MDR contains the data to be written into or read from the addressed word of the main memory.
• Whenever the processor is asked to communicate with devices, we say that the processor is servicing
the devices. The processor can service these devices in one of the two ways.
• One way is to use the polling routine, and the other way is to use an interrupt.
• Polling enables the processor software to check each of the input and output devices frequently.
During this check, the processor tests to see if any devices need servicing or not.
• Interrupt method provides an external asynchronous input that informs the processor that it should
complete whatever instruction that is currently being executed and fetch a new routine that will
service the requesting device.

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Connection Between Processor and Memory

25

Programming Example

void main() R1=var1, R2=var2, R3=var3: var1 4001: 21


{ 1001:00 4002: 01
int var1, var2=20, var3: Equivalent Machinecode 1002:0A 4003: 10
scanf(“%d”,&var1): var2 4004: 3E
var3=var1+var2: Load R1, Loc(var1=10) 2001:00 4005: 14
printf(“%d”,var3): Mvi R2, 14 2002:14 4006: 85
} Add R3, R1, R2 Var3 4007: 32
-> R3=R1+R2 3001:00 4008: 01
Store R3, Loc(var3) 3002:1E 4009: 30
400A: 76

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Programming Example

void main() R1=var1, R2=var2, R3=var3: var1 4001: 21


{ 1001:00 4002: 01
int var1, var2=20, var3: Equivalent Machinecode 1002:0A 4003: 10
scanf(“%d”,&var1): var2 4004: 3E
var3=var1+var2: Load R1, Loc(var1=10) 2001:00 4005: 14
printf(“%d”,var3): Mvi R2, 14 2002:14 4006: 85
} Add R3, R1, R2 Var3 4007: 32
-> R3=R1+R2 3001:00 4008: 01
Store R3, Loc(var3) 3002:1E 4009: 30
400A: 76

27

Number Representation
• To represent a number in a computer system is by a sequence of bits called binary number.
• INTEGERS: Three systems are used for representing integer numbers:
• Sign-and-magnitude
• 2’s-complement
• In both systems, the leftmost bit is 0 for positive numbers and 1 for negative numbers.
Sign and Magnitude
• Sign magnitude is a very simple representation of negative numbers.
• In sign magnitude the first bit(MSB) is dedicated to represent the sign and hence it is called sign bit.
• Sign bit ‘1’ represents negative sign.
• Sign bit ‘0’ represents positive sign.
• In sign magnitude representation of a n – bit number, the first bit will represent sign and rest n-1 bits
represent magnitude of number.
• For example, +25 = 011001 Where 11001 = 25

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Number Representation
• And 0 for ‘+’
• -25 = 111001 Where 11001 = 25 And 1 for ‘-‘.
• Range of number represented by sign magnitude method = -(2n-1-1) to +(2n-1-1) (for n bit number)
• But there is one problem in sign magnitude and that is we have two representations of 0
• +0 = 000000 – 0 = 100000
2’s complement method
• Two’s complement representation is a method of representing negative numbers in binary.
• In this representation, the most significant bit is used as a sign bit, with 0 indicating a positive number and 1
indicating a negative number.
• To represent a negative number in this form, first we need to take the 1’s complement of the number
represented in simple positive binary form and then add 1 to it.
• For example: (-8) = (1000) 1’s complement of 1000 = 0111 Adding 1 to it, 0111 + 1 = 1000
• So, (-8) = (1000)
• Please don’t get confused with (8) =1000 and (-8) =1000 as with 4 bits, we can’t represent a positive
number more than 7. So, 1000 is representing -8 only.
29
• Range of number represented by 2’s complement = (-2n-1 to 2n-1 – 1)

Number Representation

• 4 Bits
• 1 bit (MSB – Most Significant Bit) for sign
• 3 bits for value / magnitude
• -(2n-1-1) to +(2n-1-1) – for n bit number – Sign
magnitude – Range -7 to +7
• -2n-1 to +(2n-1-1) – for n bit number – 2’s
complement – Range -8 to +7

30

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Floating Point Number Representation


• Floating-point numbers are used in computing to represent real numbers that cannot be expressed as integers.
They are particularly useful for handling very large or very small numbers, as well as numbers that require
fractional parts.
• The most common standard for floating-point representation is the IEEE 754 standard.
• Components of Floating-Point Representation
• Sign Bit: Indicates whether the number is positive (0) or negative (1).
• Exponent: Determines the scale of the number. The exponent is stored with a bias, which allows for both
positive and negative exponents.
• Mantissa (or Significand): Represents the significant digits of the number. The mantissa is a fractional part
that, combined with the exponent, provides the actual value.
IEEE 754 Standard
The IEEE 754 standard defines several formats, but the most common ones are:
• Single Precision (32-bit)
• Sign bit: 1 bit
• Exponent: 8 bits (with a bias of 127)
• Mantissa: 23 bits (with an implied leading 1)
• Double Precision (64-bit)
• Sign bit: 1 bit
• Exponent: 11 bits (with a bias of 1023)
31
• Mantissa: 52 bits (with an implied leading 1)

Floating Point Number Representation


Special Cases
• Zero: All bits in the exponent and mantissa are zero. The sign bit determines whether it's positive or negative
zero.
• Infinity: The exponent bits are all 1s, and the mantissa is all zeros. The sign bit determines the sign of the infinity.
• NaN (Not a Number): The exponent bits are all 1s, and the mantissa is not all zeros. NaN represent undefined or
unrepresentable values.
Single Precision (32-bit) Example
• Let’s represent the decimal number -13.25 in single precision format.
• Convert the Number to Binary
• Integer part: 13 in binary is 1101.
• Fractional part: 0.25 in binary is 0.01.
• So, -13.25 in binary is -1101.01.
• Normalize the Binary Number
• Normalize 1101.01 to scientific notation in binary:
• 1101.01 = 1.10101 × 23
• The exponent is 3, and the mantissa (fractional part) is 1.10101.
• Encode the Sign Bit
• The number is negative, so the sign bit is 1.
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Floating Point Number Representation


Calculate the Exponent
• The exponent in IEEE 754 single precision format is stored with a bias of 127. So, the actual exponent value to
store is: Exponent = 3 + 127 = 130
• In binary, 130 is 10000010.

Encode the Mantissa


• Drop the leading 1 (implicit bit) and use the next 23 bits of the fractional part. For 1.10101, the mantissa is
10101000000000000000000.

Combine Everything
• Putting it all together:
• Sign bit: 1
• Exponent: 10000010
• Mantissa: 10101000000000000000000
• So, the IEEE 754 representation of -13.25 in single precision is:
• 1 10000010 10101000000000000000000

33

Floating Point Number Representation


Double Precision (64-bit) Example
• Let’s represent the decimal number 3.75 in double precision format.

Convert the Number to Binary


• Integer part: 3 in binary is 11.
• Fractional part: 0.75 in binary is 0.11.
• So, 3.75 in binary is 11.11

Normalize the Binary Number


• Normalize 11.11 to scientific notation in binary:
• 11.11 = 1.111 × 21
• The exponent is 1, and the mantissa is 1.111

Encode the Sign Bit


• The number is positive, so the sign bit is 0.

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Floating Point Number Representation


Calculate the Exponent
• The exponent in IEEE 754 double precision format is stored with a bias of 1023. So, the actual exponent value to
store is: Exponent = 1 + 1023 = 1024
• In binary, 1024 is 10000000000

Encode the Mantissa


• Drop the leading 1 and use the next 52 bits of the fractional part. For 1.111, the mantissa is
1110000000000000000000000000000000000000000000000000

Combine Everything
• Putting it all together:
• Sign bit: 0
• Exponent: 10000000000
• Mantissa: 1110000000000000000000000000000000000000000000000000
• So, the IEEE 754 representation of 3.75 in double precision is:

0 10000000000 1110000000000000000000000000000000000000000000000000
35

Arithmetic Operations
Example 1: Addition - Add −3 and 4
Convert to Binary (4-bit Two's Complement)
-3:
Positive 3 in binary: 00112
​Invert bits: 11002
Add 1: 1100 + 1 = 11012 • Overflow / Carry : In computer arithmetic,
So, overflow occurs when the result of an
−3 in 4-bit two's complement is 11012 arithmetic operation is too large to be
4: Binary: 01002 represented in the available number of bits.
Add the Numbers This can result in incorrect or unexpected
1101 results.
+ 0100
------
10001
The result is 100012, but since we're using 4 bits, we discard the overflow bit:
Discarding the leftmost bit: 00012
Result in decimal: 1
36

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Arithmetic Operations
Example 2: Subtraction -> 3 – 5 - Convert the second number to its two's complement, then add.
Convert to Binary (4-bit Two's Complement)
-5:
Positive 5 in binary:01012
Invert bits: 10102
Add 1: 1010 + 1 =10112
So,
−5 in 4-bit two's complement is 10112
3:
Binary: 00112
Subtract by Adding the Two's Complement
To subtract −5 from 3
add 3 to the two's complement of −5:
0011
+ 1011
------
1110
The result is 11102, which in two's complement represents −2
37

Arithmetic Operations
Example 3: Multiplication - Multiply −2 and 3.
Convert to Binary (4-bit Two's Complement)
-2:
• Positive 2 in binary: 00102
• Invert bits: 11012
• Add 1: 1101 + 1 = 11102
• So, −2 in 4-bit two's complement is 11102
3: Binary: 00112
Multiply the Numbers
Perform binary multiplication:
1110
x 0011
------
1110 (1110 * 1)
1110 (1110 * 1, shifted left by 1)
------
101010
The result is 1010102
​ Since we use 4-bit representation, discard the overflow bit: Result: 1010 2 - In decimal: −6 38

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Arithmetic Operations
Example 4: Division - Divide −8 by 2
Convert to Binary (4-bit Two's Complement)
-8:
Positive 8 in binary: 10002 (since it's an overflow)
Invert bits: 01112
​Add 1: 0111 + 1 = 10002
So, −8 in 4-bit two's complement is 10002
2: Binary: 00102
Divide the Numbers - Perform binary division:
1000 ÷ 0010 = 0100 (Repeated subtraction)
1000 –
0010
------
0110 –
0010
------
0100
------
Result: 01002 which is 4
39

Performance Measurements
▪ Indicates how fast a computer can execute programs.
▪ The speed with which a computer executes programs is affected by
✓ The technology in which the hardware is implemented.
✓ The design of its instruction set.
✓ Its hardware and software (ex: OS).

▪ As programs are written in a high-level language,


✓ performance is also affected by the compiler that translates programs into machine
language.

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Performance Measurements
1.TECHNOLOGY
▪ The technology of Very Large Scale Integration (VLSI) that is used to fabricate the
electronic circuits for a processor on a single chip is a critical factor in the speed of
execution of machine instructions.
▪ The speed of switching between the 0 and 1 states in logic circuits is largely
determined by the size of the transistors that implement the circuits. Smaller
transistors switch faster.
▪ Advances in fabrication technology over several decades have reduced transistor
sizes dramatically.
Intel are mass-producing
transistors 14 nanometers
across—just 14 times wider than
DNA molecules.

41

Performance Measurements
Advantages:
▪ instructions can be executed faster.
▪ more transistors can be placed on a chip, leading to more logic functionality and
more memory storage capacity.
2. PARALLELISM
▪ Performance can be increased by performing a number of operations in parallel.
▪ Parallelism can be implemented on many different levels.
✓ Instruction-level parallelism
✓ Multicore processors
✓ Multiprocessors

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Performance Measurements
2.1 Instruction-level parallelism
▪ Simplest way to execute sequence of instructions in a processor in order to complete
all steps of the current instruction before starting the steps of the next instruction.
▪ If we overlap the execution of the steps of successive instructions, total execution
time will be reduced.
▪ For example, the next instruction could be fetched from memory at the same time
that an arithmetic operation is being performed on the register operands of the
current instruction.
▪ This form of parallelism is called pipelining – Is a process where multiple
instructions are overlapped during execution.

43

Performance Measurements
2.1 Instruction-level parallelism – Pipelining
Execution in a pipelined processor: Using a space-time diagram.
▪ Consider a processor having 4 stages and let there be 2 instructions to be executed.

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Performance Measurements
2.1 Instruction-level parallelism – Pipelining
Execution in a pipelined processor: Using a space-time diagram.
▪ Consider a processor having 4 stages and let there be 2 instructions to be executed.

Total time = 5 Cycles

45

Performance Measurements
2.2 Multicore Processors
▪ Integrated circuit has two or more processor cores attached for enhanced performance and reduced power
consumption.
▪ A CPU is the overall component.
▪ A core is one part of that component.

▪ A core is a single processing unit within the CPU.


▪ Modern CPUs typically have multiple cores, which allows
them to handle multiple tasks simultaneously.
▪ Each core can execute its own thread of instructions, which
helps improve the overall performance of the processor,
especially in multitasking and multi-threaded applications.
▪ Examples:
▪ Dual core – chips with 2 cores
▪ Quad core – chips with 4 cores
▪ Octa core – chips with 8 cores
▪ Quad-core processor has four cores and can handle four
separate tasks

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Performance Measurements
2.3 Multiprocessors:
▪ Is a system with two or more central processing units (CPUs) that is capable of
performing multiple tasks.
▪ These systems either execute a number of different application tasks in parallel, or
they execute subtasks of a single large task in parallel.
▪ The main objective is to boost the system’s execution speed, fault tolerance and
application matching.
▪ Two types of multiprocessors - shared memory multiprocessor and distributed
memory multiprocessor.

47

Performance Measurements
2.3 Multiprocessors: Shared memory multiprocessor
▪ In shared memory multiprocessors, all the CPUs shares the common memory but in a
distributed memory multiprocessor, every CPU has its own private memory.

Unite1: COA-Performance Measurements 48

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Performance Measurements
2.3 Multiprocessors: Shared memory multiprocessor
▪ Applications of shared memory multiprocessor:
▪ Single Instruction Single Data stream (SISD) (ex: Uniprocessors)
▪ Single Instruction Multiple Data stream (SIMD) (ex: Vector processing)
▪ Multiple Instruction Single Data stream (MISD) (ex: Pipelined processors)
▪ Multiple Instruction Multiple Data stream (MIMD) (ex: A single system
executing multiple, individual series of instructions in multiple perspectives)
▪ Benefits of using a Multiprocessor:
▪ Enhanced performance.
▪ Multiple applications.
▪ Multi-tasking inside an application.
▪ High throughput and responsiveness.
▪ Hardware sharing among CPUs.
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Performance Measurements
2.3 Multiprocessors: Distributed memory multiprocessor
▪ A multicomputer system with multiple processors that are connected together to solve a problem.
▪ Each processor has its own memory and it is accessible by that particular processor and those processors can
communicate with each other via an interconnection network.
▪ These computers normally have access only to their own
memory units.
▪ When the tasks they are executing need to share data, they
do so by exchanging messages over a communication
network.
▪ This property distinguishes them from shared-memory
multiprocessors, leading to the name message passing
multicomputer.

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Performance Measurements
3. PERFORMANCE AND METRICS
▪ For best performance, it is necessary to design the compiler, the machine instruction
set, and the hardware in a coordinated way.
▪ The operating system overlaps processing, disk transfers, and printing for several
programs to make the best possible use of the resources available.
▪ It is affected by the speed of the processor, the disk, and the printer.
3.1 Elapsed Time:
▪ The total time required to execute the entire program.
▪ The elapsed time for the execution of a program depends on all units in a computer
system.

Performance Measurements
3.2 Processor Time:
▪ It refers to the time the processor spends actively working on executing the program.
▪ The processor time depends on the hardware involved in the execution of individual
machine instructions.
▪ This hardware comprises the processor and the memory, which are usually connected
by a bus.

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Performance Measurements
4. CACHE MEMORY
▪ At the start of execution, all program instructions and the required data are stored in
the main memory.
▪ As execution proceeds, instructions are fetched one by one over the bus into the
processor, and a copy is placed in the cache.
▪ When the execution of an instruction calls for data located in the main memory, the
data are fetched and a copy is placed in the cache.
▪ Later, if the same instruction or data item is needed a second time, it is read directly
from the cache.
▪ The processor and a relatively small cache memory can be fabricated on a single
integrated circuit chip.
▪ The internal speed of performing the basic steps of instruction processing on such
chips is very high and is considerably faster than the speed at which instructions and
data can be fetched from the main memory.
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Performance Measurements
4. CACHE MEMORY
▪ A program will be executed faster if the movement of instructions and data between
the main memory and the processor is minimized, which is achieved by using the
cache.
▪ For example, suppose a number of instructions are executed repeatedly over a short
period of time, as happens in a program loop, these instructions are made available in
the cache: and they can be fetched quickly during the period of repeated use.
▪ The same applies to data that are used repeatedly.

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Performance Measurements
5. PROCESSOR CLOCK
▪ Processor circuits are controlled by a timing signal called a clock.
▪ The clock defines regular time intervals, called clock cycles.
▪ To execute a machine instruction, the processor divides the action to be performed into a sequence of
basic steps, such that each step can be completed in one clock cycle.
▪ The length P of one clock cycle is an important parameter that affects processor performance.
▪ Its inverse is the clock rate, R = 1/P, which is measured in cycles per second.
▪ The standard electrical engineering terminology for the term ‘cycles per second’ is called hertz (Hz).
▪ The term “million” is denoted by the prefix Mega (M) and “billion’ is denoted by the prefix Giga (G).
Hence, 500 million cycles per second is usually abbreviated to 500 Megahertz (MHz) and 1250 million
cycles per second is abbreviated to 1.25 Gigahertz (GHz).

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Performance Measurements
5. PROCESSOR CLOCK
▪ Processor circuits are controlled by a timing signal called a clock.

▪ The clock defines regular time intervals, called clock cycles.

▪ To execute a machine instruction, the processor divides the action to be performed into a
sequence of basic steps, such that each step can be completed in one clock cycle.

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Performance Measurements
6. BASIC PERFORMANCE EQUATION
▪ Let T be the processor time required to execute a program that has been prepared some high-
level language.
▪ The number N is the actual number of instruction executions, and is not necessarily equal to
the number of machine instructions in the object program.
▪ Some instructions may be executed more than once which is the case for instructions inside a
program loop. Others may not be executed at all, depending on the input data used.
▪ Suppose that the average number of basic steps needed to execute one machine instruction is
S, where each basic step is completed in one clock cycle.
▪ If the clock rate is R cycles per second, the program execution time is given by
𝑵 ∗ 𝑺
𝑻=
𝑹

▪ This is referred to as the basic performance equation.

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Performance Measurements
6. BASIC PERFORMANCE EQUATION
▪ If the clock rate is R cycles per second, the program execution time is given by
𝑵𝒙𝑺
𝑻=
𝑹
▪ The performance parameter T for an application program is much more important to the user
than the individual values of the parameters N, S or R.
▪ To achieve high performance, the value of T must be reduced, which means reducing the
values of N and S, and increasing the value of R.
▪ The value of N is reduced if source program is compiled into fewer machine instructions.
▪ The value of S is reduced if instructions have a smaller number of basic steps to perform or if
the execution of instructions is overlapped.
▪ Using a higher-frequency clock increases the value or R, which means that the time required
to complete a basic execution step is reduced.
▪ We must emphasize that N, S, and R are not independent parameters: changing one may affect
another.
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Performance Measurements
7. CLOCK RATE
▪ There are two possibilities for increasing the clock rate, R.
▪ First, improving the integrated-circuit (IC) technology makes logic circuits faster,
which reduces the time needed to complete a basic step.
▪ This allows the clock period P, to be reduced and the clock rate R, to be increased.
▪ Second reducing the amount of processing done in one basic step also makes it
possible to reduce the clock period, P.
▪ Increases in the value of R that are entirely caused by improvements in IC technology
affect all aspects of the processor’s operation equally with the exception of the time it
takes to access the main memory.
▪ In the presence of a cache, the percentage of accesses to the main memory is small.
▪ The value of T will be reduced by the same factor as R is increased because S and N
are not affected.
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Performance Measurements
8. PIPELINING AND SUPERSCALAR OPERATION
▪ If the instructions are executed one after another, the value of S (total number of basic
steps or clock cycles) increases to execute an instruction.
▪ A substantial improvement in performance can be achieved by overlapping the
execution of successive instructions, using a technique called pipelining.
▪ Ex:Add R1, R2, R3//Adds the contents of registers R1 and R2 and stores sum in R3
▪ Actual working:
✓ The contents of R1 and R2 are first transferred to the inputs of the ALU.
✓ After the add operation is performed, the sum is transferred to R1.
✓ The processor can read the next instruction from the memory while the addition
operation is being performed.

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Performance Measurements
8. PIPELINING AND SUPERSCALAR OPERATION
▪ Key-point:
▪ Parallel execution must preserve the logical correctness of programs (results produced
must be the same as those produced by serial execution of program instructions)
▪ Many of today’s high-performance processors are designed to operate in this manner.
SUPERSCALAR OPERATION PIPELINING OPERATION
▪ Several scalar instructions can be ▪ Allows also several instructions to be
initiated simultaneously and executed executed at the same time, but at
independently. different pipeline stages at a given
moment.

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Performance Measurements
9. INSTRUCTION SET: CISC AND RISC
RISC CISC
▪ It is a Reduced Instruction Set Computer. ▪ It is a Complex Instruction Set Computer.
▪ It emphasizes on software to optimize the ▪ It emphasizes on hardware to optimize the
instruction set. instruction set.
▪ Is a hardwired unit of programming in the ▪ Is a microprogramming unit in CISC
RISC Processor. Processor.
▪ Requires multiple register sets to store the ▪ Requires a single register set to store the
instruction. instruction.
▪ RISC has simple decoding of instruction. ▪ CISC has complex decoding of instruction.
▪ Uses of the pipeline are simple in RISC. ▪ Uses of the pipeline are difficult in CISC.
▪ Uses a limited number of instructions to be ▪ Uses a large number of instructions to be
executed at less time. executed consuming more time.
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9. INSTRUCTION SET: CISC AND RISC


RISC CISC
▪ Execution time of RISC is very short. ▪ Execution time of CISC is longer.
▪ Has fixed format instruction. ▪ Has variable format instruction.
▪ Programs written for RISC architecture ▪ Programs written for CISC architecture
occupies more memory space. occupies less memory space.
▪ RISC architecture can be used with high- ▪ CISC architecture can be used with low-end
end applications like telecommunication, applications like home automation, security
image processing, video processing, etc. system, etc.

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10. PERFORMANCE MEASUREMENT


▪ The only parameter that properly describes performance of a computer is the
execution time.
▪ Computing the value of T is not simple. Moreover, parameters such as the clock speed
and various architectural features are not reliable indicators of the expected
performance.
▪ For these reasons, the computer community adopted the idea of measuring computer
performance using benchmark programs.
▪ To make comparisons possible, standardized programs must be used.
▪ The performance measure is the time it takes a computer to execute a given
benchmark.

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10. PERFORMANCE MEASUREMENT


▪ The test is repeated for all the programs in the SPEC suite, and the geometric mean of the
results is computed.
▪ Let SPEC (System Performance Evaluation Cooperative) be the rating for program ‘i' in the
suite. The overall SPEC rating for the computer is given by
Running time on the reference computer
▪ SPEC rating = Running time on the computer under test

▪ where ‘n’ is the number of programs in the suite.


▪ The SPEC rating is a measure of the combined effect of all factors affecting performance,
including the compiler, the operating system, the processor and the memory of the computer
being tested.

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Instruction Set Architecture – Memory Locations and


Addresses
▪ The memory is organized a group of n bits and it can be stored or retrieved in a single,
basic operation.
▪ Each group of n bits is referred to as a word of information, and n is called the word length.
▪ Modern computers have word lengths that typically range from 16 to 64 bits.
▪ If the word length of a computer is 32 bits, a single word can store a 32-bit 2’s-
complement number or four ASCII characters, each occupying 8 bits.

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Instruction Set Architecture – Memory Locations and


Addresses
▪ A unit of 8 bits is called a byte. Machine instructions may require one or more words for
their representation.
▪ Accessing the memory to store or retrieve a single item of information, either a word or a
byte, requires addresses for each item location.
▪ It is customary to use numbers from 0 through 2k −1, for some suitable value of k, as the
addresses of successive locations in the memory.

▪ The 2 k addresses constitute the address space of the computer, and the memory can
have up to 2 k addressable locations.
▪ A 32-bit address creates an address space of 232 or 4G (4 giga) locations, where 1G is
230. Other notational conventions that are commonly used are K (kilo) for the number
210 (1,024), and T (tera) for the number 240.

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Instruction Set Architecture – Memory Locations and


Addresses
BYTE ADDRESSABILITY
▪ There are three basic information quantities: the bit, byte, and word.
▪ A byte is always 8 bits, but the word length typically ranges from 16 to 64 bits.
▪ Memory locations assignments refers to successive byte locations in memory.
▪ Byte locations have addresses 0, 1, 2, . . . . Thus, if the word length of the machine is
32 bits, successive words are located at addresses 0, 4, 8, . . . , with each word
consisting of four bytes.
▪ There are two ways that byte addresses can be assigned across words called as
big-endian and little-endian assignments.

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Instruction Set Architecture – Memory Locations and


Addresses
BYTE ADDRESSABILITY

Both little-endian and


big-endian assignments
are used in commercial
machines.

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Instructions and Instruction Sequencing


• A computer has a set of instructions that allows the user to formulate any data-processing task. To carry out tasks,
regardless of whether a computer has 100 instructions or 300 instructions, its instructions must be capable of performing
following basic operations:
• Data transfers between the memory and the processor registers.
• Arithmetic and logic operations on data.
• Program sequencing and control.
• I/O control.
Register Transfer Notation
• We have seen that in a computer system data transfer takes place between processor registers and memory and between
processor registers and I/O system. These data transfers can be represented by standard notations given below :
• Processor registers are represented by notations R0, R1, R2,... and so on.
• The addresses of the memory locations are represented by names such as LOC, PLACE, MEM, etc.
• I/O registers are represented by names such as DATAIN, DATAOUT and so on.
• The contents of register or memory location are denoted by placing square brackets around the name of the register or
memory location.

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• Let us see following examples for clear understanding.


• Example: R2 ← [LOC]
• This expression states that the contents of memory location LOC are transferred into the processor register R2.
• Example: R3 ← [R1] + [R2]
• This expression states that the contents of processor registers R1and R2 are added and the result is stored into the
processor register R3.
• Example: [LOC] ← [R1] - [R2]
• This expression states that the contents of the processor register R2 is subtracted from processor register and the result is
stored into the memory location LOC.
• The notations explained above are commonly known as Register Transfer Notations (RTN). In these notations, the data
represented by the right-hand side of the expression is transferred to the location specified by the left hand side of the
expression, overwriting the old contents of that location.

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Assembly Language Notations


• Assembly language notations are the another type of notations used to represent machine instructions and programs.
These notations use assembly language formats. However, register names, names of memory locations are same as that
of register notations.
• Let us see some examples.
• Example: MOVE R2, R1
• This expression states that the contents of processor register R2 are transferred to processor register R1. Thus the
contents register R2 remain unchanged but contents of register R1 are overwritten.
• Example: ADD R1, R2, R3
• This expression states that the contents of processor registers R1 and R2 are added and the result is stored in the register
R3.
• It is important to note that the above expressions written in the assembly language notations has three fields: Operation,
source and destination having their positions from left to right. This order is followed by many computer. But there are
many computers in which the order of source and destination operands is reversed.

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Basic Instruction Types


• Each instruction of the CPU contain specific information fields, which are required to execute it. These information
fields of instructions are called elements of instruction. These are:
• Operation code : The operation code field in the instruction specifies the operation to be performed. The operation is
specified by binary code, hence the name operation code or simply opcode.
• Source / Destination operand: The source/destination operand field directly specifies the source/destination operand for
the instruction.
• Source operand address: We know that the operation specified by the instruction may require one or more operands. The
source operand may be in the CPU register or in the memory. Many times the instruction specifies the address of the
source operand so that operand(s) can be accessed and operated by the CPU according to the instruction.
• Destination operand address: The operation executed by the CPU may produce result. Most of the times the result is
stored in one of the operand. Such operand is known as destination operand. The instruction which produce result
specifies the destination operand address.
• Next instruction address: The next instruction address tells the CPU from where to fetch the next instruction after
completion of execution of current instruction. For JUMP and BRANCH instructions the address of the next instruction
is specified within the instruction. However, for other instructions, the next instruction to be fetched immediately follows
the current instruction.

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• Computers may have instructions of several different lengths containing varying number of addresses. According to
address reference there are three address, two address, one address and zero address reference instructions. Let us see
examples of each of them.
Three address instructions
• The three address instruction can be represented symbolically as
• ADD A, B, C
• where A, B, C are the variables. These variable names are assigned to distinct locations in the memory. In this instruction
operands A and B are called source operands and operand C is called destination operand and ADD is the operation to be
performed on the operands. Thus the general instruction format for three address instruction is
• Operation Source 1, Source 2, Destination
• The number of bits required to represent such instruction include:
• Bits required to specify the three memory addresses of the three operands. If n-bits are required to specify one
memory address, 3n bits are required to specify three memory addresses.
• Bits required to specify the operation.

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Two address instructions


• The two address instruction can be symbolically as
• ADD A, B
• This instruction adds the contents of variables A and B and stores the sum in variable B destroying its previous contents.
Here, operand A is source operand : however operand B serves as both source and destination operand. The general
instruction format for two address instruction is
• Operation Source, Destination
• To represent this instruction less number of bits are required as compared to three address instruction. The number of bits
required to represent two address instruction include:
• 1. Bits required to specify the two memory addresses of the two operands, i.e. 2n bits.
• 2. Bits required to specify the operation.

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One address instruction


• The one address instruction can be represented symbolicallyas
• ADD B
• This instruction adds the contents of variable A into the processor register called accumulator and stores the sum back
into the accumulator destroying the previous contents of the accumulator. In this instruction the second operand is
assumed implicitly in a unique location accumulator. The general instruction format for one address instruction is
• Operation Source
• Few more examples of one address instructions are :
• LOAD A: This instruction copies the contents of memory location A into the accumulator.
• STORE B: This instruction copies the contents of accumulator into memory location B.
• In one address instruction, it is important to note that the operand specified in the instruction can be either source
operand or destination operand depending on the instruction.
• For example, in LOAD A instruction, the operand specified in the instruction is a source operand whereas the operand
specified in the STORE B instruction is a destination operand. Similarly, in one address instruction the implied operand
(accumulator) can be either source or destination depending on the instruction.
Zero address instructions
• In these instructions, the locations of all operands are defined implicitly. Such instructions are found in machines that
store operands in a structure called a pushdown stack.
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Write a program to evaluate the arithmetic statement


Y = (A+B) * (C+D) using three-address, two-
address, one-address and zero-address instructions. Using one address instruction
Solution : LOAD A : AC←M[A]
Using three address instructions ADD B : AC←AC+M[B]
STORE T : M[T]←AC
ADD A, B,R1 : R1←M[A] + M[B] LOAD C : AC←M[C]
ADD C, D,R2 : R2←M[C] + M[D] ADD D : AC←AC+M[D]
MUL T : AC←AC*M[T]
MUL R1, R2,Y : M[Y]← R1 * R2
STORE Y : M[Y]←AC

Using two address instructions Using zero address instructions


PUSH A : TOS←A
MOV A, R1 : R1←M[A]
PUSH B : TOS←B
ADD B, R1 : R1←R1 + M[B] ADD TOS←(A+B)
MOV C, R2 : R2←M[C] PUSH C : TOS←C
PUSH D : TOS←D
ADD D, R2 : R2←R2+ M[D] ADD : TOS←(C+D)
MUL R2, R1 : R1← R1 R2 MUL : TOS←(C+D)*(A+B)
MOV R1, Y : [Y]← R1 POP Y : M[Y]←TOS

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Write the program to evaluate the expression


X =A [B+C(D+E)]/ F(G+H)using the zero address instructions
and one address instructions.
Solution :Program using zero address instructions
PUSH D : TOS←D
PUSH E : TOS←E
ADD : TOS←(D+E) Program using one address instructions
PUSH C : TOS←C LOAD H : AC← M[H]
ADD G : AC←AC + M[G]
MUL : TOS←C×(D+E)
MUL F : AC←AC*M[F]
PUSH B : TOS←B STORE T : M[T]←AC
ADD : TOS←B+C×(D+E) LOAD D : AC← M[D]
PUSH A : TOS←A ADD E : AC←AC + M[E]
ADD B : AC←AC + M[B]
MUL : TOS←A[B+C×(D+E)]
MUL A : AC←AC* M[A]
PUSH G : TOS←G DIV T : AC←AC/M[T]
PUSH H : TOS←H STORE Χ : M[X] ← AC
ADD : TOS←G+H
PUSHF : TOS←F
MUL : TOS←F× (G + H)
DIV : TOS A[B+C× (D+ E)]/F× (G + H)
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POPX : M [X] ← TOS

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X = A×B+C×C
Explain how the above expression will be executed in one
address, two address and three address processors in an
accumulator organization.
Solution :
Using one address instruction
LOAD A : AC← M[A] Using three address instructions
MUL B : AC←AC* M[B] MUL A, B, R1 : R1←M[A]*M[B]
MUL C, C, R2 : R2←M[C]+M[C]
STORE T : M[T] ←AC
Add R1, R1, X : M[X]←R1*R2
LOAD C : AC← M[C]
MUL C : AC←AC* M[C]
ADD T : AC←AC + M[T]
STORE X : M[X] ← AC
Using two address instructions
MOV A, R1 : R1←M[A]
MUL B, R1 : R1←R1*M[B]
MOV C, R2 : R2←M[C]
MUL C, R2 : R2←R2*M[C]
ADD R2, R1 : R1←R1+R2
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MOV R1, X : M[T]←R1

Write a program which evaluates the expression A×B+C×D in a single accumulator


processor. Assume that processor has load, store, multiply and add instructions and all the
values fit in the accumulator.

Solution :Program for single accumulator processor :


LOAD A : AC←M[A]
MUL B : AC←AC×M[B]
STORE X : M[X]←AC
LOAD C : AC←M[C]
MUL D : AC←AC×M[D]
ADD X : AC←AC+M[X]

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Instruction Execution and Straight Line Sequencing


• We have seen that instruction consists of opcode or opcode and operand/s or opcode and operand address.
• Every processor has some basic types of instructions such as data transfer instructions, arithmetic instructions, logical
instructions, branch instructions and so on.
• To perform a particular task on the computer, it is programmers job to select and write appropriate instructions one after the
other, i.e. programmer has to write instructions in a proper sequence. This job of programmer is known as instruction
sequencing.
• The instructions written in a proper sequence to execute a particular task is called program.
• Processor executes a program with the help of Program Counter (PC). PC holds the address of the instruction to be executed
next.
• To begin execution of a program, the address of its first instruction is placed into the PC. Then, the processor control
circuits use the information (address of memory) in the PC to fetch and execute instructions, one at a time, in the order of
increasing addresses. This is called straight-line sequencing.
• During the execution of instruction, the PC is incremented by the length of the current instruction in execution. For
example, if currently executing instruction length is 3 bytes, the PC is incremented by 3 so that it points to the instruction to
be executed next.

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Instruction Execution and Straight Line Sequencing

Branching
• Every time it is not possible to store a program in the consecutive memory locations. After execution of decision
making instruction we have to follow one of the two program sequences.
• In such cases we can not use straight-line sequencing. Here, we have to use branch instructions to transfer the program
control from one straight-line sequence to another straight-line sequence of instruction.
• we have decided to branch the program control after checking the condition. Such branch instructions are called
conditional branch instructions.
• In branch instructions the new address called target address or branch target is loaded into PC and instruction is fetched
from the new address, instead of the instruction at the location that follows the branch instruction in sequential address
order.
• The conditional branch instructions are used for program looping. In looping, the program is instructed to execute
certain set of instructions repeatedly to execute a particular task number of times. For example, to add ten numbers
stored in the consecutive memory locations we have to perform addition ten times.

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Conditional Codes
• The condition code flags are used to store the results of certain condition when certain operations are performed during
execution of the program. The condition code flags are stored in the status registers. The status register is also referred to as
flag register.
• ALU operations and certain register operations may set or reset one or more bits in the status register.
• Status bits lead to a new set of microprocessor instructions. These instructions permit the execution of a program to change
flow on the basis of the condition of bits in the status register. So the condition bits in the status register can be used to take
logical decisions within the program. Some of the common condition code flags are :
1. Carry/Borrow: The carry bit is set when the summation of two 8-bit numbers is greater than 1111 1111 (FFH). A borrow
is generated when a large number is subtracted from a smaller number.
2. Zero: The zero bit is set when the contents of register are zero after any operation. This happens not only when you
decrement the register, but also when any arithmetic or logical operation causes the contents of register to be zero.
3. Negative or sign: In 2's complement arithmetic, the most significant bit is a sign bit. If this bit is logic 1, the number is
negative number, otherwise a positive number. The negative bit or sign bit is set when any arithmetic or logical operation
gives a negative result.
4. Auxiliary carry: The auxiliary carry bit of status register is set when an addition in the first 4-bits causes a carry into the
fifth bit. This is often referred as half carry or intermediate carry. This is used in the BCD arithmetic.
5. Overflow Flag: In 2's complement arithmetic, most significant bit is used to represent sign and remaining bits are used
to represent magnitude of a number.This flag is set if the result of a signed operation is too large to fit in the number of bits
available (7-bits for 8-bit number) to represent it.
6. Parity:When the result of an operation leave the indicated register with an even number of 1's, parity bit is set.
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Addressing Modes

• Addressing modes in computer architecture refer to the various methods used to specify the operands
(data) for instructions in a program.
• Different addressing modes provide flexibility in how data is accessed and manipulated. Here are
some common addressing modes:
• Immediate Addressing: Fast but limited to constant values.
• Register Addressing: Very fast, used for operations on data already in registers.
• Direct Addressing: Simplicity in addressing but limited by address space.
• Indirect Addressing: Flexibility with dynamic data access.
• Indexed Addressing: Useful for accessing elements in arrays.
• Base-Register Addressing: Efficient for accessing data structures with a base address.
• Relative Addressing: Useful for branching and loop control.
• Register Indirect Addressing: Allows flexible and dynamic memory access

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1. Immediate Addressing 3. Direct Addressing

Description: The operand is specified directly within the Description: The instruction specifies the exact memory address
instruction itself. where the operand is located.

Example: MOV R1, #5 Example: LOAD R1, 1000

Explanation: This instruction moves the constant value Explanation: Loads the data from memory address 1000 into
5 into register R1. The # symbol indicates an immediate register R1. The address 1000 is a direct address.
value.
4. Indirect Addressing
2. Register Addressing
Description: The operand is in a register, and the Description: The instruction specifies a register or memory
instruction specifies which register to use. location that holds the address of the operand.

Example: ADD R1, R2 Example: LOAD R1, (R2)

Explanation: Adds the value in register R2 to the value Explanation: If R2 contains the address 2000, the instruction
in register R1 and stores the result in register R1. loads the data from memory address 2000 into register R1. The
value of R2 is used as a pointer to the actual data location.

SSG 85

5. Indexed Addressing 7. Relative Addressing

Description: Combines a base address from a register Description: The effective address is determined by adding an
with an offset to calculate the effective address. offset to the current instruction address.

Example: LOAD R1, 1000(R2) Example: BRANCH 100

Explanation: The effective address is computed as R2 + Explanation: If the current instruction address is 2000, this
1000. The instruction loads the data from this computed branch instruction will jump to address 2100. The offset 100 is
address into register R1. added to the current address.

6. Base-Register Addressing 8. Register Indirect Addressing


Description: Uses a base address from a register and
adds an offset to it. Description: The address of the operand is held in a register, and
this register is used to access the operand.
Example: LOAD R1, 50(R2)
Example: MOV R2, (R1)
Explanation: The effective address is R2 + 50. The
instruction loads data from this address into R1. This is Explanation: If R1 contains the address 3000, the instruction
particularly useful for accessing elements in arrays or moves the data from address 3000 into register R2. The address
structures. is indirectly specified by the contents of R1.

SSG 86

43

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