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Coal

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16 views3 pages

Coal

Uploaded by

sofow30059
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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COAL

NAME:
Rai M Fahad (456)
M Farhan (292)
ROLL NO:
SU92-BSCSM-F23-456.
SU92-BSCSM-F23-456.
SECTION:
3-F.
DEPARTMENT:
DEPARTMENT OF COMPUTER SCIENCES.

SUPERIOR UNIVERSITY GOLD


CAMPUS 6-km MAIN
RAIWIND ROAD LAHORE.

DEPARTMENT OF COMPUTER SCIENCES


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COAL

Bus System and Data Transfer in Computer


Architecture
In computer architecture, the bus system serves as the main communication pathway,
connecting essential components like the CPU, memory, and peripheral devices. A bus is
essentially a collection of wires or lines that allows data to move back and forth between
these components. There are three key types of buses:

1. Data Bus: The data bus is responsible for transferring actual data between the CPU,
memory, and other devices. Its width (e.g., 8-bit, 16-bit, 32-bit) determines how much
data can be moved at one time, affecting the system's data transfer rate.

2. Address Bus: This bus carries memory addresses from the CPU to other parts of
the system, directing the CPU to specific memory locations where data can be read
from or written to. The width of the address bus impacts how much memory can be
addressed by the system.

3. Control Bus: The control bus manages signals that control operations like reading
and writing data, telling each component what action to take during data transfer. It
helps coordinate and regulate data transfer, ensuring smooth communication.

Bus System Architectures


 Single Bus System:

In this setup, all components share a single bus. While it's simple and cost-effective, it can
become congested when multiple components try to use it simultaneously, which may lead
to slower data transfer rates.

 Multiple Bus System:

This design involves separate buses for different parts of the system, such as a dedicated
memory bus and I/O bus. This reduces the traffic on a single bus, improving efficiency and
speed by allowing components to operate independently.

Types of Data Transfer


 Synchronous Data Transfer:

In synchronous transfers, both the sender and receiver operate in sync with a clock signal.
This coordination allows for fast and efficient data transfers but requires precise timing.
DEPARTMENT OF COMPUTER SCIENCES
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COAL

 Asynchronous Data Transfer:

Unlike synchronous transfer, asynchronous transfer doesn’t rely on a shared clock.


Instead, it uses handshaking signals to indicate when data is ready to be sent and received.
This flexibility makes it suitable for devices with different speeds.

Direct Memory Access (DMA)

DMA is a system that allows devices to transfer data directly to or from memory without
involving the CPU. This is particularly useful for high-speed devices, like hard drives, as it
reduces CPU workload and increases overall system efficiency.

Bus Control Mechanisms

When multiple devices need to access the bus simultaneously, bus arbitration is used to
decide which device gets access. Common methods include daisy chaining, where the bus
request passes through each device in a chain until it finds one that needs access.

DEPARTMENT OF COMPUTER SCIENCES


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