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15 views22 pages

1 课程概述

Uploaded by

Roshan Raju
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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数字集成电路静态时序分析基础

邸志雄 博士, [email protected]

西南交通大学信息科学与技术学院

Copyright © 2018 芃苇_PengV. All Rights Reserved.


概述

01 数字芯片与FPGA设计流程

02 静态时序分析概述

03 课程内容规划

Copyright © 2018 芃苇_PengV. All Rights Reserved.


1 数字芯片与FPGA设计流程

Copyright © 2018 芃苇_PengV. All Rights Reserved.


数字芯片设计流程

引用自Prof. Jens Vygen @University of Bonn的《Combinatorial Optimization and Applications in VLSI


Copyright © 2018 芃苇_PengV. All Rights Reserved.

Design》课程。
数字芯片设计流程

引用自Prof. Jens Vygen @University of Bonn的《Combinatorial Optimization and Applications in VLSI


Copyright © 2018 芃苇_PengV. All Rights Reserved.

Design》课程。
数字芯片设计流程

引用自Prof. Jens Vygen @University of Bonn的《Combinatorial Optimization and Applications in VLSI


Copyright © 2018 芃苇_PengV. All Rights Reserved.

Design》课程。
数字芯片设计流程

引用自Prof. Jens Vygen @University of Bonn的《Combinatorial Optimization and Applications in VLSI


Copyright © 2018 芃苇_PengV. All Rights Reserved.

Design》课程。
数字芯片设计流程

引用自Prof. Jens Vygen @University of Bonn的《Combinatorial Optimization and Applications in VLSI


Copyright © 2018 芃苇_PengV. All Rights Reserved.

Design》课程。
数字芯片设计流程

引用自Prof. Jens Vygen @University of Bonn的《Combinatorial Optimization and Applications in VLSI


Copyright © 2018 芃苇_PengV. All Rights Reserved.

Design》课程。
数字芯片设计流程

引用自Prof. Jens Vygen @University of Bonn的《Combinatorial Optimization and Applications in VLSI


Copyright © 2018 芃苇_PengV. All Rights Reserved.

Design》课程。
数字芯片设计流程

引用自Prof. Jens Vygen @University of Bonn的《Combinatorial Optimization and Applications in VLSI


Copyright © 2018 芃苇_PengV. All Rights Reserved.

Design》课程。
数字芯片设计流程

引用自Prof. Jens Vygen @University of Bonn的《Combinatorial Optimization and Applications in VLSI


Copyright © 2018 芃苇_PengV. All Rights Reserved.

Design》课程。
数字芯片设计流程

前端 功能和指标定义 单元布局Place

架构设计 时钟树综合（CTS）

详细设计 布线Route

静态时序分析
功能验证（前仿真） Timing DRC/LVS

逻辑综合、优化 自动生成版图

一致性验证 功能验证（后仿真）

DFT 流片Tape out 后端

Copyright © 2018 芃苇_PengV. All Rights Reserved.


FPGA设计流程

Copyright © 2018 芃苇_PengV. All Rights Reserved.


2 静态时序分析概述

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静态时序分析概述

Setup Time - The length of time that data must stabilize before the clock transition.

Input
D Q

CLK
Clock

Hold Time - The length of time that data must remain stable at the input pin after the active clock
transition.

Input
D Q

CLK
Clock

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静态时序分析概述

RTL Domain
Functional
Testbench
Simulation

Synthesis

Equivalence Static Timing Analysis


checking
Clock
Scan Place Route
Tree

Gate-level Domain Equivalence Checking


Sign Off
Copyright © 2018 芃苇_PengV. All Rights Reserved.
静态时序分析概述

静态时序分析，英文全称：Static Timing Analysis，简称为STA

Event Driven Timing STA


simulation
Vector Generation Required Not Required
Design Coverage Vector dependent(limited) Vector independent exhaustive coverage
coverage
Runtime Takes several days/weeks of Analyzes multimillion gate
CPU time design in hours

Capacity Can run out of memory for Can easily handle multimillion
multimillion designs designs

Analysis/Debug No special features for timing Features such as min/mux analysis, on chip
features analysis variation, dynamic loop breaking case efforts
for timing analysis

Design style support No Restrictions Limited support for asynchronous design styles
Copyright © 2018 芃苇_PengV. All Rights Reserved.
3 课程内容规划

Copyright © 2018 芃苇_PengV. All Rights Reserved.


课程主要内容

① TCL语言入门、Synopsys TCL语言入门。
② 静态时序分析基础，包括工艺库、STA环境、时序检查方法、多时钟等特殊时
序分析等。
功能 工具 语言
③ SDC与习题。
数字综合 DC/Genus TCL

DFT Tessent/Dftmax TCL

布局布线 Innovus/ICC2 TCL


TCL 全称 「 Tool Command Language 」，从这个
静态时序仿真 PT/Tempus TCL
表格中，我们可以看到TCL语言在集成电路EDA tool
功耗分析 Redhawk/Voltus TCL
控制上基本处于霸主地位。
版图工具 Calibredrv TCL

物理验证 Calibre/PVS SVRF/TCL

形式验证
Copyright © 2018 芃苇_PengV. All Rights Reserved. LEC/Formality TCL
参考书目

① Static Timing Analysis for Nanometer Designs: A Practical Approach. J.


Bhasker, Rakesh Chadha. Springer Science Business Media, LLC 2009.
② 集成电路静态时序分析与建模. 刘峰, 机械工业出版社.出版时间：2016-07-01.
③ Using Tcl with Synopsys Tools. Version B-2008.09, March 2011. Synopsys.

Copyright © 2018 芃苇_PengV. All Rights Reserved.


谢谢聆听！
https://customizablecomputinglab.github.io/
个人教学工作主页https://customizablecomputinglab.github.io/

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