Spruid 3
Spruid 3
User's Guide
Preface ........................................................................................................................................ 6
1 Introduction ......................................................................................................................... 7
1.1 Supported Devices .......................................................................................................... 8
1.2 Overview of the Library ..................................................................................................... 8
1.3 Changes to Version 1 ....................................................................................................... 8
1.3.1 New Features ....................................................................................................... 8
1.3.2 Function Naming .................................................................................................... 9
1.3.3 Calling Convention ................................................................................................ 10
1.3.4 Bug Fixes ........................................................................................................... 10
1.4 Benchmarks ................................................................................................................. 10
2 Using the Digital Control Library .......................................................................................... 12
2.1 What the Library Contains ................................................................................................ 13
2.1.1 Header Files ....................................................................................................... 13
2.1.2 Source Files ........................................................................................................ 13
2.1.3 Examples ........................................................................................................... 14
2.2 How to Add the DCL to your Code....................................................................................... 14
2.2.1 Steps to Add the DCL to Existing C Code ..................................................................... 14
2.2.2 Calling the Library Functions From Assembly ................................................................. 16
3 Controllers ........................................................................................................................ 17
3.1 Linear PID Controllers ..................................................................................................... 18
3.1.1 Description ......................................................................................................... 18
3.1.2 Implementation .................................................................................................... 19
3.1.3 PID Functions ...................................................................................................... 23
3.2 Linear PI Controllers ....................................................................................................... 25
3.2.1 Description ......................................................................................................... 25
3.2.2 Implementation .................................................................................................... 26
3.2.3 Summary of PI Functions ........................................................................................ 28
3.3 Non-linear PID Controller.................................................................................................. 31
3.3.1 Description ......................................................................................................... 31
3.3.2 Implementation .................................................................................................... 35
3.3.3 NLPID Functions .................................................................................................. 36
3.4 Direct Form 1 (Third Order) Compensators............................................................................. 37
3.4.1 Description ......................................................................................................... 37
3.4.2 Implementation .................................................................................................... 39
3.4.3 DF13 Functions .................................................................................................... 40
3.5 Direct Form 2 (Second Order) Compensators ......................................................................... 44
3.5.1 Description ......................................................................................................... 44
3.5.2 Implementation .................................................................................................... 46
3.5.3 DF22 Functions .................................................................................................... 47
3.6 Direct Form 2 (Third Order) Compensators............................................................................. 50
3.6.1 Description ......................................................................................................... 50
3.6.2 Implementation .................................................................................................... 52
3.6.3 DF23 Functions .................................................................................................... 53
4 Utilities .............................................................................................................................. 57
List of Figures
1-1. DCL Version 1 Function Naming .......................................................................................... 9
1-2. DCL Version 2 Function Naming .......................................................................................... 9
2-1. CCSv6 Include Options .................................................................................................... 14
3-1. Parallel Form PID Controller .............................................................................................. 18
3-2. PID Control Action ......................................................................................................... 19
3-3. DCL_PID_C1 Architecture ................................................................................................ 21
3-4. DCL_PID_C3 Architecture ................................................................................................ 22
3-5. DCL_PI_C1 Architecture .................................................................................................. 26
3-6. DCL_PI_C3 architecture .................................................................................................. 27
3-7. Non-Linear PID Input Architecture ....................................................................................... 31
3-8. Non-Linear PID Output Architecture ..................................................................................... 32
3-9. Non-Linear Control Law Input-Output Plot .............................................................................. 33
3-10. NLPID Linearized Region ................................................................................................. 34
3-11. DCL_DF13_C1 Architecture .............................................................................................. 37
3-12. DCL_DF13_C2C3 Architecture ........................................................................................... 38
3-13. DF13 Data and Coefficient Layout ....................................................................................... 39
3-14. DCL_DF22_C1 Architecture .............................................................................................. 45
3-15. DCL_DF22_C2 Architecture .............................................................................................. 45
3-16. DCL_DF22_C3 Architecture .............................................................................................. 46
3-17. DCL_DF23_C1 Architecture .............................................................................................. 50
3-18. DCL_DF23_C2 Architecture .............................................................................................. 51
3-19. DCL_DF23_C3 Architecture .............................................................................................. 51
3-20. DF23 Data and Coefficient Layout ....................................................................................... 52
4-1. Data Log Pointer Allocation ............................................................................................... 60
4-2. TCM Operation in TCM_idle Mode ...................................................................................... 66
4-3. TCM Operation in TCM_armed Mode ................................................................................... 67
4-4. TCM Operation in Capture Mode (monitor frame un-winding) ....................................................... 68
4-5. TCM Operation in TCM_capture Mode (lead frame complete) ...................................................... 69
4-6. CM Capture Complete ..................................................................................................... 70
4-7. Transient Servo Error ...................................................................................................... 73
5-1. Graph Setup Window ...................................................................................................... 79
5-2. ek Buffer ..................................................................................................................... 79
5-3. Plot of u1k and u2k Buffers ............................................................................................... 80
5-4. u1k Memory Buffer at Address 0xE000 ................................................................................. 81
5-5. Plot of u1k Memory Buffer ................................................................................................ 81
5-6. Expression Window ........................................................................................................ 83
5-7. Expression Window ........................................................................................................ 84
5-8. Expression Window ........................................................................................................ 86
5-9. Contents of the 1601-Point yBuf Memory ............................................................................... 87
5-10. 350-Point Contents of the dBuf Buffer ................................................................................... 87
List of Tables
1-1. Controller Execution and Code Size Benchmarks ..................................................................... 10
2-1. List of DCL Header Files .................................................................................................. 13
2-2. List of DCL Source Files .................................................................................................. 13
3-1. List of PID Structure Elements and Address Offsets .................................................................. 21
3-2. Summary of PID Functions ............................................................................................... 23
3-3. List of PI Structure Elements and Address Offsets .................................................................... 26
3-4. PI Functions ................................................................................................................. 28
3-5. List of NLPID Structure Elements and Address Offsets............................................................... 35
3-6. Summary of NLPID Functions ............................................................................................ 36
3-7. List of DF13 Structure Elements and Address Offsets ................................................................ 39
3-8. Summary of DF13 Functions ............................................................................................. 40
3-9. List of DF22 Structure Elements and Address Offsets ................................................................ 46
3-10. Summary of DF22 Functions ............................................................................................. 47
3-11. List of DF23 Structure Elements and Address Offsets ................................................................ 52
3-12. Summary of DF23 Functions ............................................................................................ 53
4-1. Summary of Clamp Functions ............................................................................................ 58
4-2. Data Log Read/Write Benchmarks ....................................................................................... 60
4-3. Summary of DCL Functions .............................................................................................. 61
4-4. Summary of TCM Functions .............................................................................................. 71
4-5. Performance Index Function Benchmarks .............................................................................. 74
4-6. Summary of IES Functions................................................................................................ 74
Related Documentation
For a complete list of related documentation and development tools for the C2000 device, visit the C2000
page on the Texas Instruments website at www.ti.com/c2000.
Introduction
This chapter contains a brief introduction to the Texas Instruments C2000 Digital Control Library.
DCL_runDF23pc
DCL_runDF23_C1
Identifier
Library Identifier A unique number which identifies the
controller implementation
Controller type
PID CPU core
PI C = FPU32
DF13 L = CLA
DF22
DF23
In the new name format, the controller type, and the CPU on which it runs are explicit. This has been done
to allow future expansion of the library with variations of each controller type. An example of this is the PID
controller that exists in both “ideal” and “parallel” forms in the new library. The final digit is an arbitrary
number that identifies the implementation. Users may add their own controller variations to the DCL
controllers by adjusting the final two characters of the function name.
All previous function names have been deprecated in the new library. Previous names are mapped to the
new equivalents using the definition list seen near the top of the DCL.h header file. It is not necessary to
change any existing code that uses version 1.0 function names.
1.4 Benchmarks
Table 1-1 lists the performance of each library function by cycle count. In all cases, cycle count
benchmarks were measured by logging a free-running PWM timer before and after each function call.
Therefore, the measured cycle count includes the function calling overhead from the C environment.
Compiler optimization was disabled in all tests. Function sizes are given in units of 16-bit words, as
reported in the “.map” file.
(1)
All paths operating in linearized error region. For all paths in non-linear operation, total cycle count is approximately 1,433. For
more information, see Section 3.3.1.
(2)
Measured with run-time library support for the pow() function.
2.1.3 Examples
Six examples are supplied with the Digital Control Library. These were prepared using CCS version 6 and
run without modification on the F28069 device. The examples include linker command files that show how
to allocate device memory when using the DCL. For more details, see Chapter 5.
If you want to include the data logger or functions in the TCM, you must also include those respective
header files. Note that the TCM includes the data log header file.
If you want to use the non-linear PID functions, the header file “DCL_NLPID.h” must be included in
your program. Note that the NLPID does not run on the CLA and the header file should not be included
in any CLA files.
Controllers
This chapter provides detailed information on the controller functions in the Digital Control Library.
The DCL contains six basic types of controller.
• Linear PID
• Linear PI
• Non-linear PID
• Direct Form 1 (third order)
• Direct Form 2 (second order)
• Direct Form 2 (third order)
In this guide, the three direct form types are referred to as “compensators”. This reflects a situation typical
in power supply design, where the objectives are to compensate some feature of the open loop frequency
response, such as phase shift. In such cases the controller is specified using a set of pole and zero
frequencies, which leads naturally to a transfer function description. The “Direct Form” nomenclature
comes from different implementations of digital filters having transfer function descriptions.
Each controller type is coded in C, and in assembly using two different instruction sets (FPU32 and CLA).
There are therefore three different functions for each controller. For more information on function names,
see Section 1.3.2. Additionally, each of the three Direct Form compensators is implemented in both full
and pre-computed forms.
An exception is the non-linear PID controller that is only available in C coded form. At the present time,
support for the pow() function used in the control law is only available in the standard C run-time support
library. Note that this controller is not supported on the CLA.
The description of each controller in this chapter is broken down into three subsections.
• A general description of the controller
• Information of the implementation of the controller
• A detailed list of functions
The implementation subsection always includes a block diagram showing the variables used in the code.
Local variables, which do not need to be preserved between functions, are pre-fixed with the letter “v”.
Variables that are part of the controller structure and, therefore, preserved between functions, are pre-
fixed with some other letter according to their purpose. For example, “i10” refers to a variable used in the
PID integrator. These same variable names are used in the library source code, so it is straightforward to
correlate the source code with the diagrams.
All functions in the DCL are re-entrant.
3.1.1 Description
The basic controller described here is a linear PID type. The PID implementations in the DCL include
several features not commonly found in basic PID designs, and this complexity is reflected the benchmark
figures. Applications that do not require derivative action, or are more sensitive to cycle efficiency, may be
better served by the simpler PI controller structure described in Chapter 4.
PID control is widely used in systems that employ output feedback control. In such systems, the controlled
output is measured and fed back to a summing point where it is subtracted from the reference input. The
difference between the reference and feedback corresponds to the control loop error (or servo error) and
forms the input to the PID controller.
The PID controller output is the parallel sum of three paths that act on the error, error integral, and error
derivative, respectively. The relative weight of each path is adjusted by the user to optimize transient
response.
Kp
Ki
œ
+ + +
r(t) u(t)
-
+
Kd
y(t)
d
dt
The diagram above shows the structure of a continuous time “parallel” PID controller. The output of this
controller is captured in Equation 1.
t de(t )
u (t ) K p e(t ) K i ³ e(W ) dW Kd
f dt (1)
Conceptually, the controller comprises three separate paths connected in parallel. The upper path
contains an adjustable gain term (Kp). Its effect is to fix the open loop gain of the control system. Since
loop gain is proportional to this term, Kp is known as proportional gain.
A second path contains an integrator that accumulates error history. A separate gain term acts on this
path. The output of the integral path changes continuously as long as a non-zero error (e) is present at the
controller input. A small but persistent servo error has the effect of driving the output of the integrator such
that the loop error will eventually disappear. The principal effect of the integral path is therefore to
eliminate steady state error. The effect of the integral gain term is to change the rate at which this
happens. Integral action is especially important in applications such as electronic power supplies, which
must maintain accurate regulation over long periods of time.
The third path contains a differentiator. The output of this path is large whenever the rate of change of the
error is large. The principal effect of the derivative action is to damp oscillation and reduce transients.
The operation of the PID controller can be visualized in terms of the transient error following a step
change of set-point.
Figure 3-2 shows the action of the PID controller in terms of the control loop error at time t1. The
proportional term contributes a control effort that is proportional to the instantaneous loop error. The
output of the integral path is the accumulated error history: the shaded area in the lower plot. The
contribution of the derivative path is proportional to the rate of change of the loop error. Derivative gain
fixes the time interval over which a tangential line to the error curve is projected forward in time.
Tuning the PID controller is a matter of finding the optimum combination of these three effects. This in turn
means finding the best balance of the three gain terms. For more information on PID control and tuning,
see Section 6.1.
The PID shown above is known as the “parallel” form because the three controller gains appear in
separate parallel paths. A different PID architecture in which the proportional gain is moved into the output
path (that is, after the summing point), so that the proportional path becomes a direct connection between
the controller input and the summing point, is known as the “ideal” form. In the ideal form, the open loop
gain is directly influenced by the proportional controller gain, and there is less interaction between the
controller gains. However, the proportional gain cannot be zero (since the loop would be opened), and to
maintain good control cannot be small. The parallel form allows the proportional gain to be small;
however, there is slightly more interaction between the three controller gains. The DCL contains both ideal
and parallel PID functions.
3.1.2 Implementation
The linear PID controllers in the DCL include the following features:
• Parallel and ideal forms
• Programmable output saturation
• Independent reference weighting on proportional path
• Anti-windup integrator reset
• Programmable low-pass derivative filter
The memory address offsets of the structure elements are shown in Table 3-1.
+ v6
Kr
Ki -
+ v7 + v8 + + v9 upos
r(k) u(k)
- + uneg
i10 + -
Kp z-1 v12 ==0
i14 ? v11
z-1 l(k)
Kd d2
z-1 v4
v1 -
y(k)
+ -
z-1
c1 d3
c2
v6
Ki
+ v5 v7 + v8 + + v9 umax
r(k) u(k)
- + umin
+
i10 + -
z-1 v12 ==0
y(k) i14 ? v11
z-1 l(k)
Kd d2
z-1 v4
v1 -
+ -
z-1
c1 d3
c2
Declaration float DCL_runPID_C1(PID *p, float rk, float yk, float lk)
Description This function executes an ideal form PID controller on the C28x. The function is coded in
C28x assembly.
Parameters
Declaration float DCL_runPID_C2(PID *p, float rk, float yk, float lk)
Description This function executes an ideal form PID controller on the C28x, and is identical in
structure and operation to the C1 form. The function is coded in inline C.
Parameters
Declaration float DCL_runPID_C3(PID *p, float rk, float yk, float lk)
Description This function executes a parallel form PID controller on the C28x. The function is coded
in inline C.
Parameters
Declaration float DCL_runPID_C4(PID *p, float rk, float yk, float lk)
Description This function executes a parallel form PID controller on the C28x, and is identical in
structure and operation to the C3 form. The function is coded in inline C.
Parameters
Declaration float DCL_runPID_L1(PID *p, float rk, float yk, float lk)
Description This function executes an ideal form PID controller on the CLA. The function is coded in
CLA assembly.
Parameters
Declaration float DCL_runPID_L2(PID *p, float rk, float yk, float lk)
Description This function executes a parallel form PID controller on the CLA. The function is coded
in CLA assembly.
Parameters
3.2.1 Description
The continuous time parallel PI control equation is shown in Equation 7.
t
u (t ) K p e(t ) K i ³ e(W ) dW
f (7)
The linear PI controllers in the DCL differ from the PID in the following respects:
• Removal of derivative path
• Removal of set-point weighting
• No provision for external saturation input
In all other regards the PI controllers are similar to the PID controllers described in the previous
subsection.
3.2.2 Implementation
All linear PI controller functions use a common C structure to hold coefficients and data, defined in the
header file “DCL.h”.
typedef volatile struct {
float Kp; //!< Proportional gain
float Ki; //!< Integral gain
float i10; //!< I storage
float Umax; //!< Upper saturation limit
float Umin; //!< Lower saturation limit
float i6; //!< Saturation storage
} PI;
The memory address offsets of the structure elements are shown in Table 3-3.
v2
Kp Ki
+ v1 v3 v8 + v4 + + v5
r(k) u(k)
- +
i10 + -
i6 z-1
y(k)
==0 v6
z-1
?
Kp
v2
Ki
+ v1 v3 v8 + v4 + v5
r(k) + u(k)
- +
i10 + -
i6 z-1
y(k)
v6
z-1 ==0?
Description This function executes an ideal form PI controller on the C28x. The function is coded in
C28x assembly.
Parameters
p The PI structure
rk The controller set-point reference
yk The measured feedback value
Description This function executes an ideal form PI controller on the C28x, and is identical in
structure and operation to the C1 form. The function is coded in inline C.
Parameters
p The PI structure
rk The controller set-point reference
yk The measured feedback value
Description This function executes a parallel form PI controller on the C28x. The function is coded in
inline C.
Parameters
p The PI structure
rk The controller set-point reference
yk The measured feedback value
Description This function executes a parallel form PI controller on the C28x, and is identical in
structure and operation to the C3 form. The function is coded in inline C.
Parameters
p The PI structure
rk The controller set-point reference
yk The measured feedback value
Description This function executes an ideal form PI controller on the CLA. The function is coded in
CLA assembly.
Parameters
p The PI structure
rk The controller set-point reference
yk The measured feedback value
Description This function executes an ideal form PI controller on the CLA. The function is coded in
CLA assembly.
Parameters
p The PI structure
rk The controller set-point reference
yk The measured feedback value
3.3.1 Description
The DCL includes one implementation of a non-linear PID controller, denoted NLPID. The controller is
similar to the DCL implementation of ideal PID, except that there is no set-point weighting and the
derivative path sees the servo error instead of the feedback. A non-linear gain block appears in series with
each of the three paths.
To improve computational efficiency, the non-linear law is separated into two parts: one part that is
common to all paths, and a second part that contains terms specific to each path. The non-linear part of
the high-level controller structure is shown in Figure 3-7.
P-term v4
non-linear block
v1
+ Pre-conditioning v2 I-term
r(k) v5
- block non-linear block
v3
y(k)
D-term
non-linear block v9
v4
Kp
+
Ki -
+ v13
+ v8 + upos
v5 u(k)
uneg
+
i7 + -
-1
Kp i16 z v15
==0?
z-1 l(k)
Kd d2
z-1 v12
v10 -
v9
+ -
z-1
c1 d3
c2
The non-linear control law is based on a power function of the modulus of the servo error, with a linearized
region about the zero error point. In Equation 8, x represents the input to the control law, y, the output,
and α is a user selectable modulus exponent representing the degree of non-linearity.
y x
D sign x
(8)
Figure 3-9 shows the x-y relationship for values of α between 0.2 and 2. Notice that the curves intersect at
x = 0, and x = ±1.
. = 0.2
0.8
0.6
0.4
0.2
.=2
0
-0.2
-0.4
-0.6
-0.8
-1
-1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1
The gain of the control law is the slope of the x-y curve. Observe that with α = 1 the control is linear with
unity gain. With α > 1 the gain is zero when x = 0, and increases as x increases. In the controller, this
value of α produces controller gain that increases with increasing control error. With α < 1, the gain at x =
0 is infinite, and falls as x increases. This α setting produces controller gain that decreases with increasing
control error.
The presence of zero or infinite gain at the zero control error point leads to practical control difficulties. For
example, with α < 1, it is common to encounter oscillation or “chattering” near the steady-state. These
issues can be overcome by limiting the controller gain close to x = 0. This is done by modifying the control
law as follows to introduce a user selectable region about x = 0 with linear gain is applied. The non-linear
control law becomes
- x D sign x : x tG
°
y ®
°¯ x G D 1 : x dG (9)
When the magnitude of servo error falls below δ, the linear gain is applied; otherwise, the gain is
determined by the non-linear law. For computational efficiency, define the gain in the linear region as γ.
J GD 1 (10)
A typical plot of the linearized control law is shown in Figure 3-10. Observe that when x = δ the linear and
non-linear curves intersect, so the controller makes a smooth transition between the linear and non-linear
regions as the servo error passes through x = ±δ.
Ó/
x
/
In addition to the P, I, and D gains, the user must select two additional terms in each control path: α and δ.
The library includes a separate function to compute and update γ for each path.
The NLPID controller has been seen to provide significantly improved control in many cases; however, it
must be remembered that increased gain, even if only applied to part of the control range, can lead to
significantly increased output from the controller. In most cases, this ‘control effort’ is limited by practical
factors such as actuator saturation, PWM modulation range, and so on. The corollary is that not every
application benefits equally from the use of non-linear control and some may see no benefit at all. In
cases where satisfactory performance cannot be achieved through the use of linear PID control, the user
is advised to start with all α = 1, and experiment by introducing non-linear terms gradually while monitoring
both control performance and the magnitude of the control effort. In general, P and I paths benefit from
increased gain at high servo error (α > 1), while the D path benefits from reduced gain at high servo error
(α <1), but this is not universally true.
Further information on this control law can be found in: “From PID to Active Disturbance Rejection
Control”, Jingqing Han, IEEE Transactions on Industrial Electronics, Vol. 56, NO. 3, March 2009.
3.3.2 Implementation
The NLPID controller uses a C structure to hold coefficients and data, defined in the header file
“DCL_NLPID.h”. Note that the NLPID functions make use of the “pow()” function in the standard C library.
For this reason, the header file “math.h” must be included, which is not supported by the CLA compiler. To
allow different DCL functions to be run on both the CPU and CLA in the same program, the NLPID
functions are located in a separate header file. The NLPID structure is shown below.
typedef volatile struct {
float Kp; //!< Linear proportional gain
float Ki; //!< Linear integral gain
float Kd; //!< Linear derivative gain
float alpha_p; //!< P path non-linear exponent
float alpha_i; //!< I path non-linear exponent
float alpha_d; //!< D path non-linear exponent
float delta_p; //!< P path linearized range
float delta_i; //!< I path linearized range
float delta_d; //!< D path linearized range
float gamma_p; //!< P path gain limit
float gamma_i; //!< I path gain limit
float gamma_d; //!< D path gain limit
float c1; //!< D path filter coefficient 1
float c2; //!< D path filter coefficient 2
float d2; //!< D path filter intermediate storage 1
float d3; //!< D path filter intermediate storage 2
float i7; //!< I path intermediate storage
float i16; //!< Intermediate saturation storage
float Umax; //!< Upper saturation limit
float Umin; //!< Lower saturation limit
} NLPID;
The memory address offsets of the NLPID structure are shown in Table 3-5.
As with all DCL controllers, it is the responsibility of the user to initialize the NLPID structure before use. A
set of default values is defined in the library header file and can be used with the variable declaration. An
example of an initialized NLPID structure declaration is shown below.
NLPID myCtrl = NLPID_DEFAULTS;
Declaration float DCL_runNLPID_C1(NLPID *p, float rk, float yk, float lk)
Description This function executes a non-linear PID controller on the C28x. The function is coded in
inline C.
Parameters
Description This function computes the three gain limits for the non-linear PID controller on the
C28x. The function is coded in inline C.
Parameters
3.4.1 Description
The Direct Form 1 (DF1) structure is a common type of discrete time control structure used to implement a
control law specified either as a pole-zero set, or as a rational polynomial in z (transfer function). The DCL
includes one third order DF1 example, denoted “DF13”.
In general, the Direct Form 1 structure is less numerically robust than the Direct Form 2 (see below), and
for this reason users are encouraged to choose the latter type whenever possible. The DF13 structure is
very common in digital power supplies and for that reason is included in the library. The same function
supports a second order control law after the superfluous coefficients (a3 and b3) have been set to zero.
The general form of third order transfer function is shown in Equation 11.
b0 b1z 1 b2z 2 b3 z 3
F (z)
1 a1z 1 a2z 2 a3 z 3 (11)
Notice that the coefficients have been adjusted to normalize the highest power of z in the denominator.
There is no notational standard for numbering of the controller coefficients. The notation used here has
the advantage that the coefficient suffixes are the same as the delay line elements and this helps with
clarity of the assembly code, however, other notation may be found in the literature. The corresponding
difference equation is shown in Equation 12.
u(k ) b0e(k ) b1e(k 1) b2e(k 2) b3e(k 3)
a1u(k 1) a2u(k 2) a3u(k 3) (12)
The DF13 controller uses two, three-element delay lines to store previous input and output data required
to compute u(k). A diagrammatic representation is shown in Figure 3-11.
d1 d2 d3
d0 e(k-1) e(k-2) e(k-3)
-1 -1 -1
e(k) z z z
b0 b1 b2 b3
v0 v1 v2 v3
+ + + + u(k)
d4
v7 v6 v5
-1 -1 -1
z z z
u(k-3) u(k-2) u(k-1)
d7 d6 d5
The DF13 control law consists of seven multiplication operations that yield seven partial products, and six
addition or subtraction operations that combine the partial products to obtain the compensator output, u(k).
When implemented in this way, the control law is referred to as the “full” DF13 form.
The DF13 control law can be re-structured to reduce control latency by pre-computing six of the seven
partial products that are already known in the previous sample interval. The control law is then broken into
two parts: the “immediate” part and the “partial” part.
The advantage of doing this is to reduce the “sample-to output” delay, or the time between e(k) being
sampled, and a corresponding u(k) becoming available. By partially pre-computing the control law, the
computation delay can be reduced to one multiplication and one addition.
In the kth interval, the immediate part is computed.
u(k ) b0e(k ) v (k 1) (13)
th
Next, the v(k) partial result is pre-computed for use in the (k+1) interval.
v (k ) b1e(k ) b2e(k 1) b3e(k 2) a1u(k ) a2u(k 1) a3u(k 2) (14)
Structurally, the pre-computed control law can be drawn as shown in Figure 3-12.
d1 d2
d0
-1 e(k-1) -1 e(k-2)
e(k) e(k) z z
b0 b1 b2 b3
v1 v2 v3
+ u(k) + + + v(k+1)
v6 v5 v4
-1 -1
z z u(k)
u(k-2) u(k-1)
d6 d5
The pre-computed structure allows the controller output (u(k)) to be used as soon as it is computed. The
remaining terms in the third order control law do not involve the newest input e(k) and, therefore, do not
affect u(k). These terms can be computed after u(k) has been applied to the control loop and the input-
output latency of the controller is therefore reduced.
A further benefit of the pre-computed structure is that it allows the control effort to be clamped after the
immediate part. Computation of the pre-computed part can be made dependent on the outcome of the
clamp such that if u(k) matches or exceeds the clamp limits there is no point in pre-computing the next
partial control variable and the computation can be avoided. The DCL includes three clamp functions
intended for this purpose (see Chapter 4).
3.4.2 Implementation
All DF13 functions use a common C structure to hold coefficients and data, defined in the header file
“DCL.h”.
typedef volatile struct {
float c[8]; // coefficients
float d[8]; // data
} DF13;
The memory address offsets of the structure elements are shown in Table 3-7.
The assignment of coefficients and data in the DF13 structure to those in the diagram is shown in
Figure 3-13.
Coefficients Data
It is the responsibility of the user to initialize both arrays prior to use. A set of default values is defined in
the library header file and can be used with the variable declaration. An example of an initialized DF13
structure declaration is shown below:
DF13 myCtrl = DF13_DEFAULTS;
Description This function computes a full third order control law using the Direct Form 1 structure.
The function is coded in C28x assembly.
Parameters
Description This function computes the immediate part of the pre-computed DF13 controller. The
function is coded in C28x assembly.
Parameters
Description This function computes the partial result of the pre-computed DF13 controller. The
function is coded in C28x assembly.
Parameters
Description This function computes a full third order control law using the Direct Form 1 structure,
and is identical in structure and operation to the C1 form. The function is coded in inline
C.
Parameters
Description This function computes the immediate part of the pre-computed DF13 controller. The
function is identical in structure and operation to the C2 form. The function is coded in
inline C.
Parameters
Description This function computes the partial result of the pre-computed DF13 controller. The
function is identical in structure and operation to the C3 form. The function is coded in
inline C.
Parameters
Description This function computes a full third order control law using the Direct Form 1 structure,
and is identical in structure and operation to the C1 form. The function is coded in CLA
assembly language.
Parameters
Description This function computes the immediate part of the pre-computed DF13 controller. The
function is identical in structure and operation to the C2 form. The function is coded in
CLA assembly language.
Parameters
Description This function computes the partial result of the pre-computed DF13 controller. The
function is identical in structure and operation to the C3 form. The function is coded in
CLA assembly language.
Parameters
3.5.1 Description
The C2000 Digital Controller Library contains a second order implementation of the Direct Form 2
controller structure, denoted “DF22”. This structure is sometimes referred to as a “bi-quad” filter and is
commonly used in a cascaded chain to build up digital filters of high order.
The transfer function of a second order discrete time compensator is shown in Equation 15.
b0 b1z 1 b2z 2
F (z)
1 a1z 1 a2z 2 (15)
The corresponding difference equation is shown in Equation 16.
u( k ) b0e(k ) b1e(k 1) b2e(k 2) a1u(k 1) a2u(k 2) (16)
Figure 3-14 shows a diagrammatic representation of the full Direct Form 2 realization.
b0
v0 v7
e(k) + u(k)
x1
-1
b1 z -a1
x1d v5
v1 v3
+
x2 v6
-1
b2 z -a2
x2d
v2 v4
+
As with the DF13 compensator, sample-to-output delay can be reduced through the use of pre-
computation. The immediate and pre-computed control laws are as follows. In the kth interval, the
immediate part is computed.
u(k ) b0e(k ) v (k ) (17)
th
Next, the v(k) partial result is pre-computed for use in the (k+1) interval.
v (k 1) b1e(k ) b2e(k 1) a1u(k ) a2u(k 1) (18)
The pre-computed form of DF22 is shown in Figure 3-15 and Figure 3-16.
b0
e(k) + u(k)
x1
v(k)
b1 -a1
x1d
v1 v3
+
x2
-1
b2 z -a2
x2d
v2 v4
+
3.5.2 Implementation
All DF22 functions use a common C structure to hold coefficients and data, defined in the header file
“DCL.h”.
The memory address offsets of the structure elements are shown in Table 3-9.
It is the responsibility of the user to initialize both arrays prior to use. A set of default values is defined in
the library header file and can be used with the variable declaration. An example of an initialized DF22
structure declaration is shown below:
DF22 myCtrl = DF22_DEFAULTS;
Description This function computes a full second order control law using the Direct Form 2 structure.
The function is coded in C28x assembly.
Parameters
Description This function computes the immediate part of the pre-computed DF22 controller. The
function is coded in C28x assembly.
Parameters
Description This function computes the partial result of the pre-computed DF22 controller. The
function is coded in C28x assembly.
Parameters
Description This function computes a full second order control law using the Direct Form 2 structure,
and is identical in structure and operation to the C1 form. The function is coded in inline
C.
Parameters
Description This function computes the immediate part of the pre-computed DF22 controller. The
function is identical in structure and operation to the C2 form. The function is coded in
inline C.
Parameters
Description This function computes the partial result of the pre-computed DF22 controller. The
function is identical in structure and operation to the C3 form. The function is coded in
inline C.
Parameters
Description This function computes a full third order control law using the Direct Form 2 structure,
and is identical in structure and operation to the C1 form. The function is coded in CLA
assembly language.
Parameters
Description This function computes the immediate part of the pre-computed DF22 controller. The
function is identical in structure and operation to the C2 form. The function is coded in
CLA assembly language.
Parameters
Description This function computes the partial result of the pre-computed DF22 controller. The
function is identical in structure and operation to the C3 form. The function is coded in
CLA assembly language.
Parameters
3.6.1 Description
The third order Direct Form 2 compensator (DF23) is similar in all respects to the DF22 compensator.
Separate full and pre-computed forms are supplied in C and assembly for computation on the C28x, and
in assembly for computation on the CLA.
The control law is the same as the DF13 compensator.
u(k ) b0e(k ) b1e(k 1) b2e(k 2) b3e(k 3)
a1u(k1) a2u(k 2) a3u(k 3) (19)
Figure 3-17 shows a diagrammatic representation of the full third order Direct Form 2 compensator.
e(k)
b3 b2 b1 b0
v6 v4 v2 v1
v7 v5 v3
Sample-to-output delay can be reduced through the use of pre-computation, in a similar way to the DF22
compensator. In the kth interval, the immediate part is computed.
u(k ) b0e(k ) v (k ) (20)
th
Next, the v(k) partial result is pre-computed for use in the (k+1) interval.
v (k 1) b1e(k ) b2e(k 1) b3e(k 2) a1u(k ) a2u(k 1) a3u (k 2) (21)
Figure 3-18 and Figure 3-19 show the pre-computed form of DF23.
e(k)
b0
v(k) + u(k)
e(k)
b3 b2 b1
v6 v4 v2
x3d x3 x2d x2 x1
-1 -1
+ z + z + v(k + 1)
v7 v5 v3
u(k)
3.6.2 Implementation
All DF23 functions use a common C structure to hold coefficients and data, defined in the header file
“DCL.h”.
The memory address offsets of the structure elements are shown in Table 3-11.
The assignment of coefficients and data in the DF23 structure to those in the diagram shown in Figure 3-
20.
Coefficients Data
It is the responsibility of the user to initialize both arrays prior to use. A set of default values is defined in
the library header file and can be used with the variable declaration. An example of an initialized DF23
structure declaration is shown below:
DF23 myCtrl = DF23_DEFAULTS;
Description This function computes a full third order control law using the Direct Form 2 structure.
The function is coded in C28x assembly.
Parameters
Description This function computes the immediate part of the pre-computed DF23 controller. The
function is coded in C28x assembly.
Parameters
Description This function computes the partial result of the pre-computed DF23 controller. The
function is coded in C28x assembly.
Parameters
Description This function computes a full third order control law using the Direct Form 1 structure,
and is identical in structure and operation to the C1 form. The function is coded in inline
C.
Parameters
Description This function computes the immediate part of the pre-computed DF23 controller. The
function is identical in structure and operation to the C2 form. The function is coded in
inline C.
Parameters
Description This function computes the partial result of the pre-computed DF23 controller. The
function is identical in structure and operation to the C3 form. The function is coded in
inline C.
Parameters
Description This function computes a full third order control law using the Direct Form 2 structure,
and is identical in structure and operation to the C1 form. The function is coded in CLA
assembly language.
Parameters
Description This function computes the immediate part of the pre-computed DF23 controller. The
function is identical in structure and operation to the C2 form. The function is coded in
CLA assembly language.
Parameters
Description This function computes the partial result of the pre-computed DF23 controller. The
function is identical in structure and operation to the C3 form. The function is coded in
CLA assembly language.
Parameters
Utilities
This chapter describes the supporting functions included in the Digital Control Library.
The Digital Controller Library includes a small number of utilities intended to support use of the library.
These include:
• Clamp functions for the CPU and CLA
• A floating-point data-logger
• A Transient Capture Module
• Functions for measurement of control performance
4.1.1 Description
The library contains three functions for clamping a control variable to specified upper and lower limits.
These would typically be used to bound the output of a controller function to pre-defined limits to avoid
actuator saturation or overload. Saturation in a control loop must be handled with care since control of the
system is effectively lost. Furthermore, controllers that implement integration of historical servo data can
exhibit a phenomenon known as “wind-up”, in which the controller output increases in magnitude while the
loop is saturated. This condition leads to delay in recovering from the saturation because the accumulated
controller output must be “wound down” before it comes within range of the actuator and the controller
resumes proper operation. For more information on wind-up, refer to the linear PID controller description
in Section 3.1.
The clamp functions bound the input data variable to pre-determined limits and return a logical value 1 if
either bound is matched or exceeded. If the input data lies definitely within limits (for example, neither
bound is matched or exceeded) the functions return logical 0. The return value can be used by the PID
regulators in the library to implement anti-windup reset, and may be used to clamp the output of the pre-
computed forms of DF1 and DF2 compensators. An example of the latter can be found in the DF22
example project supplied with the library (see Chapter 5).
A difference exists between the C28x clamp function and that of the CLA. On the CPU the returned value
is an unsigned integer of either 0 or 1, while the corresponding CLA function returns a floating point value
of 0.0f or 1.0f. This is because the handling of fixed-point data on the CLA is less efficiently supported
than on the main CPU.
Description This function clamps a floating-point data value to defined limits and returns a non-zero
integer if either limit is matched or exceeded. The function is coded in assembly.
Parameters
Return 0 if the data lies definitely within limits, 1 if the data matches or exceeds the limits.
Description This function clamps a floating-point data value to defined limits and returns a non-zero
integer if either limit is matched or exceeded. The function is coded in inline C.
Parameters
Return 0 if the data lies definitely within limits, 1 if the data matches or exceeds the limits.
Description This function clamps a floating-point data value to defined limits and returns a non-zero
floating-point result if either limit is matched or exceeded. The function is coded in CLA
assembly.
Parameters
Return 0 if the data lies definitely within limits, 1 if the data matches or exceeds the limits.
4.2.1 Description
The Digital Control Library includes a general-purpose floating-point data logger utility, which is useful
when testing and debugging control applications. The intended use of the data logger utility is to capture a
stream of data values in a block of memory for subsequent analysis. The data logger is supplied in the
form of a C header file and one assembly file, and it may be used on any C2000 device irrespective of
whether the DCL is used. The utility may not be used on the CLA.
The data logger operates with arrays of 32-bit floating-point data. The location, size and indexing of each
array are defined by three pointers capturing the start address, end address, and data index address. All
three pointers are held in a common C structure with the data type “FDLOG”, defined as follows.
typedef volatile struct {
float *fptr;
float *lptr;
float *dptr;
} FDLOG;
Conceptually, the relationship between the array pointers and the elements of a data array of length “N” is
shown in Figure 4-1.
The data index pointer (dptr) always points to the next address to be written or read, and advances
through the memory block as each new data value is written into the log. On reaching the end of the log,
the pointer is reset to the first address in the log. The data logger header file contains a set of in-line C
functions to access and manipulate data logs.
To use the data logger, you must include the header file “DCL_fdlog.h” in your project. Typically, a user
would create an instance of an FDLOG structure as follows:
FDLOG myBuf = FDLOG_DEFAULTS;
The log pointers can then be initialized in the user’s code such that they reference a memory block in a
specific address range. Thereafter, the code can clear or load the buffer a specific data value, and then
begin writing data into it using the DCL_writeLog() function. The DF22 code example project shows how
this is done.
Version 2.0 of the DCL adds two functions that perform fast read and write to a data log. These are
assembly coded functions in the source file “DCL_frwlog.asm”. The execution cycles for these and the
corresponding C coded DCL functions are shown in Table 4-2.
Parameters
Return None
Description This function resets the data index pointer to start of the data log.
Parameters
Return None
Description This function assigns the buffer pointers to a memory block or array and sets the data
index pointer to the first address.
Parameters
Return None
Description This function writes a data point into the buffer and advances the indexing pointer,
wrapping if necessary. The function returns the data value being over-written, which
allows simple implementation of a fixed-length delay line.
Parameters
Description This function fills the data log with a given data value and resets the data index pointer
to the start of the log.
Parameters
Return None
Description This function clears the buffer contents by writing 0 to all elements and resets the data
index pointer to the start of the log.
Parameters
Return None
Description This function reads a data point from the buffer and then advanced the index pointer,
wrapping if necessary.
Parameters
Description This function copies the contents of one log into another and resets both buffer index
pointers. The function assumes both logs have the same length.
Parameters
Return None
Description This function reads a data point from the log and then advances the indexing pointer,
wrapping if necessary. This function is coded in assembly.
Parameters
Description This function writes a data point into the buffer and advances the indexing pointer,
wrapping if necessary. Returns the over-written data value for delay line or FIFO
implementation. This function is coded in assembly.
Parameters
The current mode is available in the “mode” element in the TCM structure. To use the TCM, the user must
do the following.
1. Include the header file “TCM.h” in the project
2. Allocate a RAM memory block to hold the full capture buffer.
3. Create an instance of the TCM structure and initialize it using DCL_initTCM().
4. Arm the TCM using DCL_armTCM()
5. Log data into the TCM using DCL_runTCM()
6. Monitor the “mode” element in the TCM structure to determine when the capture is complete.
A code example illustrating the use of the TCM is supplied with the library and is described in Chapter 5.
In the following diagrams, lead, capture, and monitor frames are indexed using the FDLOG structures x, y,
and z, respectively (note that these are not the names used in the TCM structure). FDLOG pointers are
color coded blue, green, and red, respectively. To help visualize the sequence of events, the diagram
shows the data that will eventually be logged into the TCM in light gray, and in blue the current frame
contents in each mode.
Capture Frame
umax
umin
y.fptr x.lptr
y.dptr
Capture Frame
umax
umin
y.fptr x.lptr
y.dptr
Capture Frame
umax
umin
Once the lead frame is full, the monitor frame stops copying out its data. Incoming data continues being
logged into the capture frame until it is full. The monitor frame contents have now been completely loaded
into the lead frame and will be over-written.
Capture Frame
umax
umin
Capture Frame
umax
umin
y.fptr x.lptr
y.dptr
The buffer contents may now be read out using DCL_readLog() or DCL_freadLog().
Declaration void DCL_initTCM(TCM *q, float *addr, uint16_t size, uint16_t lead, float tmin, float tmax)
Description This function resets the TCM module. All buffer contents are loaded with zero, and the
operating mode is set to “TCM_idle”.
Parameters
Return None
Description This function resets the TCM. The contents of the capture frame are loaded with zero.
All data log pointers are re-initialized, and the operating mode is set to “TCM_idle”.
Parameters
Description If the current TCM mode is “TCM_idle”, this function changes it to “TCM_armed”,
otherwise it is unchanged.
Parameters
Parameters
4.4.1 Description
The Digital Control Library includes functions for the computation of control performance. All functions are
based on discrete integration over a fixed interval of a variable representing servo error. The result is a
non-negative scalar representing the quality of control: the smaller the result, the better the control.
Figure 4-7 shows conceptually the transient servo error during a typical transient response.
y(t)
Transient error
e(t0) = r(t0) - y(t0)
0 t
t0
Table 4-5 shows cycle count benchmarks for each function, for a buffer of N data points. Cycle counts
include function calling overhead from C.
Description This function computes an IES performance index using the servo error data in a given
memory block. The function is coded in assembly.
Parameters
Parameters
Description This function computes an IES performance index using the servo error data in a given
memory block. The function is coded in assembly.
Parameters
Parameters
Parameters
Parameters
Examples
This chapter describes the example projects shipped with the Digital Controller Library.
The Digital Controller Library package includes a set of code examples intended to illustrate how to
integrate the library functions into a user program. All examples are supplied as CCS projects prepared for
use with the F28069, and will run on any target board fitted with that device. Code changes to support a
different C2000 device are minimal and do not affect the DCL. There are six example projects:
• DF22 compensator running on C28x
• DF23 compensator running on CLA
• NLPID controller running on C28x
• PI controller running on CLA
• PID controller running on C28x
• TCM running on C28x
The examples are located in the C2000ware installation directory, at the sub-directory
“\libraries\control\DCL\c28\examples”. Each example has a “CCS” sub-directory containing a “.projectspec”
file, which should be imported as a project into your CCS workspace.
The following sections describe the example code and outline the steps to run them. The examples were
prepared using CCS version 6 and a F28069 target board. It is assumed the reader is familiar with CCS
v6 and how to build and run code. For information on these topics, the reader is referred to the F28069
training workshop (see Section 6.2).
Figure 5-1 shows how to configure the graph to view the pre-computed compensator output (u2k).
Figure 5-3 shows what the plot of the u1k and u2k buffers should look like.
These results were produced by the full DF23 compensator. To view the pre-computed compensator,
change the “Start Address” field in Graph Properties to 0x10000. The buffer at address 0x12000 contains
the difference in compensator results, all of which should be zero or very small.
The user can run repeatedly to the break-point, modifying controller parameters and examining the
change of controller variables. If any of the “alpha” or “delta” parameters are changed, the variable
“calFlag” should be set to 1 to enable the “gamma” gains to be computed and updated in the background
loop.
At this point, controller gains can be manually changed and the code run repeatedly to observe the effect
on the control variables.
The user can run repeatedly to the break-point modifying controller parameters and examining the change
of controller variables.
• Lines 108-109: compute the servo error and log is to the eBuf data buffer
• Line 112: detects if the final point in the input buffer has been processed
• Lines 118-120: compute the three performance indices
Open a second graph to display the 350-point contents of the dBuf buffer at address 0x12000.
The TCM buffer contains part of the feedback data near the transient. Notice that the first part of the TCM
buffer (approximately 25 samples) contains data that has not exceeded either trigger threshold. This is the
lead frame.
Support
This chapter contains a list of useful technical resources relevant to the DCL.
6.1 References
Documentation for C2000 MCU devices can be found on their respective product pages at
www.ti.com/c2000.
The following is a list of relevant publications:
• Feedback & Control Systems J.J.DiStefano, A.R.Stubberud and I.J.Williams, Schaum, 2011
• Digital Control of Dynamic Systems G.F.Franklin, J.D.Powell & M.L.Workman, Addison-Wesley, 1998
• Control Theory Fundamentals R.Poley, CreateSpace, 2015
• Running an Application from Internal Flash Memory on the TMS320F28xxx DSP
• TMS320C28x Assembly Language Tools User’s Guide
• TMS320C28x Optimizing C/C++ Compiler v16.12.0.STS User's Guide
6.2 Training
• Training materials for the C2000 devices from Texas Instruments can be found at
processors.wiki.ti.com/index.php/Category:C2000_Training
• Recordings of a 1-day hands-on workshop using the F28069 device can be found at
training.ti.com/c2000-mcu-1-day-workshop-8-part-series
• Information on a series of technical seminars in control theory can be found at
www.controltheoryseminars.com.
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