MPMC U3&u4 Part-C Key
MPMC U3&u4 Part-C Key
1. Show the blocks of registers and the processing units of 8051 microcontroller associated for
execution of an instruction ADD A,40H
The 8051 microcontroller consists of several functional blocks, including registers and processing
units, to execute instructions. To execute the instruction "ADD A, 40H" on an 8051 microcontroller,
you would typically use the Accumulator (A) and one of the general-purpose registers, let's say R0, to
perform the addition. Here's how it works:
1. Accumulator (A): The Accumulator is a special-purpose register used for various arithmetic and
logic operations. It is the primary register for accumulating and storing results.
2. General-Purpose Registers (R0, R1, etc.): The 8051 microcontroller has multiple general-purpose
registers. In this case, we're using R0 as a source register.
Now, let's break down the execution of the instruction "ADD A, 40H":
1. Load the value from memory address 40H into the source register (R0).
2. Add the contents of R0 to the Accumulator (A).
3. Store the result back into the Accumulator (A).
Before:
A: [Accumulator] (Initial value of Accumulator)
R0: [40H] (Value loaded from memory address 40H)
Execution:
A = A + R0 (Perform the addition)
After:
A: [New Accumulator] (Result of the addition)
R0: [40H] (Unchanged)
The processing unit within the 8051 microcontroller performs these operations by fetching, decoding,
and executing the instruction. In this case, it loads the value from memory into a register, performs the
addition, and stores the result back in the Accumulator.
the execution of an instruction like "ADD A, 40H" on an 8051 microcontroller involves several other
registers and control lines, including:
1. Program Counter (PC): The PC keeps track of the memory address of the next instruction to be
executed. After executing an instruction, the PC is automatically incremented to point to the next
instruction in memory.
2. Instruction Register (IR): The IR holds the current instruction being executed. In the case of "ADD
A, 40H," the IR would initially contain this instruction.
3. ALU (Arithmetic Logic Unit): The ALU is responsible for performing arithmetic and logic
operations, such as addition. In the execution of "ADD A, 40H," the ALU is used to perform the
addition operation between the Accumulator (A) and the source register.
4. Flags Register (PSW): The Program Status Word (PSW) register contains various flags that indicate
the status of the microcontroller, including carry, overflow, and zero flags. The result of the addition in
"ADD A, 40H" can affect these flags.
5. Data Memory: The data memory is where the value at memory address 40H is stored. This is where
the data is retrieved and loaded into the source register (R0).
6. Control Lines: Various control lines, such as the Read/Write (R/W) line and the Memory Enable
(MEN) line, are used to control memory operations, including reading the value from memory and
writing back the result.
7. Clock and Control Unit: This unit generates clock signals and control signals that synchronize the
operations of the microcontroller, ensuring that instructions are executed in the correct sequence.
In the case of "ADD A, 40H," the microcontroller's control unit coordinates the fetching, decoding,
and execution of the instruction. The instruction is fetched from memory, the source operand is loaded
into the source register (R0), the ALU performs the addition, and the result is stored back in the
Accumulator (A). The flags in the PSW may be updated based on the result of the addition.
2. Illustrate the signals of 8051 with neat diagram, also specify the significance of each signal.
1. ALE (Address Latch Enable): ALE is used to indicate that valid address information is present on
the address bus. It is generated by the microcontroller to latch the address from the external bus for
certain operations.
2. PSEN (Program Store Enable): PSEN is used to
indicate that the microcontroller is accessing a program
memory location. It is active during code fetch
operations and helps to distinguish between code fetch
and data read/write cycles.
6. XTAL1 and XTAL2 (Crystal Oscillator Input and Output): These are the connections for an external
crystal or oscillator that provides the clock signal for the microcontroller. The clock frequency directly
affects the microcontroller's operation.
7. RST (Reset): RST is a signal used to reset the microcontroller. It can be generated externally or by
software. A reset initializes the microcontroller, bringing it to a known state.
8. ALE/PROG (Address Latch Enable/Program Store Enable): This signal serves a dual purpose,
acting as ALE during address latching and as PSEN during program store enable. Its significance
changes based on the microcontroller's operation mode.
9. T0 and T1 (Timer 0 and Timer 1): These are control signals for Timer 0 and Timer 1. They are used
to start, stop, and control the timers, which are essential for generating timing delays and measuring
time intervals.
10. INT0 and INT1 (External Interrupt 0 and External Interrupt 1): These signals are used to trigger
external hardware interrupts, allowing the microcontroller to respond to external events.
11. TXD and RXD (Transmit Data and Receive Data): These signals are used for serial
communication, typically with a UART (Universal Asynchronous Receiver/Transmitter) module. TXD
transmits data, while RXD receives data.
12. XRAM (External RAM Enable): XRAM is used to enable external RAM, allowing the
microcontroller to use external memory for data storage when needed.
These signals play a crucial role in the operation of the 8051 microcontroller, controlling memory
access, timing, communication, and external interrupts, among other functions. Their proper
management and synchronization ensure that the microcontroller operates as intended.
3. I) Design a circuit to interface 64KB of External RAM and 64KB of External ROM with the
8051 Microcontroller.
II) Describe how the memory is organized for program and data.
In the 8051 microcontroller, memory is organized into program memory (code memory) and data
memory (RAM). Let's take a closer look at how memory is organized for both program and data in the
8051:
2. Code Address Range: The program memory addresses range from 0000H to 0FFFH (0 to 4095 in
decimal). The program counter (PC) stores the address of the next instruction to be executed within
this range.
3. Code Execution: Instructions are fetched from program memory using the PC and are executed
sequentially. The PSEN (Program Store Enable) signal is activated during code fetch cycles to
distinguish them from data memory access.
4. Code Protection: In some 8051 variants, it is possible to protect the program memory from
accidental or unauthorized writes. This is achieved by setting certain configuration bits.
2. Data Address Range: The data memory addresses range from 00H to 7FH (0 to 127 in decimal).
Different addresses within this range can be used for various purposes, including general data storage
and special function registers (SFRs).
3. Special Function Registers (SFRs): A portion of the data memory is allocated for SFRs, which are
registers with predefined functions. These registers control various aspects of the microcontroller, such
as timers, UART, I/O ports, and interrupt control.
4. Stack: The data memory also includes a stack area, typically starting at address 07H. The stack is
used for storing return addresses and local variables when subroutines (functions) are called.
5. Data Access: Data memory can be read from and written to using the RD (Read) and WR (Write)
control signals. The MOV instruction is commonly used to transfer data between the Accumulator (A),
general-purpose registers, and data memory locations.
6. XRAM (External RAM): In some 8051 variants, additional external RAM can be interfaced with
the microcontroller to expand the data memory beyond the 128 bytes provided by the on-chip RAM.
In summary, the 8051 microcontroller has a well-defined memory organization where program
memory holds the machine code instructions, and data memory is used for data storage and control
registers. Understanding this memory organization is crucial for writing and executing programs on
the 8051 microcontroller.
5. Interpret Data transfer and arithmetic instructions in 8051 with suitable examples.
In the 8051 microcontroller, data transfer and arithmetic instructions are fundamental for manipulating
data and performing calculations. These instructions move data between registers, memory, and the
Accumulator (A), which is a key register for arithmetic operations. Here are some examples of data
transfer and arithmetic instructions in the 8051, along with explanations:
1. MOV (Move): The MOV instruction transfers data from one location to another.
2. MOVC (Move Code): MOCC is used to move data from program memory to a register. It's
typically used in conjunction with the program counter (PC).
3. MOVX (Move External): MOVX transfers data between the Accumulator (A) and external memory
locations when interfacing external memory.
Arithmetic Instructions:
1. ADD (Addition): The ADD instruction performs addition on the contents of the Accumulator (A)
with a specified source.
Example 1: ADD A, R0
- This instruction adds the value in Register R0 to the Accumulator (A).
2. SUBB (Subtraction with Borrow): SUBB subtracts a value from the Accumulator (A) while
considering the borrow from the previous subtraction operation.
Example: SUBB A, R1
- This instruction subtracts the value in Register R1 from the Accumulator (A) and considers any
borrow from the previous operation.
3. INC (Increment): The INC instruction increments the value in the specified register or memory
location.
Example: INC R2
- This instruction increments the value in Register R2 by 1.
4. DEC (Decrement): The DEC instruction decrements the value in the specified register or memory
location.
5. MUL (Multiply):
The MUL instruction in the 8051 is used to perform an 8-bit multiplication between the Accumulator
(A) and a specified register or memory location.
MUL AB ; Multiply the contents of A and B
6. DIV (Divide):
The DIV instruction in the 8051 is used to perform an 8-bit division operation. It divides a 16-bit value
formed by the Accumulator (A) and Register B by an 8-bit divisor specified in another register or
memory location.
DIV AB ; Divide the value formed by A and B by a divisor
These instructions are the building blocks for data manipulation and arithmetic operations in the 8051
microcontroller. They allow you to perform a wide range of tasks, including data transfers,
mathematical calculations, and memory access.
6. Build the sequence of instructions utilizing the 8051 to determine the square and cube of an 8-bit
value.
7. Assuming that ROM space starting at 250H contains “America”, create a program to transfer
the bytes into RAM locations starting at 40H.
8. Construct a program for an 8051 microcontroller that sets, masks, and adds the 2's complement
to an 8-bit value.
Unit – IV
1. Discuss the functions of 8051's ports and circuitry with necessary diagram.
Each port of 8051 has bidirectional capability. Port 0 is called 'true bidirectional port' as it floats
(tristated) when configured as input. Port-1, 2, 3 are called 'quasi bidirectional port'. Port-0 Pin Structure
Port -0 has 8 pins (P0.0-P0.7).
Port-0 can be configured as a normal bidirectional I/O port or it can be used for address/data interfacing
for accessing external memory. When control is '1', the port is used for address/data interfacing. When the
control is '0', the port can be used as a normal bidirectional I/O port.
When the control is '1', address/data bus controls the output driver MOSFETs. If the address/data bus
(internal) is '0', the upper MOSFET is 'off' and the lower MOSFET is 'on'. The output becomes '0'. If the
address/data bus is '1', the upper transistor is 'on' and the lower transistor is 'off'. Hence the output is '1'.
Hence for normal address/data interfacing (for external memory access) no pull-up resistors are required.
Port-1 Pin Structure, Port-1 has 8 pins (P1.1-P1.7) .The structure of a port-1 pin is shown in fig below.
Port-1 does not have any alternate function i.e. it is dedicated solely for I/O interfacing. When used as
output port, the pin is pulled up or down through internal pull-up. To use port-1 as input port, '1' has to be
written to the latch. In this input mode when '1' is written to the pin by the external device then it read
fine. But when '0' is written to the pin by the external device then the external source must sink current
due to internal pull-up. If the external device is not able to sink the current the pin voltage may rise,
leading to a possible wrong reading.
PORT 2 Pin Structure, Port-2 has 8-pins (P2.0-P2.7) . The structure of a port-2 pin is shown in figure
below:
Port-2 is used for higher external address byte or a normal input/output port. The I/O operation is similar
to Port-1. Port-2 latch remains stable when Port-2 pin are used for external memory access. Here again
due to internal pull-up there is limited current driving capability.
PORT 3 Pin Structure, Port-3 has 8 pin (P3.0-P3.7). Port-3 pins have alternate functions. The structure of
a port-3 pin is shown in figure
Each pin of Port-3 can be individually programmed for I/O operation or for alternate function. The
alternate function can be activated only if the corresponding latch has been written to '1'. To use the port
as input port, '1' should be written to the latch. This port also has internal pull-up and limited current
driving capability.
2. Interpret the modes of operations in 8051 timers, with suitable diagram.
3. Assume XTAL= 11.0952 MHz, determine the value need to be loaded in the timer register, if the
delay is 5ms. Develop the program using 8051 microcontrollers to create a pulse width of 5ms on
P2.3. Use Timer 0.
4. Create code to (a) deliver the message "We are ready" to the computer. (b) take in any information
supplied by the PC and display it on the P1-connected LEDs. (c) gather information from switches
linked to P2 and send it serially to the PC. Use the 4800 Baud rate.
5. Illustrate the serial communication modes in 8051. Depicts the format SCON and PCON register.
The 8051 microcontroller supports serial communication through its UART (Universal Asynchronous
Receiver/Transmitter) module. Serial communication in the 8051 can be configured in several modes,
such as 8-bit UART, 9-bit UART, and multiprocessor communication mode. The SCON (Serial Control)
and PCON (Power Control) registers are essential for configuring and controlling serial communication
in the 8051.
- SM0 and SM1 (Serial Mode 0 and 1): These bits are used to select the UART's mode of operation. The
combination of SM0 and SM1 determines whether you are using 8-bit UART, 9-bit UART, or
multiprocessor communication mode.
- SM2 (Serial Mode 2): This bit is used in conjunction with SM0 and SM1 to configure the
multiprocessor communication mode.
- REN (Receiver Enable): When REN is set, it enables the UART receiver. If REN is cleared, the receiver
is disabled.
- TB8 (Transmitter Bit 8): This bit is used when using 9-bit data format. It allows you to send a ninth data
bit along with the eight data bits.
- RB8 (Receiver Bit 8): Similar to TB8, RB8 is used for 9-bit data reception.
- TI (Transmit Interrupt): This bit is set by the UART when the data transmission is completed. It can be
used to generate an interrupt when data transmission is finished.
- RI (Receive Interrupt): This bit is set by the UART when new data is received. It can be used to
generate an interrupt when new data is available for processing.
The PCON register contains various control bits, and SM2 is one of them when in the context of serial
communication.
- SM2 (Serial Mode 2): When in multiprocessor communication mode, this bit is used to identify the start
and stop bits of a frame.
To configure serial communication modes, you would set or clear the appropriate bits in the SCON and
PCON registers based on your requirements. The specifics may vary slightly depending on the 8051
microcontroller variant you are using, so it's important to refer to the datasheet or reference manual for
the exact bit settings for your particular microcontroller.
6. Create a program to transmit the character string "HELLO" to a serial port. Configure the baud
rate to 9600 with an 8-bit data and 1-bit stop.
7. Assume two switches are connected to pins P3.2 and P3.3, when a switch is pressed the
corresponding lines goes low. Create a program to (i) light all LEDs connected to port 0, if the first
switched is pressed. (ii) light all LEDs connected to port2 , if the second switch is pressed.
To achieve the desired functionality of lighting LEDs on port 0 when the first switch (connected to P3.2)
is pressed and lighting LEDs on port 2 when the second switch (connected to P3.3) is pressed, you can
use the following 8051 assembly code:
assembly
ORG 0x0000 ; Start of program
MAIN:
MOV P3, #0xFF ; Set P3 as input with pull-ups enabled
LIGHT_PORT_0:
MOV P0, #0x00 ; Turn on all LEDs on port 0
SJMP MAIN ; Return to the main loop
LIGHT_PORT_2:
MOV P2, #0xFF ; Turn on all LEDs on port 2
SJMP MAIN ; Return to the main loop
END
In this code:
Interrupts play a crucial role in the 8051 microcontroller, allowing it to respond to external events or
conditions without continuously polling inputs. The 8051 microcontroller supports five interrupt sources,
and these can be enabled or disabled using the IE (Interrupt Enable) register. Additionally, the IP
(Interrupt Priority) register allows you to set the priority level for each interrupt source. Below, I'll
provide an overview of the role of interrupts and the format of the IE and IP registers.
The 8051 microcontroller can operate in a multitude of applications that require real-time processing and
event-driven behavior. Interrupts allow the microcontroller to respond promptly to various events, such as
external hardware signals, timer overflows, and UART data reception, without the need for constant
polling. When an interrupt is triggered, the microcontroller temporarily suspends its current program
execution to service the interrupt routine, and then it resumes normal operation. This makes the 8051
highly versatile for applications where rapid event handling is necessary.
The IE register is an 8-bit register in the 8051 that controls the enabling and disabling of various interrupt
sources. The IE register format is as follows:
- EA (Global Interrupt Enable): This bit enables or disables all interrupts in the 8051. When EA is set (1),
interrupts are enabled. When it is cleared (0), all interrupts are disabled.
- ET2 (Timer 2 Overflow Interrupt Enable): This bit enables or disables the Timer 2 overflow interrupt.
- ES (Serial Port Interrupt Enable): This bit enables or disables the UART (Serial Port) interrupt.
- ET1 (Timer 1 Overflow Interrupt Enable): This bit enables or disables the Timer 1 overflow interrupt.
- EX1 (External Interrupt 1 Enable): This bit enables or disables External Interrupt 1.
- ET0 (Timer 0 Overflow Interrupt Enable): This bit enables or disables the Timer 0 overflow interrupt.
- EX0 (External Interrupt 0 Enable): This bit enables or disables External Interrupt 0.
IP (Interrupt Priority) Register:
The IP register is also an 8-bit register that controls the priority of certain interrupt sources when multiple
interrupts are active simultaneously. The IP register format is as follows:
- PS and PT2 (Timer 2 Interrupt Priority): These bits set the priority level for the Timer 2 overflow
interrupt. PS and PT2 are used in conjunction to set Timer 2's priority.
- PS1 and PT1 (Timer 1 Interrupt Priority): These bits set the priority level for the Timer 1 overflow
interrupt.
- PX1 and PT0 (External Interrupt 1 and Timer 0 Priority): These bits set the priority levels for both
External Interrupt 1 (PX1) and Timer 0 (PT0).
- PX0 (External Interrupt 0 Priority): This bit sets the priority level for External Interrupt 0.
By setting or clearing the bits in the IE and IP registers, you can enable or disable interrupts and set their
relative priorities to customize how the 8051 responds to various events. The configuration of these
registers depends on the specific requirements of your application. For example, you might give higher
priority to a critical external interrupt while keeping other interrupts at lower priority levels.