USN acs Sonatle [TI ITT | BCS302 Third Semester B.E./B.Tech. Degree Examination, June/July 2024 Time: 3 hrs. Digital Design and Computer Orgai 2M: Marks , L: Bloom’s level , C: Course outcomes. Max. Marks: 100 Note: 1. Answer any FIVE full questions, choosing ONE full question from each module. Module ~1 MIL] c Q1 Ja. | Reduce the following Boolean expressions to the minimum number of | 10] L3 | COT literals. i) x(x + y) ii)x+x'y iii) (x + y) &+y/) iv)xyt+xz+yz — vy(xty)@'t2)(yt+2) b. | Determine the minimum SOP form using Karnaugh Map 10) 13 | Cor F=A'B'C' + BICD' + A'BCD' + ABC’ 1 OR Q2 a. | Simplify the Boolean function 10] 13 | Cor 1, 3, 7, 11, 15) which has the don’t care conditions b. | Simplify and implement the following Boolean function using NAND | 10] L3 | CO1 gates F(X, y, 2) = (1, 2,3, 4,5, 7). Module —2 Q3 Ja. | Implement the design of combinational circuit BCD and excess 3 code [10] L2 ] COZ converter. b. | Implement full adder circuit using 3:8 decoders. 10) 12 | C02 OR Q4 Ja. ] With Truth table and K-map simplification, implement the full adder with | 10] L2 ] CO2 basic gates and using two half adders an OR gate. b. | Realize the Boolean function using 8:1 multiplexer 10] 12 | Coz F(A, B, C, D) = E(1, 3, 4, 11, 12, 13, 14, 15). | Module — 3 Q5 Ja] Explain Bus structure with diagram, explain how different peripherals | 10] L2 | CO3 connected to the bus. b. | Explain in detail about the word alignment of a machine (microprocessor | 10] L2 | CO3 | based systems) what is the consecutive addresses of aligned words for 16, 32 and 64 bit word length of the machine? Give consecutive address for each of the following specified above | OR Q6 Ja. ] Write a note on: 10] 12 | Cos i) Register Transfer Notation (RTN) ii) Assembly Language Notation. Tof2BCS302 b. | Illustrate an indexed addressing mode with a assembly language program | 10] L2 [ CO3 to find the sum of the Test 1, Test 2 and Test 3 scores of the N number of students. a i Module ~ 4 Q.7 Ja. | Explain Hardware interrupt, enabling/disabling of interrupts and sequence | 10] L2 | CO4 of events in handling interrupt request from a single device. b. | Explain memory mapped 1/0 and 1/0 interface for an input device with a | 10| L2 | CO4 diagram. OR Q8 | a. | Describe DMA with its register and controllers. 10] £2 | Cos . | Explain the effect of size, cost and speed in memory Hierarchy. 10] 12 [Cos Module —5 Q.9 | a. | Explain the process of Fetching word from memory in processor. 10] 12 | COs b. | With a diagram, explain the single bus organization of the data path inside | 10 [12 | COS a processor. CEES Ct aero Pee sie ee ee im Q.10] a. | Describe how an ALU perform on arithmetic and logic operation along | 10] L2 | COS with input gating diagrams. [b.|Explain the complete set of operations involved in executing the | 10| L2 | COS instruction Add (R3) R’ along with control sequence. 2of2ro Visvesvaraya Technological University Belagavi, Karnataka - 590 018. Scheme & Solutions Signature of Scrutinizer Subject Title: JOrgi#tal Oeityn and Computer ya subleg Code: Bc t F Question| Number Solution “Mars A Le ape Creta aay 2 ) 2 ays ee ny . P Cary) Caty!) =e 2. i? a44 RE yz e Ry + HZ & (x+q) Calan) Cyne) = (aty) Cr tz) e) \(Sx2210 Ib. oe cp —~ - Co 4 pos helio \", Im, ms TL pleten’ M4 |M 7, 0) ae Het A’cn! " M2 3 is |My 8 3 A lo eq [ne ' J yt 48'co! Ag'c'g! AB! F= 8'0'+B/c'+ pleg! + Aaa) 2Subject Tite: Digtfal Design 3 Comprder Organtzacion Subject Code: Br g Question as Nambes Allocated j 2a.| we oy ? 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