25AA080C/D, 25LC080C/D

8K SPI Bus Serial EEPROM

Device Selection Table
Part Number VCC Range Page Size Temp. Ranges Packages
25LC080C 2.5-5.5V 16 Byte I, E P, SN, ST, MS, MN
25AA080C 1.8-5.5V 16 Byte I P, SN, ST, MS, MN
25LC080D 2.5-5.5V 32 Byte I, E P, SN, ST, MS, MN
25AA080D 1.8-5.5V 32 Byte I P, SN, ST, MS, MN

Features: Description:
• Max. Clock 10 MHz The Microchip Technology Inc. 25AA080C/D,
• Low-Power CMOS Technology: 25LC080C/D (25XX080C/D*) are 8 Kbit Serial Electri-
- Max. write current: 5 mA at 5.5V cally Erasable PROMs. The memory is accessed via a
simple Serial Peripheral Interface (SPI) compatible
- Read current: 5 mA at 5.5V, 10 MHz
serial bus. The bus signals required are a clock input
- Standby current: 5 A at 5.5V (SCK) plus separate data in (SI) and data out (SO)
• 1024 x 8-bit Organization lines. Access to the device is controlled through a Chip
• 16 Byte Page (‘C’ version devices) Select (CS) input.
• 32 Byte Page (‘D’ version devices) Communication to the device can be paused via the
• Self-Timed Erase and Write Cycles (5 ms max.) hold pin (HOLD). While the device is paused, transi-
• Block Write Protection: tions on its inputs will be ignored, with the exception of
Chip Select, allowing the host to service higher priority
- Protect none, 1/4, 1/2 or all of array
interrupts.
• Built-In Write Protection:
The 25XX080C/D is available in standard packages
- Power-on/off data protection circuitry
including 8-lead PDIP and SOIC, and advanced pack-
- Write enable latch aging including 8-lead MSOP, TSSOP, and 2x3 TDFN.
- Write-protect pin All packages are Pb-free and RoHS compliant.
• Sequential Read
• High Reliability: Package Types (not to scale)
- Endurance: > 1M erase/write cycles
- Data retention: > 200 years TSSOP/MSOP PDIP/SOIC
(ST, MS) (P, SN)
- ESD protection: > 4000V
CS 1 8 VCC CS 1 8 VCC
• Pb-Free and RoHS Compliant SO 2 7 HOLD
WP 3 6 SCK SO 2 7 HOLD
• Temperature Ranges Supported: VSS 4 5 SI WP 3 6 SCK
- Industrial (I): -40C to +85C
VSS 4 5 SI
- Automotive (E): -40°C to +125°C

TDFN
(MN)
CS 1 8 VCC
SO 2 7 HOLD
WP 3 6 SCK
VSS 4 5 SI

*25XX080C/D is used in this document as a generic part

number for the 25AA080C/D, 25LC080C/D.

 2009-2012 Microchip Technology Inc. DS22151B-page 1

25XX080C/D
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings (†)
VCC .............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature .................................................................................................................................-65°C to 150°C
Ambient temperature under bias ...............................................................................................................-40°C to 125°C
ESD protection on all pins ..........................................................................................................................................4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an
extended period of time may affect device reliability.

TABLE 1-1: DC CHARACTERISTICS

Industrial (I): TA = -40°C to +85°C VCC = 1.8V to 5.5V
DC CHARACTERISTICS
Automotive (E): TA = -40°C to +125°C VCC = 2.5V to 5.5V
Param.
Sym. Characteristic Min. Max. Units Test Conditions
No.
D001 VIH1 High-level input 0.7 VCC VCC+1 V —
voltage
D002 VIL1 Low-level input -0.3 0.3 VCC V VCC2.7V
D003 VIL2 voltage -0.3 0.2 VCC V VCC < 2.7V
D004 VOL1 Low-level output — 0.4 V IOL = 2.1 mA
D005 VOL2 voltage — 0.2 V IOL = 1.0 mA, VCC < 2.5V
D006 VOH High-level output VCC-0.5 — V IOH = -400 A
voltage
D007 ILI Input leakage current ±1 A CS = VCC, VIN = VSS OR VCC
D008 ILO Output leakage ±1 A CS = VCC, VOUT = VSS OR VCC
current
D009 CINT Internal Capacitance — 7 pF TA = 25°C, CLK = 1.0 MHz,
(all inputs and VCC = 5.0V (Note)
outputs)
D010 ICC Read — 5 mA VCC = 5.5V; FCLK = 10.0 MHz;
— SO = Open
Operating Current 2.5 mA VCC = 2.5V; FCLK = 5.0 MHz;
SO = Open
D011 ICC Write — 5 mA VCC = 5.5V
— 3 mA VCC = 2.5V
D012 Iccs — 5 A CS = VCC = 5.5V, Inputs tied to VCC or
Standby Current — VSS, TA = +125°C
1 A CS = VCC = 5.5V, Inputs tied to VCC or
VSS, TA = +85°C
Note: This parameter is periodically sampled and not 100% tested.

DS22151B-page 2  2009-2012 Microchip Technology Inc.

 25XX080C/D

TABLE 1-2: AC CHARACTERISTICS

Industrial (I): TA = -40°C to +85°C VCC = 1.8V to 5.5V

AC CHARACTERISTICS
Automotive (E): TA = -40°C to +125°C VCC = 2.5V to 5.5V

Param.
Sym. Characteristic Min. Max. Units Test Conditions
No.

1 FCLK Clock Frequency — 10 MHz 4.5V VCC  5.5V

— 5 MHz 2.5V VCC  4.5V
— 3 MHz 1.8V VCC  2.5V
2 TCSS CS Setup Time 50 — ns 4.5V VCC  5.5V
100 — ns 2.5V VCC  4.5V
150 — ns 1.8V VCC  2.5V
3 TCSH CS Hold Time 100 — ns 4.5V VCC  5.5V
200 — ns 2.5V VCC  4.5V
250 — ns 1.8V VCC  2.5V
4 TCSD CS Disable Time 50 — ns —
5 Tsu Data Setup Time 10 — ns 4.5V VCC  5.5V
20 — ns 2.5V VCC  4.5V
30 — ns 1.8V VCC  2.5V
6 THD Data Hold Time 20 — ns 4.5V VCC  5.5V
40 — ns 2.5V VCC  4.5V
50 — ns 1.8V VCC  2.5V
7 TR CLK Rise Time — 2 µs (Note 1)
8 TF CLK Fall Time — 2 µs (Note 1)
9 THI Clock High Time 50 — ns 4.5V VCC  5.5V
100 — ns 2.5V VCC  4.5V
150 — ns 1.8V VCC  2.5V
10 TLO Clock Low Time 50 — ns 4.5V VCC  5.5V
100 — ns 2.5V VCC  4.5V
150 — ns 1.8V VCC  2.5V
11 TCLD Clock Delay Time 50 — ns —
12 TCLE Clock Enable Time 50 — ns —
13 TV Output Valid from Clock — 50 ns 4.5V VCC  5.5V
Low — 100 ns 2.5V VCC  4.5V
— 160 ns 1.8V VCC  2.5V
14 THO Output Hold Time 0 — ns (Note 1)
15 TDIS Output Disable Time — 40 ns 4.5V VCC  5.5V (Note 1)
— 80 ns 2.5V VCC  4.5V (Note 1)
— 160 ns 1.8V VCC  2.5V (Note 1)
16 THS HOLD Setup Time 20 — ns 4.5V VCC  5.5V
40 — ns 2.5V VCC  4.5V
80 — ns 1.8V VCC  2.5V
Note 1: This parameter is periodically sampled and not 100% tested.
2: TWC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycle is
complete.
3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from our web site:
www.microchip.com.

 2009-2012 Microchip Technology Inc. DS22151B-page 3

25XX080C/D
TABLE 1-2: AC CHARACTERISTICS (CONTINUED)

Industrial (I): TA = -40°C to +85°C VCC = 1.8V to 5.5V

AC CHARACTERISTICS
Automotive (E): TA = -40°C to +125°C VCC = 2.5V to 5.5V

Param.
Sym. Characteristic Min. Max. Units Test Conditions
No.
17 THH HOLD Hold Time 20 — ns 4.5V VCC  5.5V
40 — ns 2.5V VCC  4.5V
80 — ns 1.8V VCC  2.5V
18 THZ HOLD Low to Output 30 — ns 4.5V VCC  5.5V (Note 1)
High-Z 60 — ns 2.5V VCC  4.5V (Note 1)
160 — ns 1.8V VCC  2.5V (Note 1)
19 THV HOLD High to Output 30 — ns 4.5V VCC  5.5V
Valid 60 — ns 2.5V VCC  4.5V
160 — ns 1.8V VCC  2.5V
20 TWC Internal Write Cycle Time — 5 ms (Note 2)
21 — Endurance 1M — E/W 25°C, VCC = 5.5V (Note 3)
Cycles
Note 1: This parameter is periodically sampled and not 100% tested.
2: TWC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycle is
complete.
3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from our web site:
www.microchip.com.

TABLE 1-3: AC TEST CONDITIONS

AC Waveform:
VLO = 0.2V —
VHI = VCC - 0.2V (Note 1)
VHI = 4.0V (Note 2)
CL = 50 pF —
Timing Measurement Reference Level
Input 0.5 VCC
Output 0.5 VCC
Note 1: For VCC  4.0V
2: For VCC > 4.0V

DS22151B-page 4  2009-2012 Microchip Technology Inc.

 25XX080C/D
FIGURE 1-1: HOLD TIMING

CS
17 17
16 16

SCK
18 19
High-Impedance
SO n+2 n+1 n n n-1

Don’t Care 5
SI n+2 n+1 n n n-1

HOLD

FIGURE 1-2: SERIAL INPUT TIMING

CS 12
2 11
7
Mode 1,1 8 3

SCK Mode 0,0

5 6

SI MSB in LSB in

High-Impedance
SO

FIGURE 1-3: SERIAL OUTPUT TIMING

CS

9 10 3
Mode 1,1
SCK Mode 0,0
13
14 15

SO MSB out ISB out

Don’t Care
SI

 2009-2012 Microchip Technology Inc. DS22151B-page 5

25XX080C/D
2.0 FUNCTIONAL DESCRIPTION 2.3 Write Sequence
Prior to any attempt to write data to the 25XX080C/D,
2.1 Principles of Operation the write enable latch must be set by issuing the WREN
The 25XX080C/D are 1024 byte Serial EEPROMs instruction (Figure 2-4). This is done by setting CS low
designed to interface directly with the Serial Periph- and then clocking out the proper instruction into the
eral Interface (SPI) Port of many of today’s popular 25XX080C/D. After all eight bits of the instruction are
microcontroller families, including Microchip’s PIC® transmitted, the CS must be brought high to set the
microcontrollers. It may also interface with micro- write enable latch. If the write operation is initiated
controllers that do not have a built-in Synchronous immediately after the WREN instruction without CS
Serial Port by using discrete being brought high, the data will not be written to the
I/O lines programmed properly with the software. array because the write enable latch will not have been
properly set.
The 25XX080C/D contains an 8-bit instruction register.
The device is accessed via the SI pin, with data being Once the write enable latch is set, the user may
clocked in on the rising edge of SCK. The CS pin must proceed by setting the CS low, issuing a WRITE
be low and the HOLD pin must be high for the entire instruction, followed by the 16-bit address, with the six
operation. MSBs of the address being “don’t care” bits, and then
the data to be written. Up to 16 bytes (25XX080C) or 32
Table 2-1 contains a list of the possible instruction bytes (25XX080D) of data can be sent to the device
bytes and format for device operation. All instructions, before a write cycle is necessary. The only restriction is
addresses, and data are transferred MSB first, LSB that all of the bytes must reside in the same page.
last.
Note: Page write operations are limited to
Data (SI) is sampled on the first rising edge of SCK
writing bytes within a single physical page,
after CS goes low. If the clock line is shared with other
regardless of the number of bytes
peripheral devices on the SPI bus, the user can assert
actually being written. Physical page
the HOLD input and place the 25XX080C/D in ‘HOLD’
boundaries start at addresses that are
mode. After releasing the HOLD pin, operation will
integer multiples of the page buffer size
resume from the point when the HOLD was asserted.
(or ‘page size’) and, end at addresses that
are integer multiples of page size – 1. If a
2.2 Read Sequence Page Write command attempts to write
The device is selected by pulling CS low. The 8-bit across a physical page boundary, the
READ instruction is transmitted to the 25XX080C/D result is that the data wraps around to the
followed by the 16-bit address, with the six MSBs of the beginning of the current page (overwriting
address being “don’t care” bits. After the correct READ data previously stored there), instead of
instruction and address are sent, the data stored in the being written to the next page as might be
memory at the selected address is shifted out on the expected. It is therefore necessary for the
SO pin. The data stored in the memory at the next application software to prevent page write
address can be read sequentially by continuing to operations that would attempt to cross a
provide clock pulses. The internal Address Pointer is page boundary.
automatically incremented to the next higher address For the data to be actually written to the array, the CS
after each byte of data is shifted out. When the highest must be brought high after the Least Significant bit (D0)
address is reached (03FFh), the address counter rolls of the nth data byte has been clocked in. If CS is
over to address 0000h allowing the read cycle to be brought high at any other time, the write operation will
continued indefinitely. The read operation is terminated not be completed. Refer to Figure 2-2 and Figure 2-3
by raising the CS pin (Figure 2-1). for more detailed illustrations on the byte write
sequence and the page write sequence, respectively.
While the write is in progress, the STATUS register may
be read to check the status of the WPEN, WIP, WEL,
BP1 and BP0 bits (Figure 2-6). A read attempt of a
memory array location will not be possible during a
write cycle. When the write cycle is completed, the
write enable latch is reset.

DS22151B-page 6  2009-2012 Microchip Technology Inc.

 25XX080C/D
Block Diagram
STATUS
HV Generator
Register

Memory EEPROM
I/O Control X
Control Array
Logic
Logic Dec

Page Latches

SI
SO Y Decoder
CS
SCK
HOLD Sense Amp.
R/W Control
WP
VCC
VSS

TABLE 2-1: INSTRUCTION SET

Instruction Name Instruction Format Description
READ 0000 0011 Read data from memory array beginning at selected address
WRITE 0000 0010 Write data to memory array beginning at selected address
WRDI 0000 0100 Reset the write enable latch (disable write operations)
WREN 0000 0110 Set the write enable latch (enable write operations)
RDSR 0000 0101 Read STATUS Register
WRSR 0000 0001 Write STATUS Register

FIGURE 2-1: READ SEQUENCE

CS

0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31
SCK

Instruction 16-bit Address

SI 0 0 0 0 0 0 1 1 15 14 13 12 2 1 0

Data Out
High-Impedance
SO 7 6 5 4 3 2 1 0

 2009-2012 Microchip Technology Inc. DS22151B-page 7

25XX080C/D
FIGURE 2-2: BYTE WRITE SEQUENCE

CS
Twc
0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31
SCK
Instruction 16-bit Address Data Byte
SI 0 0 0 0 0 0 1 0 15 14 13 12 2 1 0 7 6 5 4 3 2 1 0

High-Impedance
SO

FIGURE 2-3: PAGE WRITE SEQUENCE

CS

0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31
SCK
Instruction 16-bit Address Data Byte 1
SI 0 0 0 0 0 0 1 0 15 14 13 12 2 1 0 7 6 5 4 3 2 1 0

CS

32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
SCK
Data Byte 2 Data Byte 3 Data Byte n (16/32 max)
SI 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0

DS22151B-page 8  2009-2012 Microchip Technology Inc.

 25XX080C/D
2.4 Write Enable (WREN) and Write The following is a list of conditions under which the
Disable (WRDI) write enable latch will be reset:
• Power-up
The 25XX080C/D contains a write enable latch. See
Table 2-4 for the Write-Protect Functionality Matrix. • WRDI instruction successfully executed
This latch must be set before any write operation will be • WRSR instruction successfully executed
completed internally. The WREN instruction will set the • WRITE instruction successfully executed
latch, and the WRDI will reset the latch.

FIGURE 2-4: WRITE ENABLE SEQUENCE (WREN)

CS

0 1 2 3 4 5 6 7
SCK

SI 0 0 0 0 0 1 1 0

High-Impedance
SO

FIGURE 2-5: WRITE DISABLE SEQUENCE (WRDI)

CS

0 1 2 3 4 5 6 7
SCK

SI 0 0 0 0 0 1 10 0

High-Impedance
SO

 2009-2012 Microchip Technology Inc. DS22151B-page 9

25XX080C/D
2.5 Read Status Register (RDSR) The Write Enable Latch (WEL) bit indicates the status
Instruction of the write enable latch and is read only. When set to
a ‘1’, the latch allows writes to the array or the STATUS
The Read Status Register (RDSR) instruction provides register, when set to a ‘0’, the latch prohibits writes to
access to the STATUS register. The STATUS register the array or the STATUS register. The state of this bit
may be read at any time, even during a write cycle. The can always be updated via the WREN or WRDI
STATUS register is formatted as follows: commands regardless of the state of write protection
on the STATUS register. These commands are shown
TABLE 2-2: STATUS REGISTER in Figure 2-4 and Figure 2-5.
7 6 5 4 3 2 1 0 The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
W/R – – – W/R W/R R R
are set by the user issuing the WRSR instruction, which
WPEN X X X BP1 BP0 WEL WIP is in Figure 2-7. These bits are nonvolatile and are
W/R = writable/readable. R = read-only. shown in Table 2-3.
The Write-In-Process (WIP) bit indicates whether the See Figure 2-6 for the RDSR timing sequence.
25XX080C/D is busy with a write operation. When set
to a ‘1’, a write is in progress, when set to a ‘0’, no write
is in progress. This bit is read-only.

FIGURE 2-6: READ STATUS REGISTER TIMING SEQUENCE (RDSR)

CS

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

SCK

Instruction

SI 0 0 0 0 0 1 0 1

Data from STATUS Register

High-Impedance
SO 7 6 5 4 3 2 1 0

DS22151B-page 10  2009-2012 Microchip Technology Inc.

 25XX080C/D
2.6 Write Status Register (WRSR) See Figure 2-7 for the WRSR timing sequence.
Instruction
TABLE 2-3: ARRAY PROTECTION
The Write Status Register (WRSR) instruction allows the
user to write to the nonvolatile bits in the STATUS Array Addresses
register as shown in Table 2-2. The user is able to BP1 BP0
Write-Protected
select one of four levels of protection for the array by
writing to the appropriate bits in the STATUS register. 0 0 none
The array is divided up into four segments. The user 0 1 upper 1/4
has the ability to write-protect none, one, two or all four (0300h-03FFh)
of the segments of the array. The partitioning is 1 0 upper 1/2
controlled as shown in Table 2-3. (0200h-03FFh)
The Write-Protect Enable (WPEN) bit is also a 1 1 all
nonvolatile bit that is available as an enable bit for the WP (0000h-03FFh)
pin. The Write-Protect (WP) pin and the Write-Protect
Enable (WPEN) bit in the STATUS register control the
programmable hardware write-protect feature. Hardware
write protection is enabled when WP pin is low and the
WPEN bit is high. Hardware write protection is disabled
when either the WP pin is high or the WPEN bit is low.
When the chip is hardware write-protected, only writes to
nonvolatile bits in the STATUS register are disabled. See
Table 2-4 for a matrix of functionality on the WPEN bit.

FIGURE 2-7: WRITE STATUS REGISTER TIMING SEQUENCE (WRSR)

CS

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

SCK

Instruction Data to STATUS Register

SI 0 0 0 0 0 0 0 1 7 6 5 4 3 2 1 0

High-Impedance
SO

 2009-2012 Microchip Technology Inc. DS22151B-page 11

25XX080C/D
2.7 Data Protection 2.8 Power-On State
The following protection has been implemented to The 25XX080C/D powers on in the following state:
prevent inadvertent writes to the array: • The device is in low-power Standby mode
• The write enable latch is reset on power-up (CS = 1)
• A write enable instruction must be issued to set • The write enable latch is reset
the write enable latch • SO is in high-impedance state
• After a byte write, page write or STATUS register • A high-to-low-level transition on CS is required to
write, the write enable latch is reset enter active state
• CS must be set high after the proper number of
clock cycles to start an internal write cycle
• Access to the array during an internal write cycle
is ignored and programming is continued

TABLE 2-4: WRITE-PROTECT FUNCTIONALITY MATRIX

WEL WPEN WP
Protected Blocks Unprotected Blocks STATUS Register
(SR bit 1) (SR bit 7) (pin 3)
0 x x Protected Protected Protected
1 0 x Protected Writable Writable
1 1 0 (low) Protected Writable Protected
1 1 1 (high) Protected Writable Writable
x = don’t care

DS22151B-page 12  2009-2012 Microchip Technology Inc.

 25XX080C/D
3.0 PIN DESCRIPTIONS The WP pin function is blocked when the WPEN bit in
the STATUS register is low. This allows the user to
The descriptions of the pins are listed in Table 3-1. install the 25XX080C/D in a system with WP pin
grounded and still be able to write to the STATUS
TABLE 3-1: PIN FUNCTION TABLE register. The WP pin functions will be enabled when the
WPEN bit is set high.
Name Pin Number Function
3.4 Serial Input (SI)
CS 1 Chip Select Input
SO 2 Serial Data Output The SI pin is used to transfer data into the device. It
receives instructions, addresses and data. Data is
WP 3 Write-Protect Pin
latched on the rising edge of the serial clock.
VSS 4 Ground
SI 5 Serial Data Input 3.5 Serial Clock (SCK)
SCK 6 Serial Clock Input
The SCK is used to synchronize the communication
HOLD 7 Hold Input between a master and the 25XX080C/D. Instructions,
VCC 8 Supply Voltage addresses or data present on the SI pin are latched on
the rising edge of the clock input, while data on the SO
3.1 Chip Select (CS) pin is updated after the falling edge of the clock input.

A low level on this pin selects the device. A high level 3.6 Hold (HOLD)
deselects the device and forces it into Standby mode.
However, a programming cycle which is already The HOLD pin is used to suspend transmission to the
initiated or in progress will be completed, regardless of 25XX080C/D while in the middle of a serial sequence
the CS input signal. If CS is brought high during a without having to retransmit the entire sequence again.
program cycle, the device will go into Standby mode as It must be held high any time this function is not being
soon as the programming cycle is complete. When the used. Once the device is selected and a serial
device is deselected, SO goes to the high-impedance sequence is underway, the HOLD pin may be pulled
state, allowing multiple parts to share the same SPI low to pause further serial communication without
bus. A low-to-high transition on CS after a valid write resetting the serial sequence. The HOLD pin must be
sequence initiates an internal write cycle. After power- brought low while SCK is low, otherwise the HOLD
up, a low level on CS is required prior to any sequence function will not be invoked until the next SCK high-to-
being initiated. low transition. The 25XX080C/D must remain selected
during this sequence. The SI, SCK and SO pins are in
3.2 Serial Output (SO) a high-impedance state during the time the device is
paused and transitions on these pins will be ignored. To
The SO pin is used to transfer data out of the resume serial communication, HOLD must be brought
25XX080C/D. During a read cycle, data is shifted out high while the SCK pin is low, otherwise serial commu-
on this pin after the falling edge of the serial clock. nication will not resume. Lowering the HOLD line at any
time will tri-state the SO line.
3.3 Write-Protect (WP)
This pin is used in conjunction with the WPEN bit in the
STATUS register to prohibit writes to the nonvolatile
bits in the STATUS register. When WP is low and
WPEN is high, writing to the nonvolatile bits in the
STATUS register is disabled. All other operations
function normally. When WP is high, all functions,
including writes to the nonvolatile bits in the STATUS
register operate normally. If the WPEN bit is set, WP
low during a STATUS register write sequence will
disable writing to the STATUS register. If an internal
write cycle has already begun, WP going low will have
no effect on the write.

 2009-2012 Microchip Technology Inc. DS22151B-page 13

25XX080C/D
4.0 PACKAGING INFORMATION
4.1 Package Marking Information

8-Lead MSOP (150 mil) Example:

XXXXXXT 5L8DI
YWWNNN 9281L7

8-Lead PDIP Example:

XXXXXXXX 25LC080D
T/XXXNNN I/P e3 1L7
YYWW 0928

8-Lead SOIC Example:

XXXXXXXT 25LC08DI
XXXXYYWW SN e3 0928
NNN 1L7

8-Lead TSSOP Example:

XXXX 5L8D
TYWW I628
NNN 1L7

8-Lead 2x3 TDFN Example:

XXX C44
YWW 928
NN 17

DS22151B-page 14  2009-2012 Microchip Technology Inc.

 25XX080C/D

1st Line Marking Codes

Part Number TDFN

TSSOP MSOP
I Temp. E Temp.
25AA080C 5A8C 5A8CT C31 —
25AA080D 5A8D 5A8DT C41 —
25LC080C 5L8C 5L8CT C34 C35
25LC080D 5L8D 5L8DT C44 C45
Note: T = Temperature grade (I, E)

Legend: XX...X Customer-specific information

Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
e3 Pb-free JEDEC designator for Matte Tin (Sn)
* This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.

Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.

 2009-2012 Microchip Technology Inc. DS22151B-page 15

25XX080C/D

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

DS22151B-page 16  2009-2012 Microchip Technology Inc.

 25XX080C/D

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

 2009-2012 Microchip Technology Inc. DS22151B-page 17

25XX080C/D

8-Lead Plastic Dual In-Line (P or PA) – 300 mil Body [PDIP]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

NOTE 1
E1

1 2 3

D
E

A A2

A1 L
c

e
b1 eB
b

Units INCHES
Dimension Limits MIN NOM MAX
Number of Pins N 8
Pitch e .100 BSC
Top to Seating Plane A – – .210
Molded Package Thickness A2 .115 .130 .195
Base to Seating Plane A1 .015 – –
Shoulder to Shoulder Width E .290 .310 .325
Molded Package Width E1 .240 .250 .280
Overall Length D .348 .365 .400
Tip to Seating Plane L .115 .130 .150
Lead Thickness c .008 .010 .015
Upper Lead Width b1 .040 .060 .070
Lower Lead Width b .014 .018 .022
Overall Row Spacing § eB – – .430
Notes:
1. Pin 1 visual index feature may vary, but must be located with the hatched area.
2. § Significant Characteristic.
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side.
4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.

Microchip Technology Drawing C04-018B

DS22151B-page 18  2009-2012 Microchip Technology Inc.

 25XX080C/D

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

 2009-2012 Microchip Technology Inc. DS22151B-page 19

25XX080C/D

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

DS22151B-page 20  2009-2012 Microchip Technology Inc.

 25XX080C/D

     !"#$%

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 *++&&&!    !+ $

 2009-2012 Microchip Technology Inc. DS22151B-page 21

25XX080C/D

8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm Body [TSSOP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

E1

NOTE 1

1 2
b
e

c
A A2 φ

A1 L1 L

Units MILLIMETERS
Dimension Limits MIN NOM MAX
Number of Pins N 8
Pitch e 0.65 BSC
Overall Height A – – 1.20
Molded Package Thickness A2 0.80 1.00 1.05
Standoff A1 0.05 – 0.15
Overall Width E 6.40 BSC
Molded Package Width E1 4.30 4.40 4.50
Molded Package Length D 2.90 3.00 3.10
Foot Length L 0.45 0.60 0.75
Footprint L1 1.00 REF
Foot Angle φ 0° – 8°
Lead Thickness c 0.09 – 0.20
Lead Width b 0.19 – 0.30
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.
3. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.

Microchip Technology Drawing C04-086B

DS22151B-page 22  2009-2012 Microchip Technology Inc.

 25XX080C/D

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

 2009-2012 Microchip Technology Inc. DS22151B-page 23

25XX080C/D

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

DS22151B-page 24  2009-2012 Microchip Technology Inc.

 25XX080C/D

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

 2009-2012 Microchip Technology Inc. DS22151B-page 25

25XX080C/D

  ' (   )*+,--./ !"0'(%

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 *++&&&!    !+ $

DS22151B-page 26  2009-2012 Microchip Technology Inc.

 25XX080C/D
APPENDIX A: REVISION HISTORY

Revision A (4/2009)
Original release of this document.

Revision B (12/2012)
Revised Table 1-2, Param. 21.

 2009-2012 Microchip Technology Inc. DS22151B-page 27

25XX080C/D
NOTES:

DS22151B-page 28  2009-2012 Microchip Technology Inc.

 25XX080C/D
THE MICROCHIP WEB SITE CUSTOMER SUPPORT
Microchip provides online support via our WWW site at Users of Microchip products can receive assistance
www.microchip.com. This web site is used as a means through several channels:
to make files and information easily available to • Distributor or Representative
customers. Accessible by using your favorite Internet
• Local Sales Office
browser, the web site contains the following
information: • Field Application Engineer (FAE)
• Technical Support
• Product Support – Data sheets and errata,
application notes and sample programs, design • Development Systems Information Line
resources, user’s guides and hardware support Customers should contact their distributor,
documents, latest software releases and archived representative or field application engineer (FAE) for
software support. Local sales offices are also available to help
• General Technical Support – Frequently Asked customers. A listing of sales offices and locations is
Questions (FAQ), technical support requests, included in the back of this document.
online discussion groups, Microchip consultant Technical support is available through the web site
program member listing at: http://support.microchip.com
• Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives

CUSTOMER CHANGE NOTIFICATION

SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com, click on Customer Change
Notification and follow the registration instructions.

 2009-2012 Microchip Technology Inc. DS22151B-page 29

25XX080C/D
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.

To: Technical Publications Manager Total Pages Sent ________

RE: Reader Response

From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________ FAX: (______) _________ - _________
Application (optional):
Would you like a reply? Y N

Device: 25XX080C/D Literature Number: DS22151B

Questions:

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

DS22151B-page 30  2009-2012 Microchip Technology Inc.

 25XX080C/D
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO. X – X /XX
Examples:
Device Tape & Reel Temp Range Package a) 25AA080C-I/MS = 8 Kbit, 16-byte page, 1.8V
Serial EEPROM, Industrial temp., MSOP
package
b) 25AA080CT-I/SN = 8 Kbit, 16-byte page, 1.8V
Serial EEPROM, Industrial temp., Tape & Reel,
Device: 25AA080C 8 Kbit, 1.8V, 16 Byte Page SPI Serial EEPROM SOIC package
25AA080D 8 Kbit, 1.8V, 32 Byte Page SPI Serial EEPROM c) 25LC080DT-I/SN = 8 Kbit, 32-byte page, 2.5V
25LC080C 8 Kbit, 2.5V, 16 Byte Page SPI Serial EEPROM Serial EEPROM, Industrial temp., Tape & Reel,
25LC080D 8 Kbit, 2.5V, 32 Byte Page SPI Serial EEPROM SOIC package
d) 25LC080DT-I/ST = 8 Kbit, 32-byte page, 2.5V
Tape & Reel: Blank = Standard packaging Serial EEPROM, Industrial temp., Tape & Reel,
T = Tape & Reel TSSOP package
Temperature I = -40C to+85C
Range: E = -40C to+125C

Package: MS = Plastic MSOP (Micro Small Outline), 8-lead

P = Plastic DIP (300 mil body), 8-lead
SN = Plastic SOIC (3.90 mm body), 8-lead
ST = TSSOP, 8-lead
MNY(1) = 8-lead 2x3 mm TDFN
Note 1: “Y” indicates a Nickel Palladium Gold (NiPdAu) finish.

 2009-2012 Microchip Technology Inc. DS22151B-page 31

25XX080C/D
NOTES:

DS22151B-page 32  2009-2012 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device Trademarks

applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC,
and may be superseded by updates. It is your responsibility to
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
ensure that your application meets with your specifications.
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
MICROCHIP MAKES NO REPRESENTATIONS OR and UNI/O are registered trademarks of Microchip Technology
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
Incorporated in the U.S.A. and other countries.
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
INCLUDING BUT NOT LIMITED TO ITS CONDITION, MTP, SEEVAL and The Embedded Control Solutions
QUALITY, PERFORMANCE, MERCHANTABILITY OR Company are registered trademarks of Microchip Technology
FITNESS FOR PURPOSE. Microchip disclaims all liability Incorporated in the U.S.A.
arising from this information and its use. Use of Microchip Silicon Storage Technology is a registered trademark of
devices in life support and/or safety applications is entirely at Microchip Technology Inc. in other countries.
the buyer’s risk, and the buyer agrees to defend, indemnify and
Analog-for-the-Digital Age, Application Maestro, BodyCom,
hold harmless Microchip from any and all damages, claims,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
suits, or expenses resulting from such use. No licenses are
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
conveyed, implicitly or otherwise, under any Microchip
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
intellectual property rights.
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2009-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620767221

QUALITY MANAGEMENT SYSTEM Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
CERTIFIED BY DNV Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
== ISO/TS 16949 == devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.

 2009-2012 Microchip Technology Inc. DS22151B-page 33

 Worldwide Sales and Service
AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE
Corporate Office Asia Pacific Office India - Bangalore Austria - Wels
2355 West Chandler Blvd. Suites 3707-14, 37th Floor Tel: 91-80-3090-4444 Tel: 43-7242-2244-39
Chandler, AZ 85224-6199 Tower 6, The Gateway Fax: 91-80-3090-4123 Fax: 43-7242-2244-393
Tel: 480-792-7200 Harbour City, Kowloon Denmark - Copenhagen
India - New Delhi
Fax: 480-792-7277 Hong Kong Tel: 45-4450-2828
Tel: 91-11-4160-8631
Technical Support: Tel: 852-2401-1200 Fax: 45-4485-2829
Fax: 91-11-4160-8632
http://www.microchip.com/ Fax: 852-2401-3431
India - Pune France - Paris
support
Australia - Sydney Tel: 91-20-2566-1512 Tel: 33-1-69-53-63-20
Web Address:
Tel: 61-2-9868-6733 Fax: 91-20-2566-1513 Fax: 33-1-69-30-90-79
www.microchip.com
Fax: 61-2-9868-6755 Germany - Munich
Atlanta Japan - Osaka
China - Beijing Tel: 49-89-627-144-0
Duluth, GA Tel: 81-6-6152-7160
Tel: 86-10-8569-7000 Fax: 49-89-627-144-44
Tel: 678-957-9614 Fax: 81-6-6152-9310
Fax: 86-10-8528-2104 Italy - Milan
Fax: 678-957-1455 Japan - Tokyo
China - Chengdu Tel: 39-0331-742611
Boston Tel: 81-3-6880- 3770
Tel: 86-28-8665-5511 Fax: 39-0331-466781
Westborough, MA Fax: 81-3-6880-3771
Fax: 86-28-8665-7889 Netherlands - Drunen
Tel: 774-760-0087 Korea - Daegu
Fax: 774-760-0088 China - Chongqing Tel: 82-53-744-4301 Tel: 31-416-690399
Tel: 86-23-8980-9588 Fax: 82-53-744-4302 Fax: 31-416-690340
Chicago
Itasca, IL Fax: 86-23-8980-9500 Spain - Madrid
Korea - Seoul
Tel: 630-285-0071 China - Hangzhou Tel: 34-91-708-08-90
Tel: 82-2-554-7200
Fax: 630-285-0075 Tel: 86-571-2819-3187 Fax: 82-2-558-5932 or Fax: 34-91-708-08-91
Cleveland Fax: 86-571-2819-3189 82-2-558-5934 UK - Wokingham
Independence, OH China - Hong Kong SAR Tel: 44-118-921-5869
Malaysia - Kuala Lumpur
Tel: 216-447-0464 Tel: 852-2943-5100 Fax: 44-118-921-5820
Tel: 60-3-6201-9857
Fax: 216-447-0643 Fax: 852-2401-3431 Fax: 60-3-6201-9859
Dallas China - Nanjing Malaysia - Penang
Addison, TX Tel: 86-25-8473-2460 Tel: 60-4-227-8870
Tel: 972-818-7423 Fax: 86-25-8473-2470 Fax: 60-4-227-4068
Fax: 972-818-2924
China - Qingdao Philippines - Manila
Detroit Tel: 86-532-8502-7355 Tel: 63-2-634-9065
Farmington Hills, MI
Fax: 86-532-8502-7205 Fax: 63-2-634-9069
Tel: 248-538-2250
Fax: 248-538-2260 China - Shanghai Singapore
Tel: 86-21-5407-5533 Tel: 65-6334-8870
Indianapolis Fax: 86-21-5407-5066 Fax: 65-6334-8850
Noblesville, IN
Tel: 317-773-8323 China - Shenyang Taiwan - Hsin Chu
Fax: 317-773-5453 Tel: 86-24-2334-2829 Tel: 886-3-5778-366
Fax: 86-24-2334-2393 Fax: 886-3-5770-955
Los Angeles
Mission Viejo, CA China - Shenzhen Taiwan - Kaohsiung
Tel: 949-462-9523 Tel: 86-755-8864-2200 Tel: 886-7-213-7828
Fax: 949-462-9608 Fax: 86-755-8203-1760 Fax: 886-7-330-9305
Santa Clara China - Wuhan Taiwan - Taipei
Santa Clara, CA Tel: 86-27-5980-5300 Tel: 886-2-2508-8600
Tel: 408-961-6444 Fax: 86-27-5980-5118 Fax: 886-2-2508-0102
Fax: 408-961-6445 China - Xian Thailand - Bangkok
Toronto Tel: 86-29-8833-7252 Tel: 66-2-694-1351
Mississauga, Ontario, Fax: 86-29-8833-7256 Fax: 66-2-694-1350
Canada China - Xiamen
Tel: 905-673-0699 Tel: 86-592-2388138
Fax: 905-673-6509 Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
11/27/12
Fax: 86-756-3210049

DS22151B-page 34  2009-2012 Microchip Technology Inc.