0% found this document useful (0 votes)
16 views21 pages

COA1

Uploaded by

yash95632
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
16 views21 pages

COA1

Uploaded by

yash95632
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 21

UNIT-1

INTRODUCTION TO COMPUTER SYSTEM

Organization and architecture, Structure and function, IAS computer structure,


Computer function, Interconnection structures, Bus interconnection.

1.1 Digital Computer/ Simply Computer:

Computer a fast electronic calculating machine

• Accepts digitized input information


• Process it according to a list of internally stored instructions
• Produces the resulting output information

➢ The list of instruction called computer program.


➢ Internal storage is computer memory.

Computer Types:

Differs on:

• Size
• Cost
• Computational Power

Intended Use

Desktop

Portable Notebook

Workstations

• Engineering and scientific applications

Enterprise Systems (Mainframes):

• Used for business data processing

Servers:

• Education, business & personal user communities

Super Computers:

• Large scale numerical calculations

Applications like:

• Weather forecasting
• Aircraft design and simulation

Functional Units:

Dept. of MCA Page 1


Input Unit:

• Accepts coded information through input units.

Input devices:

• Keyboard
• Joysticks
• Track balls
• Mouse
• Microphone

Memory Unit:

• Stores programs and data

Two types

• Primary
• Secondary

Primary Memory

• Fast and operates at electronic speeds


• Programs must be stored in the memory while they are being executed
• Large number of semiconductor storage cells

Terminology:

Random Access Memory

• any location in the memory can be reached in a short and fixed amount of time
after specifying its address
• This time is fixed, independent of the location of the word being accessed.

Dept. of MCA Page 2


• It typically ranges from few ns to 100 ns

Memory access time

• Time required to access one word

Primary Memory:

• Memory of a computer implemented as a memory hierarchy or 3 or 4 levels of


semiconductor RAM units with different speeds and sizes.
• The small, fast RAM units called caches
• The largest slowest unit is referred as the main memory
• Primary storage is essential, it tend to be expensive with increase of size.

Secondary Memory:

• When large amounts of data and many programs have to be stored


• Particularly for information that is accessed infrequently

Secondary storage devices

• Magnetic disks tapes


• Optical disks (CD ROMs)
• Flash memory devices

Arithmetic and Logic Unit (ALU):

• Most computer operations are executed in the ALU of the processor


• Suppose: two numbers located in the memory are to be added
o They brought into the processor and the actual addition is carried out by
the ALU
o The sum may then be stored in the memory or retained in the processor
for immediate use
o Control and ALU are many times faster than other devices connected to
the device

Output Unit:

• Counterpart of the input unit


• To send processed results to the outside world
• Printers
• Graphics display
• Audio output devices (Speakers)

Control Unit:

• The operations of following units must be coordinated in


some way
• Memory
• Arithmetic and logic unit
• Input and output units stores and process information and performs
I/O operations
• Control unit is effectively the nerve center that sends control signals to other
units and sends their states.
• Much of the control circuitry is physically distributed throughout the
machine.

Dept. of MCA Page 3


1.2 Organization and architecture:

Computer Organization:

• Computer Organization comes after the decision of Computer


• Architecture. Computer Organization is how operational attributes are linked together
and contribute to realizing the architectural specification. Computer Organization
deals with a structural relationship.
• Computer organization refers to the operational units and their interconnections that
realize the architectural specifications.
• It is an organizational issue whether the multiply instruction will be implemented by a
special multiply unit or by a mechanism that makes repeated use of the add unit of
the system.
• The organizational decision may be based on the anticipated frequency of use of the
multiply instruction, the relative speed of the two approaches, and the cost and
physical size of a special multiply unit.

Organizational attributes:

• Hardware details transparent to the programmer, such as control


signals
• Interfaces between the computer and peripherals
• The memory technology used.

Difference between Computer Architecture and Computer Organization:

Dept. of MCA Page 4


S. No. Computer Architecture Computer Organization
Architecture describes what the 1. The Organization describes how
1.
computer does. it does it.
Computer Architecture deals with
2. Computer Organization deals
2. the functional behavior ofcomputer
with a structural relationship.
systems.
In the above figure, it’s clear that 3. In the above figure, it’s also
3. it deals with high-level design clear that it deals with low-level
issues. design issues.
Architecture indicates its 4. Where Organization indicates
4.
hardware. its performance.
As a programmer, you can view
architecture as a series of 5. The implementation of the
5.
instructions, addressing modes, architecture is called organization.
and registers.

6. For designing a computer, an


For designing a computer, its
6. organization is decided after its
architecture is fixed first.
architecture.
Computer Architecture is also
7. Computer Organization is frequently
7. called Instruction Set
called microarchitecture.
Architecture (ISA).

Computer Architecture comprises


8. Computer Organization consists of
logical functions such as
8. physical units like circuit designs,
instruction sets, registers, data
peripherals, and adders.
types, and addressing modes.

The different architectural


categories found in our computer 9. CPU organization is classified into
systems are as follows: three categories based on the number of
1.Von-Neumann Architecture address fields:
9.
2.Harvard Architecture 1.Organization of a single Accumulator.
3.Instruction Set Architecture 2.Organization of general registers
4.Micro-architecture 3.Stack organization
5.System Design

Dept. of MCA Page 5


It makes the computer’s 10. It offers details on how well
10.
hardware visible. the computer performs.

Architecture coordinates the 11. Computer Organization handles


11. hardware and software of the the segments of the network in a
system. system.

The software developer is 12. It escapes the software


12.
aware of it. programmer’s detection.

Examples- Intel and AMD 13. Organizational qualities include


created the x86 processor. Sun hardware elements that are
Microsystems and others invisible to the programmer, such
13.
created the SPARC processor. as interfacing of computer and
Apple, IBM, and Motorola peripherals, memory technologies,
created the PowerPC. and control signals.

STRUCTURE AND FUNCTION:

• A computer is a complex system with millions of elementary electronic


components.

• A hierarchical system is a set of interrelated subsystems; from high level to low


level subsystems.

• The hierarchical nature of complex systems is essential to both their design and
their description.

• The designer need only deal with a particular level of the system at a time.

• The behavior at each level depends only on a simplified, abstracted


characterization of the system at the next lower level.

At each level, the designer is concerned with structure and function:

• Structure: The way in which the components are interrelated.

• Function: The operation of each individual component as part of the structure.

Function:

• In general terms, there are only four basic functions that a computer can
perform:

• Data processing: Data may take a wide variety of forms, and

the range of processing requirements is broad.

• Data storage: Even if the computer is processing data on the fly (i.e., data come
in and get processed, and the results go out immediately), the computer must
temporarily store at least those pieces of data that are being worked on at any given

Dept. of MCA Page 6


moment. Thus, there is at least a short-term data storage function. Equally important,
the computer performs a long-term data storage function. Files of data are stored on the
computer for subsequent retrieval and update.

• Data movement: The computer’s operating environment consists of devices that


serve as either sources or destinations of data. When data are received from or delivered
to a device that is directly connected to the computer, the process is known as input–
output (I/O), and the device is referred to as a peripheral. When data are moved over
longer distances, to or from a remote device, the process is known as data
communications.

• Control: Within the computer, a control unit manages the computer’s resources
and orchestrates the performance of its functional parts in response to instructions.

Simple single-processor computer:

Figure 1.1: Hierarchical view of the internal structure

Dept. of MCA Page 7


Hierarchical view of the internal structure:

• There are four main structural components:

• Central processing unit (CPU): Controls the operation of the computer and
performs its data processing functions; often simply referred to as processor.

• Main memory: Stores data.

• I/O: Moves data between the computer and its external environment.

• System interconnection: Some mechanism that provides for communication


among CPU, main memory, and I/O. A common example of system interconnection is by
means of a system bus, consisting of a number of conducting wires to which all the other
components attach.

The most complex component is the CPU. Its major structural components are as
follows:

• Control unit: Controls the operation of the CPU and hence the computer.

• Arithmetic and logic unit (ALU): Performs the computer’s data processing
functions.

• Registers: Provides storage internal to the CPU.

• CPU interconnection: Some mechanism that provides for communication among


the control unit, ALU, and registers.

• There are several approaches to the implementation of the control unit; one
common approach is a microprogrammed implementation.

• A microprogrammed control unit operates by executing microinstructions


that define the functionality of the control unit.

Multicore computer structure:

• When multiple processors all reside on a single chip, the term multicore computer is
used, and each processing unit (consisting of a control unit, ALU, registers, and perhaps
cache) is called a core.

Terminology:

• Central processing unit (CPU): That portion of a computer that fetches and executes
instructions. It consists of an ALU, a control unit, and registers. In a system with a single
processing unit, it is often simply referred to as a processor.

• Core: An individual processing unit on a processor chip. A core may be equivalent in


functionality to a CPU on a single-CPU system.

• Processor: A physical piece of silicon containing one or more cores.

• The processor is the computer component that interprets and executes instructions.

Dept. of MCA Page 8


Principal components of a typical multicore computer:

• A printed circuit board (PCB) is a rigid, flat board that holds and interconnects chips
and other electronic components.

• The board is made of layers, typically two to ten, that interconnect components via
copper pathways that are etched into the board.

• The main printed circuit board in a computer is called a system board or motherboard,
while smaller ones that plug into the slots in the main board are called expansion
boards.

• A chip is a single piece of semiconducting material, typically silicon, upon which


electronic circuits and logic gates are fabricated. The resulting product is referred to as
an integrated circuit.

• The motherboard contains a slot or socket for the processor chip, which
typically contains multiple individual cores, in what is known as a
multicore processor.

Core-functional elements:

• Instruction logic: This includes the tasks involved in fetching instructions, and
decoding each instruction to determine the instruction operation and the memory
locations of any operands.

• Arithmetic and logic unit (ALU): Performs the operation specified by an instruction.

• Load/store logic: Manages the transfer of data to and from main memory via cache.

Dept. of MCA Page 9


• L1 cache: split between an instruction cache (I-cache) that is used for the transfer of
instructions to and from main memory, and an L1 data cache, for the transfer of
operands and results.

• L2 cache: It is also split between instruction and data caches.

1.3 THE IAS COMPUTER:

• First generation of computers-vacuum tubes for digital logic elements and memory.

• Stored-program concept- A fundamental design approach first


implemented in the IAS computer.

• Idea-mathematician John von Neumann.

• First publication of the idea-EDVAC (Electronic Discrete Variable


Computer).

Figure 1.2: IAS Structure

Structure of the IAS computer:

It consists of

• A main memory, which stores both data and instructions.

• An arithmetic and logic unit (ALU) capable of operating on binary data.

Dept. of MCA Page 10


• A control unit, which interprets the instructions in memory and causes them to be
executed.

• Input–output (I/O) equipment operated by the control unit.

Memory of the IAS:

• The memory of the IAS consists of 4,096 storage locations, called words, of 40

• Both data and instructions are stored there.

• Numbers are represented in binary form, and each instruction is a binary code.

• Each number is represented by a sign bit and a 39-bit value.

• A word may alternatively contain two 20-bit instructions, with each instruction
consisting of an 8- bit operation code (opcode) specifying the operation to be performed
and a 12-bit address designating one of the words in memory (numbered from 0 to
999).

Figure 1.3: IAS Memory Formats

Terminologies of registers:

• Reveals that both the control unit and the ALU contain storage locations, called
registers, defined as follows:

• Memory buffer register (MBR): Contains a word to be stored in memory or sent


to the I/O unit, or is used to receive a word from memory or from the I/O unit.

• Memory address register (MAR): Specifies the address in memory of the word to
be written from or read into the MBR.

• Instruction register (IR): Contains the 8-bit opcode instruction being executed.

Dept. of MCA Page 11


• Instruction buffer register (IBR): Employed to hold temporarily the right-hand
instruction from a word in memory.

• Program counter (PC): Contains the address of the next instruction pair to be
fetched from memory.

• Accumulator (AC) and multiplier quotient (MQ): Employed to hold temporarily


operands and results of ALU operations. For example, the result of multiplying two 40-
bit numbers is an 80-bit number; the most significant 40 bits are stored in the AC and
the least significant in the MQ.

Control unit:

• The control unit operates the IAS by fetching instructions from memory and
executing them one at a time.

Instruction cycle:

• Each instruction cycle consists of two subcycles.

• During the fetch cycle, the opcode of the next instruction is loaded into the IR
and the address portion is loaded into the MAR.

• This instruction may be taken from the IBR, or it can be obtained from memory by
loading a word into the MBR, and then down to the IBR, IR, and MAR.

• These operations are controlled by electronic circuitry and result in the use of data
paths.

• Once the opcode is in the IR, the execute cycle is performed.

• Control circuitry interprets the opcode and executes the instruction by sending out the
appropriate control signals to cause data to be moved or an operation to be performed
by the ALU.

Instruction of IAS computer:

• Has 21 instructions. Grouped into:

• Data transfer: Move data between memory and ALU registers or between two ALU
registers.

• Unconditional branch: Normally, the control unit executes instructions in sequence


from memory. This sequence can be changed by a branch instruction, which facilitates
repetitive operations.

• Conditional branch: The branch can be made dependent on a condition, thus


allowing decision points. Ex: JUMP

• Arithmetic: Operations performed by the ALU.

• Address modify: Permits addresses to be computed in the ALU and then inserted into
instructions stored in memory. This allows a program considerable addressing flexibility.

Dept. of MCA Page 12


Table: The IAS Instruction Set

Computer function:

• The basic function performed by a computer is execution of a program, which consists


of a set of instructions stored in memory.

• The processor does the actual work by executing instructions specified in the
program.

• Instruction processing consists of two steps.

• The processor reads (fetches) instructions from memory one at a time, then executes
each instruction.

• Program execution consists of repeating the process of instruction fetch and


instruction execution.

• The instruction execution may involve several operations and depends on the nature
of the instruction.

• The processing required for a single instruction is called an instruction cycle.

Dept. of MCA Page 13


• The two steps are referred to as the fetch cycle and the execute cycle.

• Program execution halts only if the machine is turned off, some sort of unrecoverable
rror occurs, or a program instruction that halts the computer is encountered.

Figure 1.4: Basic Instruction Cycle

Instruction Fetch and Execute:

• At the beginning of each instruction cycle, the processor fetches an instruction from
memory.

• In a processor, a register called the program counter (PC) holds the address of the
instruction to be fetched next.

• Unless told otherwise, the processor always increments the PC after each
instruction fetch so that it will fetch the next instruction in sequence.

Example:

• Consider a computer in which each instruction occupies one 16-bit word of memory.

• Assume that the program counter is set to memory location 300, where the location
address refers to a 16-bit word.

• The processor will next fetch the instruction at location 300.

• On succeeding instruction cycles, it will fetch instructions from locations 301, 302,
303, and so on.

• The fetched instruction is loaded into a register in the processor known as the
instruction register (IR).

• The instruction contains bits that specify the action the processor is to take.

• The processor interprets the instruction and performs the required action.

Actions-categories:

• Processor-memory: Data may be transferred from processor to memory or from


memory to processor.

• Processor-I/O: Data may be transferred to or from a peripheral device by


transferring between the processor and an I/O module.

• Data processing: The processor may perform some arithmetic or logic operation on
data.

• Control: An instruction may specify that the sequence of execution be altered. For
example, the processor may fetch an instruction from location 149, which specifies that
the next instruction be from location 182. The processor will remember this fact by
setting the program counter to 182. Thus, on the next fetch cycle, the instruction will be
fetched from location 182 rather than 150.

Dept. of MCA Page 14


Figure 1.5: Characteristics of a Hypothetical Machine

Example of Program Execution:

Dept. of MCA Page 15


Figure 1.6: Example of Program Execution (contents of memory and registers in
hexadecimal)

• The program fragment shown adds the contents of the memory word at address 940
to the contents of the memory word at address 941 and stores the result in the latter
location.

• Three instructions, which can be described as three fetch and three execute cycles, are
required:

1. The PC contains 300, the address of the first instruction. This instruction (the value
1940 in hexadecimal) is loaded into the instruction register IR, and the PC is
incremented. Note that this process involves the use of a memory address register and a
memory buffer register. For simplicity, these intermediate registers are ignored.

2. The first 4 bits (first hexadecimal digit) in the IR indicate that the AC is to be loaded.
The remaining 12 bits (three hexadecimal digits) specify the address (940) from which
data are to be loaded.

3. The next instruction (5941) is fetched from location 301, and the PC is incremented.

Dept. of MCA Page 16


4. The old contents of the AC and the contents of location 941 are added, and the result
is stored in the AC.

5. The next instruction (2941) is fetched from location 302, and the PC is incremented.

6. The contents of the AC are stored in location 941.

Instruction Cycle State Diagram:

Top: exchange between the processor and either memory or an I/O module.

Figure 1.7: Instruction Cycle State Diagram

Terminology-purpose:

• Instruction address calculation (iac): Determine the address of the next


instruction to be executed. Usually, this involves adding a fixed number to the address of
the previous instruction. For example, if each instruction is 16 bits long and memory is
organized into 16-bit words, then add 1 to the previous address. If instead memory is
organized as individually addressable 8-bit bytes, then add 2 to the previous address.

• Instruction fetch (if): Read instruction from its memory location into the processor.

• Instruction operation decoding (iod): Analyze instruction to determine type of


operation to be performed and operand(s) to be used.

• Operand address calculation (oac): If the operation involves reference to an


operand in memory or available via I/O, then determine the address of the operand.

• Operand fetch (of): Fetch the operand from memory or read it in from I/O.

• Data operation (do): Perform the operation indicated in the instruction.

• Operand store (os): Write the result into memory or out to I/O.

Dept. of MCA Page 17


1.4 INTERCONNECTION STRUCTURES:

• A computer consists of a set of components or modules of three basic types


(processor, memory, I/O) that communicate with each other. In effect, a computer is a
network of basic modules. Thus, there must be paths for connecting the modules.

• The collection of paths connecting the various modules is called the


interconnection structure.

Figure 1. 8: Computer Modules

• Memory: Typically, a memory module will consist of N words of equal length. Each
word is assigned a unique numerical address (0, 1, c , N-1). A word of data can be read
from or written into the memory. The nature of the operation is indicated by read and
write control signals. The location for the operation is specified by an address

Dept. of MCA Page 18


• I/O module: From an internal (to the computer system) point of view, I/O is
functionally similar to memory. There are two operations; read and write. Further, an
I/O module may control more than one external device. We can refer to each of the
interfaces to an external device as a port and give each a unique address (e.g., 0, 1, c ,
M-1). In addition, there are external data paths for the input and output of data with an
external device. Finally, an I/O module may be able to send interrupt signals to the
processor.

• Processor: The processor reads in instructions and data, writes out data after
processing, and uses control signals to control the overall operation of the system. It
also receives interrupt signals.

The interconnection structure must support the following types of transfers:

• Memory to processor: The processor reads an instruction or a unit of data from


memory.

• Processor to memory: The processor writes a unit of data to memory.

• I/O to processor: The processor reads data from an I/O device via an I/O module.

• Processor to I/O: The processor sends data to the I/O device.

• I/O to or from memory: For these two cases, an I/O module is allowed to exchange
data directly with memory, without going through the processor, using direct memory
access.

1.5 BUS INTERCONNECTION:

1.5.1 Bus Structures:

• To achieve a reasonable speed of operation

– A computer must be organized so that all its units can handle one full word of data at a
given time

• When a word of data is transferred between units, all its bits are transferred in
parallel,

– Bits are transferred simultaneously over many wires or lines, one bit per
line.

• A group of lines that serves as a connecting path for several devices is called a
bus.

• Buses: Data, Address and Control

Figure 1.9: Single Bus Structure

Dept. of MCA Page 19


• Only one data transfer at a time

• Only two units can actively use the bus at any given time.

• Bus control lines are used to arbitrate multiple request for use of the bus.

Figure 1.10: Bus Interconnection Scheme

• A bus that connects major computer components (processor, memory, I/O) is


called a system bus.

• The data lines provide a path for moving data among system modules. These
lines, collectively, are called the data bus. The data bus may consist of 32, 64, 128, or
even more separate lines, the number of lines being referred to as the width of the data
bus.

• The address lines are used to designate the source or destination of the data on
the data bus.

• The control lines are used to control the access to and the use of the data and
address lines.

Typical control lines include:

• Memory write: causes data on the bus to be written into the addressed location.

• Memory read: causes data from the addressed location to be placed on the bus.

• I/O write: causes data on the bus to be output to the addressed I/O port.

• I/O read: causes data from the addressed I/O port to be placed on the bus.

• Transfer ACK: indicates that data have been accepted from or placed on the bus.

• Bus request: indicates that a module needs to gain control of the bus.

• Bus grant: indicates that a requesting module has been granted control of the
bus.

• Interrupt request: indicates that an interrupt is pending.

• Interrupt ACK: acknowledges that the pending interrupt has been recognized.

Dept. of MCA Page 20


• Clock: is used to synchronize operations.

• Reset: initializes all modules.

Bus Structure

• The main virtue of single bus structure

– Low cost

– Flexibility for attaching peripheral devices

• Multiple buses achieve more concurrency in operations

– By allowing two or more transfers to be carried out at the same time

– Leads better performance

– With a penalty of increased cost

• Slower devices on the bus uses buffers registers

– Keyboards, printers, magnetic and optical disks

• Buffer registers smooth out timing differences among processors, memories, and
I/O devices.

• Buffers prevents a high speed processor from being locked to a slow I/O device
during a sequence of data transfers.

• This allows processors to switch rapidly from one device to another

Dept. of MCA Page 21

You might also like