COA1
COA1
Computer Types:
Differs on:
• Size
• Cost
• Computational Power
Intended Use
Desktop
Portable Notebook
Workstations
Servers:
Super Computers:
Applications like:
• Weather forecasting
• Aircraft design and simulation
Functional Units:
Input devices:
• Keyboard
• Joysticks
• Track balls
• Mouse
• Microphone
Memory Unit:
Two types
• Primary
• Secondary
Primary Memory
Terminology:
• any location in the memory can be reached in a short and fixed amount of time
after specifying its address
• This time is fixed, independent of the location of the word being accessed.
Primary Memory:
Secondary Memory:
Output Unit:
Control Unit:
Computer Organization:
Organizational attributes:
• The hierarchical nature of complex systems is essential to both their design and
their description.
• The designer need only deal with a particular level of the system at a time.
Function:
• In general terms, there are only four basic functions that a computer can
perform:
• Data storage: Even if the computer is processing data on the fly (i.e., data come
in and get processed, and the results go out immediately), the computer must
temporarily store at least those pieces of data that are being worked on at any given
• Control: Within the computer, a control unit manages the computer’s resources
and orchestrates the performance of its functional parts in response to instructions.
• Central processing unit (CPU): Controls the operation of the computer and
performs its data processing functions; often simply referred to as processor.
• I/O: Moves data between the computer and its external environment.
The most complex component is the CPU. Its major structural components are as
follows:
• Control unit: Controls the operation of the CPU and hence the computer.
• Arithmetic and logic unit (ALU): Performs the computer’s data processing
functions.
• There are several approaches to the implementation of the control unit; one
common approach is a microprogrammed implementation.
• When multiple processors all reside on a single chip, the term multicore computer is
used, and each processing unit (consisting of a control unit, ALU, registers, and perhaps
cache) is called a core.
Terminology:
• Central processing unit (CPU): That portion of a computer that fetches and executes
instructions. It consists of an ALU, a control unit, and registers. In a system with a single
processing unit, it is often simply referred to as a processor.
• The processor is the computer component that interprets and executes instructions.
• A printed circuit board (PCB) is a rigid, flat board that holds and interconnects chips
and other electronic components.
• The board is made of layers, typically two to ten, that interconnect components via
copper pathways that are etched into the board.
• The main printed circuit board in a computer is called a system board or motherboard,
while smaller ones that plug into the slots in the main board are called expansion
boards.
• The motherboard contains a slot or socket for the processor chip, which
typically contains multiple individual cores, in what is known as a
multicore processor.
Core-functional elements:
• Instruction logic: This includes the tasks involved in fetching instructions, and
decoding each instruction to determine the instruction operation and the memory
locations of any operands.
• Arithmetic and logic unit (ALU): Performs the operation specified by an instruction.
• Load/store logic: Manages the transfer of data to and from main memory via cache.
• First generation of computers-vacuum tubes for digital logic elements and memory.
It consists of
• The memory of the IAS consists of 4,096 storage locations, called words, of 40
• Numbers are represented in binary form, and each instruction is a binary code.
• A word may alternatively contain two 20-bit instructions, with each instruction
consisting of an 8- bit operation code (opcode) specifying the operation to be performed
and a 12-bit address designating one of the words in memory (numbered from 0 to
999).
Terminologies of registers:
• Reveals that both the control unit and the ALU contain storage locations, called
registers, defined as follows:
• Memory address register (MAR): Specifies the address in memory of the word to
be written from or read into the MBR.
• Instruction register (IR): Contains the 8-bit opcode instruction being executed.
• Program counter (PC): Contains the address of the next instruction pair to be
fetched from memory.
Control unit:
• The control unit operates the IAS by fetching instructions from memory and
executing them one at a time.
Instruction cycle:
• During the fetch cycle, the opcode of the next instruction is loaded into the IR
and the address portion is loaded into the MAR.
• This instruction may be taken from the IBR, or it can be obtained from memory by
loading a word into the MBR, and then down to the IBR, IR, and MAR.
• These operations are controlled by electronic circuitry and result in the use of data
paths.
• Control circuitry interprets the opcode and executes the instruction by sending out the
appropriate control signals to cause data to be moved or an operation to be performed
by the ALU.
• Data transfer: Move data between memory and ALU registers or between two ALU
registers.
• Address modify: Permits addresses to be computed in the ALU and then inserted into
instructions stored in memory. This allows a program considerable addressing flexibility.
Computer function:
• The processor does the actual work by executing instructions specified in the
program.
• The processor reads (fetches) instructions from memory one at a time, then executes
each instruction.
• The instruction execution may involve several operations and depends on the nature
of the instruction.
• Program execution halts only if the machine is turned off, some sort of unrecoverable
rror occurs, or a program instruction that halts the computer is encountered.
• At the beginning of each instruction cycle, the processor fetches an instruction from
memory.
• In a processor, a register called the program counter (PC) holds the address of the
instruction to be fetched next.
• Unless told otherwise, the processor always increments the PC after each
instruction fetch so that it will fetch the next instruction in sequence.
Example:
• Consider a computer in which each instruction occupies one 16-bit word of memory.
• Assume that the program counter is set to memory location 300, where the location
address refers to a 16-bit word.
• On succeeding instruction cycles, it will fetch instructions from locations 301, 302,
303, and so on.
• The fetched instruction is loaded into a register in the processor known as the
instruction register (IR).
• The instruction contains bits that specify the action the processor is to take.
• The processor interprets the instruction and performs the required action.
Actions-categories:
• Data processing: The processor may perform some arithmetic or logic operation on
data.
• Control: An instruction may specify that the sequence of execution be altered. For
example, the processor may fetch an instruction from location 149, which specifies that
the next instruction be from location 182. The processor will remember this fact by
setting the program counter to 182. Thus, on the next fetch cycle, the instruction will be
fetched from location 182 rather than 150.
• The program fragment shown adds the contents of the memory word at address 940
to the contents of the memory word at address 941 and stores the result in the latter
location.
• Three instructions, which can be described as three fetch and three execute cycles, are
required:
1. The PC contains 300, the address of the first instruction. This instruction (the value
1940 in hexadecimal) is loaded into the instruction register IR, and the PC is
incremented. Note that this process involves the use of a memory address register and a
memory buffer register. For simplicity, these intermediate registers are ignored.
2. The first 4 bits (first hexadecimal digit) in the IR indicate that the AC is to be loaded.
The remaining 12 bits (three hexadecimal digits) specify the address (940) from which
data are to be loaded.
3. The next instruction (5941) is fetched from location 301, and the PC is incremented.
5. The next instruction (2941) is fetched from location 302, and the PC is incremented.
Top: exchange between the processor and either memory or an I/O module.
Terminology-purpose:
• Instruction fetch (if): Read instruction from its memory location into the processor.
• Operand fetch (of): Fetch the operand from memory or read it in from I/O.
• Operand store (os): Write the result into memory or out to I/O.
• Memory: Typically, a memory module will consist of N words of equal length. Each
word is assigned a unique numerical address (0, 1, c , N-1). A word of data can be read
from or written into the memory. The nature of the operation is indicated by read and
write control signals. The location for the operation is specified by an address
• Processor: The processor reads in instructions and data, writes out data after
processing, and uses control signals to control the overall operation of the system. It
also receives interrupt signals.
• I/O to processor: The processor reads data from an I/O device via an I/O module.
• I/O to or from memory: For these two cases, an I/O module is allowed to exchange
data directly with memory, without going through the processor, using direct memory
access.
– A computer must be organized so that all its units can handle one full word of data at a
given time
• When a word of data is transferred between units, all its bits are transferred in
parallel,
– Bits are transferred simultaneously over many wires or lines, one bit per
line.
• A group of lines that serves as a connecting path for several devices is called a
bus.
• Only two units can actively use the bus at any given time.
• Bus control lines are used to arbitrate multiple request for use of the bus.
• The data lines provide a path for moving data among system modules. These
lines, collectively, are called the data bus. The data bus may consist of 32, 64, 128, or
even more separate lines, the number of lines being referred to as the width of the data
bus.
• The address lines are used to designate the source or destination of the data on
the data bus.
• The control lines are used to control the access to and the use of the data and
address lines.
• Memory write: causes data on the bus to be written into the addressed location.
• Memory read: causes data from the addressed location to be placed on the bus.
• I/O write: causes data on the bus to be output to the addressed I/O port.
• I/O read: causes data from the addressed I/O port to be placed on the bus.
• Transfer ACK: indicates that data have been accepted from or placed on the bus.
• Bus request: indicates that a module needs to gain control of the bus.
• Bus grant: indicates that a requesting module has been granted control of the
bus.
• Interrupt ACK: acknowledges that the pending interrupt has been recognized.
Bus Structure
– Low cost
• Buffer registers smooth out timing differences among processors, memories, and
I/O devices.
• Buffers prevents a high speed processor from being locked to a slow I/O device
during a sequence of data transfers.