Week4 Revise
Week4 Revise
Capacitor and
Inductor
Week 4
Capacitor
Inductor
Capacitance and inductance
combinations
Consequences of linearity
Capacitor
Model
= permittivity
A = area
d = distance
Ref: William H. Hayt, Jack E. Kemmerly and
Steven M. Durbin, 2012, “Engineering circuit
analysis”, pp.218.
270 pF Ceramic,
20 uF Tantalum,
15 nF Polyester,
150 nF Polyester
Ref: William H. Hayt, Jack E. Kemmerly and Steven M. Durbin, 2012, “Engineering circuit analysis”, pp.219.
voltage-current relationship
Dc response:
dv
i=C =0 i=0
dt
+ v -
Open circuit to DC
Determine the current is flowing through the capacitor for the
two voltage waveforms if C = 2 F.
dv d ( 5)
i=C = ( 2) =0
v=5V dt dt
Ref: William H. Hayt, Jack E. Kemmerly and Steven M. Durbin, 2012, “Engineering circuit analysis”, pp.219.
v = V p sin (t ) =V p sin ( 2 ft ) V
1
v = V p sin 2 t V
T
2
v = 5sin t V
2
v = 5sin ( t ) V
T =2s
= ( 2 ) ( 5sin ( t ) )
dv d
i=C
dt dt
i = ( 2 )( 5 )( ) cos t = 31.41cos t
Ref: William H. Hayt, Jack E. Kemmerly and Steven M. Durbin, 2012, “Engineering circuit analysis”, pp.219.
Find the capacitor voltage that is associated with the
current shown in figure. The value of the capacitance is 5 F
− t 0 t 2m
1 2 3
0 t 2m
Ref: William H. Hayt, Jack E. Kemmerly and Steven M. Durbin, 2012, “Engineering circuit analysis”, pp.221.
Ref: William H. Hayt, Jack E.
Kemmerly and Steven M. Durbin,
2012, “Engineering circuit analysis”,
pp.221.
− t 0
1
1 t
1 − t 0 : v ( t ) = i ( t )dt + v ( t0 )
C t0
1 0
v (t ) = ( 0 )dt + v ( − ) ; v ( − ) = 0
C −
v ( t ) = 0, − t 0
@ t = 0 : v ( 0) = 0
2 0 t 2m :
1 t
v (t ) = i ( t )dt + v ( t0 )
C t0
v ( t ) = ( 20 10−3 )dt + v ( 0 )
1 2m
Ref: William H. Hayt, Jack E. Kemmerly and C 0
Steven M. Durbin, 2012, “Engineering circuit
analysis”, pp.221.
−6 0 (
20 10−3 )dt + v ( 0 )
1
v (t ) =
2m
2 5 10
0 t 2m 20 10−3
v (t ) = t + v ( 0)
5 10−6
v ( t ) = 4000t + v ( 0 )
From stage 1 v ( 0) = 0
v ( t ) = 4000t , ( 0 t 2 ms )
@ t = 2 ms : v ( 2 ms ) = 4000 ( 2 10−3 ) = 8 V
3 2m t :
1 t
v (t ) = i ( t )dt + v ( t0 )
C t0
1
v (t ) = ( 0 )dt + v ( 2 ms )
Ref: William H. Hayt, C 2 m
Jack E. Kemmerly and
Steven M. Durbin, 2012, t 2m
“Engineering circuit v ( t ) = 0 + v ( 2 ms )
analysis”, pp.221. 3
From stage 1 : v ( 2 ms ) = 8 V
v ( t ) = 8 V, ( t 2 ms )
3
v (t ) = 8 V
1
2
v (t ) = 0 v ( t ) = 4000t
− t 0 0 t 2m t 2m
1 2 3
Ref: William H. Hayt, Jack E. Kemmerly and Steven M. Durbin, 2012, “Engineering circuit analysis”, pp.221.
Energy storage
Capacitor
Inductor
Capacitance and inductance
combinations
Consequences of linearity
Inductor
Model
Ref: William H. Hayt, Jack E. Kemmerly and Steven M. Durbin, 2012, “Engineering circuit analysis”, pp.225.
215 uH ferrite core
266 uH ferrite core cylindrical
85 uH iron power
core toroidal
7 uH lossy-core
10 uH bobbin-style
287 uH ferrite core toroidal 100 uH axial lead
11 H
Ref: William H. Hayt, Jack E. Kemmerly and Steven M. Durbin, 2012, “Engineering circuit analysis”, pp.226.
voltage-current relationship
Dc response:
di iL
v=L =0
dt L
+ v =0 -
L
Short circuit to DC
Ex: Given the waveform of the current in a 3 H inductor,
determine the inductor voltage and sketch it.
− t −1
2 −1 t 0 :
di i
v=L =v=L
dt t
(1)
v = ( 3) =3V
(1)
−1 t 0
2
3 0 t 2:
di i
v=L =L
dt t
( 0)
v=L =0
( 2)
3
0t 2
4 2 t 3:
di i
v=L =v=L
dt t
( −1)
v = ( 3) = −3 V
(1)
4
2t 3
5 t 3:
di i
v=L =L
dt t
(0)
v=L =0
t
5
t 3
0, −1 t
3, −1 t 0
v = 0, 0 t 2
−3, 2 t 3
0, t 2
Ref: William H. Hayt, Jack E. Kemmerly and
Steven M. Durbin, 2012, “Engineering circuit
analysis”, pp.227.
The voltage across a 2 H inductor is known to be 6cos5t V.
Determine the resulting inductor current if i(t= -/2) = 1 A.
v ( t ) = 6 cos 5t
i=
1 t
L 0
t
vdt + i ( t 0) =
1 t
2 0
t
( 6 cos 5t ) dt =
16
25
sin 5t
t
(
t0 )
+ i ( t0 )
6
i= ( sin 5t − sin 5t0 ) + i ( t0 )
10
If t0 = -/2, i( t0 = -/2) = 1 ;
6
i= sin 5t − sin 5 − +1
10 2
6
i= sin 5t − sin 5 − +1
10 2
i = 0.6sin 5t + 0.6 + 1
i = 0.6sin 5t + 1.6 A
Energy storage
Capacitor
Inductor
Capacitance and inductance
combinations
Consequences of linearity
Capacitance combination
• Capacitors in series
KVL: Ref: William H. Hayt, Jack E. Kemmerly and Steven M. Durbin, 2012, “Engineering circuit analysis”, pp.236.
• Capacitors in parallel
Ref: William H. Hayt, Jack E. Kemmerly and Steven M. Durbin, 2012, “Engineering circuit analysis”, pp.237.
Inductance combination
• Inductors in series
Ref: William H. Hayt, Jack E. Kemmerly and Steven M. Durbin, 2012, “Engineering circuit analysis”, pp.235.
KVL:
• Inductors in parallel
Ref: William H. Hayt, Jack E. Kemmerly and Steven M. Durbin, 2012, “Engineering circuit analysis”, pp.236.
KCL:
Ex: simplify the network by using series-parallel combination
0.8 H
1 uF (6*3)/9 = 2 uF
0.8 H
1+2 = 3 uF
(2*3)/5 = 1.2 H
Capacitor and Inductor
Capacitor
Inductor
Capacitance and inductance
combinations
Consequences of linearity
Consequences of linearity
Ref: William H. Hayt, Jack E. Kemmerly and Steven M. Durbin, 2012, “Engineering circuit analysis”, pp.238.
Ref: William H. Hayt, Jack E. Kemmerly and Steven M. Durbin, 2012, “Engineering circuit analysis”, pp.238.
KCL@node v1; v −v
iL + iC 2 + 1 2 = 0
R
1 t dv1 v1 − v2
vL dt + iL ( t0 ) + C2
L t0
+ =0
dt R
1 t dv1 v1 − v2
( v1 − vs ) dt + iL ( t0 ) + C2 +
L t0 dt R =0
1 t 1 t dv1 v1 v2
v1 dt − vs dt + iL ( 0)
t + C 2 + − = 0
L 0
t L 0
t dt R R
v1 1 t dv1 v2 1 t
+ v1dt + C2 − = vs dt − iL ( t0 )
R L t0 dt R L t0
KCL@node v2;
v2 − v1
−is + + iC1 = 0
R
v v dv
−is + 2 − 1 + C1 C1 = 0
R R dt
v v dv
−is + 2 − 1 + C1 C1 = 0
R R dt
v v d ( v2 − vs )
−is + 2 − 1 + C1 =0
R R dt
v2 v1 dv2 dvs
−is + − + C1 − C1 =0
R R dt dt
v1 v2 dv dv
− + + C1 2 = is + C1 s
R R dt dt
From (1) and (2):
v1 1 t dv1 v2 1 t
+ v1dt + C2 − = vs dt − iL ( t0 )
R L t0 dt R L t0
v1 v2 dv dv
− + + C1 2 = is + C1 s
R R dt dt
References
Answer :
Answer : ( a ) i = 30 (1 − t ) e−t mA
( b ) i = 4e−5t (100 cos100t − 5sin100t ) mA
The inductor
Answer :
VL (V)
100
Answer : 50
(a) 10 20 30 40 50 60
t (ms)
-100
(b) 500 W @ t = 40− ms, ( b ) − 500 W @ t = 20+ and 40+ ms, ( d ) 2.5 J
Answer : 1 A
Answer :
1.5R
(a)
(b) 3.6 V
Answer : 85.211 nF