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Chapter 2 FCnew

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17 views47 pages

Chapter 2 FCnew

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stakeking008
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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Chapter 2

Logic Circuits
The circuits which perform logical operation on two or
more inputs to obtain certain output are called logic
circuits.
Logic circuits are of two types:
 Combinational logic circuits
 Sequential logic circuits
Characteristics of Combinational logic circuit
 Combinational logic circuit is a type of digital logic
circuit in which the output at any time depends upon
present inputs only.
 It does not have a memory unit
 It has n number of inputs and m number of outputs
 Combinational circuit consists of input variables,
logic gates and output variables
 The logic function performed by a combinational
circuit is fully defined by a set of Boolean
expressions.

1
Design of Logic Circuit
Q1: Implement the logic circuit for the following Boolean
expression:
X=AB+CDE

Ans:

Q2: Implement the logic circuit for the following Boolean


expression

Ans:

2
Q3: Implement the logic circuit for the following Boolean
expression
Y=ABC+D+E
Ans:

3
Half Adder
The half-adder is an arithmetic circuit that can be used
to add two binary digits. It accepts two binary digits as
inputs and produces two outputs sum and carry.
The block diagram of half adder is as shown below:

Fig: block diagram of half adder


The operation of half adder is shown by the following
truth table:

Half adder truth table


As shown in truth table, the sum output (s) is 1, when A
and B are not same. The carry output (c) is 1 only when
A and B are 1.

4
Therefore, the logic expressions for half adder are given
by,
S=A B
C = AB
The logic diagram for half adder is as shown below:

Fig: logic diagram of half adder

5
Full Adder
A full adder circuit is an arithmetic circuit that can be
used to add three binary digits. It accepts two input bits
and an input carry and generates sum and carry
outputs.
The block diagram of full adder is as shown below:

Fig: block diagram of full adder


The operation of full adder can be shown by the
following truth table:

Truth table of full adder


The logic expressions for full adder are given as:

6
The logic diagram of full adder is as shown below:

Fig: logic diagram of full adder

7
Half Subtractor
The half-subtractor is a combinational circuit which is
used to perform subtraction of two bits. It accepts two
binary digits as inputs and produces two outputs:
difference and borrow.
The block diagram of half subtractor is as shown below:

Fig: block diagram of half subtractor

The truth table of half subtractor is given below:

Truth table of half subtractor


The logic expressions of half subtractor are:
D=A B

The logic diagram of half subtractor is given as below:

8
Fig: half subtractor logic diagram

Full Subtractor
A full subtractor is a combinational circuit which
performs subtraction of two binary digits taking borrow
into consideration. It accepts two input bits and an input
borrow and produces difference and borrow outputs.
The block diagram of full subtractor is shown below:

Fig: block diagram of full subtractor


The operation of full subtractor is shown by the following
truth table:

9
Truth table of full subtractor

The logic expressions for full subtractor are:


D = (A B) Bi

The logic diagram of full subtractor is as shown below

10
Comparator
A comparator is a combinational circuit that compares
the magnitudes of two given binary numbers and
determines whether one is equal to, less than or greater
than the other.
The comparator has 3 outputs representing the
conditions A=B, A>B and A<B, if A and B are the two
numbers being compared.
The following figure shows the block diagram of a n-bit
magnitude comparator:

fig: block diagram of n bit comparator

2 bit comparator
A comparator used to compare two binary numbers
each of two bits is called a 2-bit Magnitude comparator.
It consists of four inputs and three outputs to generate
less than, equal to and greater than between two binary
numbers.
The block diagram for a 2-bit comparator is given
below:

11
Fig: block diagram of 2 bit comparator

The two input binary numbers are A and B which are of


two bits each.

The truth table for a 2-bit comparator is given below:

12
Multiplexer
The multiplexer is a combinational logic circuit that has
many inputs and one output. It seclects any one input
from several inputs and pass it to the output line.The
value of select lines determine which input is connected
to the output. Multiplexer is also called as a data
selector.
n
In general a multiplexer has 2 inputs, n select lines and
only one output.
The general block diagram of a multiplexer is shown
below:

13
2:1 multiplexer
A 2:1 multiplexer has two inputs D0 and D1, one select
line S, enable input E and one output Y.
The block diagram of a 2:1 multiplexer is shown below:

The truth table of 2:1 MUX is as shown below:

When s=0, the MUX selects D0 and output Y=D0. When


s=1, the MUX selects D1 and output Y=D1
The logic equation of 2:1 MUX is given as below:

The logic diagram of 2:1 MUX is as given below:

14
4:1 Multiplexer
A 4:1 multiplexer has 4 inputs D0, D1, D2 and D3, 2
select lines S0 and S1, one enable input E, and one
output Y.
The block diagram of 4:1 MUX is as shown below:

The multiplexer selects one of the 4 inputs and passes it


to the output. The select lines determine which input is
to be selected and connected to the output.
The truth table of 4:1 MUX is as shown below:

15
The logic equation of 4:1 MUX is given as below:

The logic diagram of 4:1 MUX is as shown below:

16
Demultiplexer
Demultiplexer is a combinational logic circuit which has
one input and many outputs. It is also called as a data
distributer. It passes the input to one of the output line
depending on the value of select lines.
n
In general, the demultiplexer has one input, 2 outputs
and n select lines.
The general block diagram of a demultiplexer is as
shown below:

1:2 demultiplexer
1:2 De-mux has only one input D, one select line S and
two outputs Y0 and Y1.
The block diagram of a 1:2 demultiplexer is as shown
below:

17
The truth table of 1:2 demultiplexer is as given below:

The logic equations of 1;2 demultiplexer aew:

When s=0, the input D is passed to the output Y0 and


when s=1, the input D is passed to the output Y1.
The logic diagram of 1:2 demultiplexer is as given
below:

1:4 demultiplexer
1:4 De- Multiplexer has
one input D, two selection lines,
S1 & S0 and four outputs Y3, Y2,
18
Y1 & Y0.
The block diagram of 1:4 demultiplexer is as given
below:

The truth table of 1:4 demux is as given below:

The logic equations are given by:

19
The logic diagram of 1:4 demux is as shown below:

Encoder
It is a combinational logic circuit that has 2n input lines
and n output lines. It does the reverse function of

20
decoder. It is a device which converts information signal
in to coded form. Encoder is used at the transmitter side.
The general block diagram of an encoder is as shown
below:

Decimal to BCD encoder


A decimal to BCD (binary coded decimal) encoder is
also known as 10-line to 4-line encoder. It accepts 10-
inputs and produces 4-bit BCD output corresponding to
the activated decimal input.
Figure shows the logic symbol of decimal to BCD
encoder.

21
The truth table of decimal to BCD encoder is as given
below:

The logic equations are:


A= 8+9
B= 4+5+6+7
22
C= 2+3+6+7+9
D=1+3+5+7+9
The logic diagram of decimal to BCD encoder is given
as below:

Decoder
Decoder does the reverse function of encoder. It is a
n
combinational logic circuit that has n inputs and 2
outputs. One of these outputs will be active High based
on the combination of inputs present. Decoder converts
coded signal into original information signal. It is used at
the receiver side.
The logic symbol of a decoder is as shown below:

23
BCD to decimal decoder
The BCD-to-decimal decoder converts each BCD code
(8421 code) into one of ten possible decimal digit
indications. It is frequently referred as a 4-line-to-10-line
decoder.
The logic symbol of BCD to decimal decoder is shown
below:

The truth table of BCD to decimal decoder is given below:

24
The logic expressions are:

The logic diagram is shown below:

25
BCD to 7 Segment Decoder ( OR BCD to 7 segment code converter)

A BCD to decimal decoder is a combinational logic circuit used to convert a BCD


code into a 7 segment code. It has 4 input lines and 7 output lines as shown in the
following block diagram:

Fig: block diagram of BCD to 7 segment code converter

Seven segment displays comprise of seven individual segments namely a, b, c, d, e,


f and g. The 7 segments are formed by LEDs arranged in number 8 pattern as
shown below:

26
The 7 segment displays can be common cathode or common anode type. For
common cathode display, the output of the decoder must be high in order to blink the
segment.

The truth table of BCD to 7 segment decoder for common cathode display is shown
below:

27
IMPORTANT QUESTIONS AND ANSWERS

Q1: List the features and applications of half adders

Ans:

Features of half adder

 The half-adder is a combinational logic circuit used to add two


binary digits.
 It accepts two binary digits as inputs and produces two outputs
sum and carry.
 The sum and carry expressions for half adder are:
S=A B
C = AB
 The logic diagram of half adder is simple and can be constructed
by using one XOR gate & one AND gate.
 The main disadvantage of half adder is that it adds only two binary
bits and does not consider the carry bit.

Applications:

 Half adders are used in ALU of computer


 Used in many processors to calculate addresses and table indices
 Used in calculators
 Used in many digital systems
 Two half adders are used to construct full adder

Q2: List the features and applications of full adders

Ans:

Features of full adder

 A full adder is a combinational circuit used to add three binary


digits.
 It accepts two input bits and an input carry and generates sum
and carry outputs.

28
 The sum and carry expressions of full adder are:

 The logic diagram of full adder has 2 XOR gates, 2 AND gates and
1 OR gate.
 A full adder can be constructed using two half adders.

Applications:

o A Full Adder can be used as a part of many larger circuits like


Ripple Carry Adder to add n-bits simultaneously.

o Used in multiplication circuit to perform Carryout Multiplication.

o Used in ALU of computer

o Used to generate memory addresses inside a computer

o Used in Graphics Processing Unit.

Q3: List the features and applications of half subtractor

Ans:

Features of half subtractor

 The half-subtractor is a combinational circuit used to subtract two


bits.
 It accepts two binary digits as inputs and produces two outputs:
difference and borrow.
 The difference and borrow outputs are:

D=A B

 The logic diagram of half subtractor is simple and can be


constructed with 1 XOR gate, 1 AND gate and 1 NOT gate.
 The half subtractor do not take borrow from the previous output
which is its main disadvantage.

29
Applications:

 Half subtractor is used to reduce the force of audio or radio signals

 It can be used in amplifiers to reduce the sound distortion

 Half subtractor is used in ALU of computer

 It can be used to increase and decrease operators

 Used in calculators

 Used in many processors to calculate addresses and table indices

Q4: List the features and applications of full subtractor

Ans:

 A full subtractor is a combinational circuit to subtract two binary


digits taking borrow into consideration.
 It accepts two input bits and an input borrow and produces
difference and borrow outputs.
 The difference and borrow outputs are:
D = (A B) Bi

 The logic diagram of full subtractor has 2 XOR gates, 2 AND gates
and 2 NOT gates and 1 OR gate.
 A full subtractor can be constructed using two half subtractors

Applications:

 Used in ALU of computers


 Used in GPU
 Used in calculators
 Used in microcontrollers
 Used in many processors to compute addresses and tables
 Used in many DSP and networking based systems

30
Q5: List the features and applications of encoders

Ans:

Features of encoders:
n
 It is a combinational logic circuit with 2 inputs and n outputs.
 It does the reverse function of decoder.
 It converts information signal in to coded form.
 Encoder is used at the transmitter side.
 Encoders can be built using basic gates

Applications:

 Used to translate the decimal digits to binary in pocket calculators


 Used to reduce the number of bits
 Used to translate the data into coded form
 Used in communication systems
 Used in microcontroller and microprocessor based applications
 Used in security systems
 Used in many digital systems
 Used in data multiplexing

Q6: List the features and applications of decoders

Ans:

Features of decoders:

 Decoder does the reverse function of encoder.


n
 It is a combinational logic circuit that has n inputs and 2 outputs.
 Decoder converts coded signal into data signal.
 It is used at the receiver side.
 Decoders are built using basic gates.
 Easy to design
 Used to implement many logic circuits

Applications:

31
 Used in data demultiplexing
 Used in 7 segment displays
 Used in microprocessor memory systems
 Used in computer I/O systems
 Used to decode the instructions
 Used in code conversion
 Used in many output devices like monitors, printers etc.

Q7: List the features and applications of comparators

Ans:

Features of comparators:

 A comparator is a combinational circuit used to compare two


binary numbers
 It has two n bit inputs and three outputs
 It produces the output conditions: less than, greater than and equal
to
 Digital comparators are available as identity comparators and
magnitude comparators.
 An XNOR gate is used as a basic comparator

Applications:

 Used in ALU of computer


 Used in microcontrollers
 Used in password verification
 Used in biometric applications.
 Used in auto turn off devices
 Used in process controllers
 Used in address decoding circuit

32
Q7: List the features and applications of multiplexers

Ans:

Features of multiplexers

 The multiplexer is a combinational logic circuit that has many


inputs and one output.
 Multiplexer is also called as a data selector
n
 Multiplexer has 2 inputs, n select lines and only one output.
 The inputs to a multiplexer can be analog or digital.
 Multiplexer has select lines to select one input from many inputs
and pass it to the output

Applications:

 Used in communication systems


 Used in telephone networks
 Used in computer memory
 Used in A/D and D/A converters
 Used in data acquisition systems
 Used to transmit data from one to another point
 Used as switches

Q8: List the features and applications of de multiplexers

Ans:

Features:

 The de multiplexer is a combinational logic circuit that has one


input and many outputs.
 It does the reverse function of multiplexer
 De multiplexer is also called as a data distributer
n
 It has one input, n select lines and 2 outputs.

33
 De multiplexer has select lines to pass the input to one of the
output lines

Applications:

 Used in communication systems


 Used as serial to parallel data converter
 Used in ALU of computers
 Used as switches
 Used in clock data recovery solutions

34
SEQUENTIAL CIRCUITS

Characteristics of sequential circuits

 Sequential circuits are the type of logic circuits whose output not
only depends on present inputs but also on previous outputs.

 Sequential circuits contain memory elements to store previous


output.

 Sequential circuits have feedback path from output to input

 Sequential circuits are complex than combinational circuits and


they are difficult to design

 Sequential circuits are slower than combinational circuits

 Sequential circuits are designed using basic gates and


combinational logic circuits.

Ex: counters, flip-flops, shift registers

Block diagram of sequential circuit

35
Types of sequential circuit

Sequential circuits are classified into two types:

1. Synchronous sequential circuit


2. Asynchronous sequential circuit

Comparison between synchronous and asynchronous sequential


circuit
Synchronous sequential circuit Asynchronous sequential circuit
Synchronous sequential circuit is Asynchronous sequential circuit is
one whose output change at the one whose output do not change
same time at the same time
The change in state occurs in The change in state occurs in
response to clock pulse response to inputs

These circuits are synchronized These circuits are not synchronized


with either positive or negative with either positive or negative edge
edge of the clock signal of the clock signal
They are slow They are fast

Clocked flip flops acts as memory Unclocked flip flops acts as memory
element element

Easy to design Difficult to design

Simple circuit Complex circuit

Time variable is discrete Time variable is continuous

36
Comparison between combinational and sequential circuits

Combinational logic circuit Sequential logic circuit


Combinational logic circuit is one in Sequential logic circuit is one in
which output depends only on which output depends on the
the present inputs present inputs and past outputs

Memory element is not present Memory element is present

Feedback path is not present Feedback path is present

Clock signal is not required for its Most of the sequential circuits
operation require clock signal for their
operation

The circuit is simple The circuit is complex

These are fast These are slow

Its operation is defined by truth Its operation is defined by truth


table table and timing diagrams

Ex: Ex:
 adders,  flip flops,
 subtractors,  counters,
 encoders,  shift registers etc.
 decoders,
 multiplexers etc

37
Types and applications of shift registers

Shift registers are a type of sequential circuit used for storing and
transfering digital data and typically do not possess a characteristic
internal sequence of states. They contain a group of flip flops.

Shift registers are classified into following four types:

1. Serial in serial out shift register (SISO)


2. Serial in parallel out shift register (SIPO)
3. Parallel in parallel out shift register (PIPO)
4. Parallel in serial out shift register (PISO)

1.Serial in serial out shift register (SISO)

The serial in/serial out shift register accepts data serially one bit at a time
on a single line and produces the output in serial form.

2. Serial in parallel out shift register (SIPO)

The serial in parallel out shift registers accept the data serially one bit at
a time and produces the output simultaneously in parallel form

38
3.Parallel in parallel out shift register (PIPO)

The parallel in parallel out shift register accepts the data bits
simultaneously in parallel form and immediately produces the output
simultaneously in parallel form.

39
4.Parallel in serial out shift register (PISO)

The parallel in serial out shift register accepts the data simultaneously in
parallel form and produces the output serially one bit at a time.

Applications of shift registers

 Shift registers are used to generate time delay


 Used to implement a specified ring counter
 used for serial-to-parallel conversion of data
 used in keyboard encoder
 used in UART
 Used in calculators and computers to store binary data
 Used as sequence generators to generate sequence of 0s and 1s

40
Types and applications of counters

Counter is a group of flip flops used for counting the clock pulses. It is a
type of finite state machine.

Counters are classified into two types according to the way they are
clocked:

1. Asynchronous counter
2. Synchronous counter

1.Asynchronous counter

An asynchronous counter is one in which all the flip-flops do not have a


common clock pulse. The first flip-flop is clocked by the external clock
pulse and then each successive flip-flop is clocked by the output of the
preceding flip-flop. An asynchronous counter is commonly called as
ripple counter.

Ex: Ripple UP counter, Ripple DOWN counter

2.Synchronous counter

A synchronous counter is one in which all the flip-flops in the counter are
clocked at the same time by a common clock pulse..

EX: Ring counter, Johnson counter

Applications of counters

 Frequency counters
 Digital clocks
 Analog to digital converters
 Time measurement
 Frequency divider
 Triangular wave generator

41
Flip Flops

Flip flop is a bistable device used as memory element to store binary


data. It is also called as bitable multivibrator.

Types of flip flops

Flip flops are classified into following four types:

 R-S flip flop


 D flip flop
 T flip flop
 J-K flip flop

1.R-S Flip flop

The R-S flip-flop is the most basic of all flip-flops. The letters ‘R’ and ‘S’
stand for RESET and SET.

Logic symbol of R-S flip flop

Logic Circuit of R-S flip flop

42
Truth table of R-S flip flop

clk S R Q n+1 Operation mode

1 0 0 Qn No change
1 0 1 0 1 RESET
1 1 0 1 0 SET
1 1 1 X X INVALID

Working:

When clock signal is high, the input NAND gates are enabled and the
following operations occur:

Case 1: when S= 0, R=0, there is no change in the output. The flip flop
remains in the previous state.

Case 2: when S= 0, R=1, the output Qn+1 =0, =1. The flip flop is
said to be in Reset state

Case 3: when S= 1, R=0, the output Qn+1 =1, =0 . The flip flop is
said to be in Set state

Case 4: when S= 1, R=1, both the outputs are same. The flip flop is said
to be in Invalid state

43
D flip flop

D flip flop is known as Delay flip flop. When the clock is high, the data bit
(0 or 1) present at the D input is transferred to the output.

Logic symbol of D flip flop

Logic circuit of D flip flop

Truth table of D flip flop

clk D Q n+1 Operation mode

1 0 0 1 RESET
1 1 1 0 SET
Working:

When clock is high, the output Q n+1 will hold the value of D. i.e. if D=0,
Q n+1=0, flip flop is in reset state. If D=1, Q n+1=1, flip flop is in set state.

44
T flip flop
T flip flop is known as Toggle flip flop. The flip flop changes its state
every time it is triggered at its input.

Logic symbol of T flip flop

Logic circuit of T flip flop

Truth table of T flip flop

Working of T flip flop

45
If T= 0 (i.e., J = K = 0) prior to a clock pulse, the Qn+1 output will not
change with the clock pulse. It will hold the present state.

If the T input is in 1 state (i.e., J = K = 1) prior to a clock pulse, the Qn+1


output will change with the clock pulse. i.e. it toggles.

J-K flip flop

A JK flip flop is a modification of SR flip flop. In this the J input is similar


to the set input of SR flip flop and the K input is similar to the reset input
of SR flip flop.

Logic symbol

Logic circuit

46
Truth table

clk J K Q n+1 Operation mode

1 0 0 Qn No change
1 0 1 0 1 RESET
1 1 0 1 0 SET
1 1 1 - - Toggles
Working

When J and K are 0, no change in output. The flip flop remains in


previous state.

When J and K are 0 and 1, flip flop is in reset state.

When J and K are 1 and 0, flip flop is in set state.

When J and K are 1, the output toggles from the previous state. The flip
flop is in toggle state.

47

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