QUESTION BANK
(K-Scheme)
Program : Computer Engineering Group Program code : CM
Course Title: Digital Technique Semester : Third
Course Abbreviation & Code: DTE (313303) Scheme : K
CHAPTER 3: Combinational Logic Circuits (CO3)
2 marks :-
1. Define term Multiplexer and Demultiplexer.
2. Explain the terms Encoder and Decoder.
3. Draw diagram for 4:2 Priority Encoder.
4 marks :-
4. Difference between demultiplexer and Decoder.
5. Explain with example MUX tree.
6. List out Applications of Mux & Demux.
7. Implement 4:2 Mux using 2:1 Mux and OR gate.
CHAPTER 4: Sequential Logic Circuits (CO4)
2 marks :-
8.Draw symbol and write the truth table of JK flip flop.
9.Write excitation table of D flip flop.
10.Draw Block schematic of IC 7490.
11.Explain the triggering methods used for digital circuits.
12.Define modulus of a counter? Write down the number of flip flops required for
mod-5 counter?
4 marks:-
13.Describe the operation of 4- bit universal shift register with the help of block diagram.
14.Describe the working of Master-Slave JK Flip-Flop with Truth Table and Logic diagram.
15.Describe the procedure to design MOD-6 counter using IC 7490 in brief.
16.Describe the operation of 4 bit SISO shift register with the help of block diagram, truth
table and timing diagram.
17. Describe Race Around condition and how can it be eliminated.
18. Describe the operation of 3 bit synchronous up counter with Truth Table and Logic
Diagram.
19. Draw the Logic Diagram, Truth Table and waveforms of 3 bit twisted Ring counter.
20. Draw logic diagram and truth table of T Flip – Flop.
21. Compare between Combinational and Sequential Circuits
CHAPTER 5 Data Converters And PLDs (CO5)
2 marks:-
22. List any two specifications of IC- DAC 0808.
23. Give two applications of DAC and ADC each.
24. State any two applications of PLA’s.
25. Define Flash memory.
26. Compare Static RAM and Dynamic RAM.
4 marks:-
27. Draw the block diagram of Programmable Logic Array.
28. Describe the operation of CPLD with the help of block diagram.
29. Calculate analog output of 4 bit DAC for digital input is 1011. Assume VF S= 5V.
30. Describe the working principle of R – 2R ladder with neat diagram.
31. Describe the working principle of Successive approximation type ADC with the help
of block diagram.
