SIGNALS AND DSP

IPCC Course Code BEE 502 CIE Marks 50

Teaching Hours/Week (L:T:P: S) 3:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 12 Lab Total Marks 100
slots
Credits 04 Exam Hours 03
Course objectives:
1. To explain basic signals, their classification, basic operations on signals, sampling of analog
signals, and the properties of the systems.
2. To explain the convolution of signals in continuous and discrete time domain and the properties
of impulse response representation.
3. To explain the computation of Discrete Fourier Transform of a sequence by direct method, Linear
transformation Method and using Fast Fourier Transformation Algorithms.
4. To explain design of IIR all pole analog filters and transform them into digital filter using Impulse
Invariant and Bilinear transformation Techniques and to obtain their Realization.
5. To explain design of FIR filters using Window Method and Frequency Sampling Method and to
obtain their Realization.
Teaching-Learning Process (General Instructions)
These are sample Strategies; which teachers can use to accelerate the attainment of the various course
outcomes.
1. Lecturer method (L) needs not to be only traditional lecture method, but alternative effective
teachingmethods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical
thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design
thinkingskills such as the ability to design, evaluate, generalize, and analyse information rather than
simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve
the students' understanding.
MODULE-1
Signals, systems and signal processing, classification of signals, Basic Operations on Signals, Basic
Elementary Signals, properties of systems. concept of frequency in continuous and Discrete time
signals, sampling of analog signals, the sampling theorem , quantization of continuous amplitude
and sinusoidal signals , coding of quantized samples, digital to analog conversion,

Time-domain representations for LTI systems: Convolution, impulse response representation,

Convolution Sum and Convolution Integral, properties of impulse response representation, solution
of difference equations.
Teaching-Learning Chalk and Board, Power Point Presentation, You Tube Videos.
Process

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 MODULE-2
Discrete Fourier Transforms (DFT):
Introduction to DFT, definition of DFT and its inverse, matrix relation to find DFT and IDFT
,Properties of DFT, linearity, circular time shift, circular frequency shift, circular folding, symmetry
of : real valued sequences, real even and odd sequences, DFT of complex conjugate sequence,
multiplication of two DFTs- the circular convolution, Parseval’s theorem, circular correlation,
Digital linear filtering using DFT. Signal segmentation , overlap-save and overlap-add method.
Teaching-Learning Chalk and Board, Power Point Presentation, You Tube Videos.
Process
MODULE-3
Fast-Fourier-Transform (FFT) algorithms: Direct computation of DFT, need for efficient computation of the
DFT (FFT algorithms)., speed improvement factor, Radix-2 FFT algorithm for the computation of DFT and
IDFT–decimation-in-time and Decimation-in-frequency algorithms , calculation of DFT when N is not a power
of 2.
Teaching-Learning Chalk and Board, Power Point Presentation, You Tube Videos.
Process
MODULE-4
IIR filter design: Classification of analog filters, generation of Butterworth polynomials, frequency
transformations. Design of Butterworth filters, low pass, high pass, band pass and band stop filters,
Generation of Chebyshev polynomials, design of Chebyshev filters, design of Butterworth and
Chebyshev filters using bilinear transformation and Impulse invariance method, representation of IIR
filters using direct form one and two, series form and parallel form.
Teaching-Learning Chalk and Board, Power Point Presentation, You Tube Videos.
Process
MODULE 5

FIR filter design:

Introduction to FIR filters, symmetriv and antisymmetric FIR filters, design of linear phase FIR
filters using - Rectangular, Bartlett, Hamming, Hanning and Blackman windows, design of FIR
differentiators and Hilbert transformers, FIR filter design using frequency sampling Technique.
Representation of FIR filters using direct form and lattice structure.

Teaching-Learning Chalk and Board, Power Point Presentation, You Tube Videos.
Process

Sl. Experiments
NO
1 Verification of Sampling Theorem in time and frequency domains

2 Generation of different signals in both continuous and discrete time domains

3 To perform basic operations on given sequences- Signal folding, evaluation of even and odd
signals

4 Evaluation of impulse response of a system.

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 5. Solution of a difference equation.

6. Evaluation of linear convolution and circular convolution of given sequences

7 Computation of N- point DFT and IDFT of a given sequence by use of (a) Defining equation; (b)
FFT method

8 Evaluation of circular convolution of two sequences using DFT and IDFT approach.

9 Design and implementation of IIR filters to meet given specification (Low pass, high pass, band
pass and band reject filters).

10 Design and implementation of FIR filters to meet given specification (Low pass, high pass, band
pass and band reject filters) using different window functions.

11 Design and implementation of FIR filters to meet given specification (Low pass, high pass, band
pass and band reject filters) using frequency sampling technique.

12 Realization of IIR and FIR filters.

13 Following experiments to be done using DSP Kit:

a)Obtain the linear convolution of two sequences
b)Compare circular convolution of two sequences
c)To find N –point DFT of given sequence
d)To find impulse response of first and second order system
e)Generation of sine wave and standard test signals
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
(1)Discuss classification and basic operations that can be performed on both continuous and discrete
time signals and to understand sampling theorem.
(2)Evaluate Discrete Fourier Transform of a sequence , to understand the various properties of DFT and
signal segmentation using overlap and overlap add method.
(3)Evaluate Discrete Fourier Transform of a sequence using decimation in time and decimation in
frequency methods.
(4) To design Butterworth and Chebyshev IIR digital filters and to represent the filters using different
methods and to represent IIR filter using different methods.
(5)To design FIR filters using windows method and frequency sampling method and to represent FIR
filters using direct method and lattice method.

Text Books/Reference Books:

1.Introduction to Digital Signal Processing, Jhonny R. Jhonson, Pearson 1 st Edition, 2016.

2.Digital Signal Processing – Principles, Algorithms, and Applications,Jhon G. Proakis Dimitris G.
Manolakis, Pearson, 4 th Edition, 2007.
3. Digital Signal Processing, A.NagoorKani, McGraw Hill, 2nd Edition, 2012.
4. Digital Signal Processing, Shaila D. Apte,Wiley, 2nd Edition, 2009.

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 5. Digital Signal Processing, Ashok Amberdar, Cengage, 1st Edition, 2007.
6. Digital Signal Processing, Tarun Kumar Rawat, Oxford, 1st Edition, 2015.

Web links and Video Lectures (e-Resources):

1. http://www.freebookcentre.net/Electronics/DSP-Books
2. https://www.electronicsforu.com/special/cool-stuff-misc/8-free-digital-signal-processing-ebooks

MOOCs
1. https://nptel.ac.in/courses/117102060

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and
for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of the
CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.

CIE for the theory component of the IPCC (maximum marks 50)
 IPCC means practical portion integrated with the theory of the course.
 CIE marks for the theory component are 25 marks and that for the practical component is 25 marks.
 25 marks for the theory component are split into 15 marks for two Internal Assessment Tests (Two
Tests, each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for other
assessment methods mentioned in 22OB4.2. The first test at the end of 40-50% coverage of the
syllabus and the second test after covering 85-90% of the syllabus.
 Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for the
theory component of IPCC (that is for 25 marks).
 The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of the IPCC
 15 marks for the conduction of the experiment and preparation of laboratory record, and 10 marks
for the test to be conducted after the completion of all the laboratory sessions.
 On completion of every experiment/program in the laboratory, the students shall be evaluated
including viva-voce and marks shall be awarded on the same day.
 The CIE marks awarded in the case of the Practical component shall be based on the continuous
evaluation of the laboratory report. Each experiment report can be evaluated for 10 marks. Marks of
all experiments’ write-ups are added and scaled down to 15 marks.
 The laboratory test (duration 02/03 hours) after completion of all the experiments shall be conducted
for 50 marks and scaled down to 10 marks.
 Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory
component of IPCC for 25 marks.
 The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the
IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question

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 papers for the course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will have
a CIE component only. Questions mentioned in the SEE paper may include questions from the
practical component.

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 Annexure-II 1

Power Electronics Semester V

Course Code BEE503 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 4:0:0:0 SEE Marks 50
Total Hours of Pedagogy 50 Total Marks 100
Credits 04 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
(1) To give an overview of applications power electronics, different types of power semiconductor devices,
their switching characteristics.
(2) To explain power diode characteristics, types, their operation and the effects of power diodes on RL
circuits.
(3)To explain the techniques for design and analysis of single phase diode rectifier circuits.
(4) To explain different power transistors, their steady state and switching characteristics and imitations.
(5) To explain different types of Thyristors, their gate characteristics and gate control requirements.
(6)To explain the design, analysis techniques, performance parameters and characteristics of controlled
rectifiers, DC- DC, DC -AC converters and Voltage controllers.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1 Lecturer method (L) needs not to be only traditional lecture method, but alternative effective teaching
methods could be adopted to attain the outcomes.
2 Lectures with discussions, question and answer sessions.
3 Informal quizzes.
4 Use of Video/Animation to explain functioning of various concepts.
5 Encourage collaborative (Group Learning) Learning in the class.
6 Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical thinking.
7 Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design thinking
skills such as the ability to design, evaluate, generalize, and analyse information rather than simply recall
it.
8 Introduce Topics in manifold representations.
9 Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
10 Discuss how every concept can be applied to the real world - and when that's possible, it helps improve the
students' understanding.
Module-1
Introduction: Applications of Power Electronics, Ideal Characteristics of switches Characteristics of practical
devices; Specifications of Switches, control characteristics of power devices, Types of Power Electronic
Circuits, Peripheral Effects, Intelligent Modules.
Power Diodes: Introduction, Diode Characteristics, Reverse Recovery Characteristics, Power Diode Types,
Silicon Carbide Diodes, Silicon Carbide Schottky Diodes, Freewheeling diodes, Freewheeling diodes with RL
load.
Diode Rectifiers: Introduction, Diode Circuits with DC Source connected to R and RL load, Single-Phase Full-
Wave Rectifiers with R load, Single-Phase Full-Wave Rectifier with RL Load.
Module-2
Power Transistors: Introduction, Bipolar Junction Transistors – Steady State Characteristics, Switching
Characteristics, Switching Limits, Power MOSFETs – Steady State Characteristics, Switching Characteristics,
IGBTs; BJT Base Drive, MOSFET Gate Drive, Isolation of Gate and Base Drives, Pulse transformers and Opto-
couplers.
Module-3
Thyristors: Introduction, Thyristor Characteristics, Two-Transistor Model of Thyristor, Thyristor Turn- On,
Thyristor Turn-Off, A brief study on Thyristor Types, Series Operation of Thyristors, Parallel Operation of
Thyristors, di/dt Protection, dv/dt Protection, Thyristor Firing Circuits, Unijunction Transistor.
Module-4

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 Annexure-II 2

Controlled Rectifiers: Introduction, Single phase half wave circuit with RL Load, Single phase half wave
circuit with RL Load and Freewheeling Diode, Single phase half wave circuit with RLE Load, Single-Phase
Full Converters with RLE Load, Single-Phase Dual Converters, Principle of operation of Three- Phase duel
Converters.
AC Voltage Controllers: Introduction, Principle of phase control & Integral cycle control, Single-Phase Full-
Wave Controllers with Resistive Loads, Single- Phase Full-Wave Controllers with Inductive Loads, Three-
Phase Full-Wave Controllers.
Module-5
DC-DC Converters: Introduction, principle of step down chooper with R and RL load; principle of step up
chopper with R load, Control strategies, performance parameters, DC-DC converter classification.
DC-AC Converters: Introduction, principle of operation single phase bridge inverters, performance
parameters, three phase bridge inverters, voltage control of single phase inverters, Harmonic reductions,
Current source inverters.
Course outcome (Course Skill Set)
At the end of the course the student will be able to :
1 To give an overview of applications power electronics, different types of power semiconductor devices,
their switching characteristics, power diode characteristics, types, their operation and the effects of
power diodes on RL circuits.
2 To explain the techniques for design and analysis of single phase diode rectifier circuits.
3 To explain different power transistors, their steady state and switching characteristics and limitations.
4 To explain different types of Thyristors, their gate characteristics and gate control requirements.
5 To explain the design, analysis techniques, performance parameters and characteristics of controlled
rectifiers, DC- DC, DC -AC converters and Voltage controllers.

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 Annexure-II 3

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by the University as per the scheduled timetable, with common question papers
for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.

Suggested Learning Resources:

Books
Textbook
1 Power Electronics: Circuits Devices and Applications, Mohammad H Rashid, Pearson 4th Edition, 2014.
Reference Books
1 Power Electronics, P.S. Bimbhra, Khanna Publishers, 5th Edition, 2012.
2 Power Electronics: Converters, Applications and Design, Ned Mohan et al, Wiley 3rd Edition, 2014.
3 Power Electronics, Daniel W Hart, McGraw Hill, 1st Edition, 2011.
4 Elements of Power Electronics, Philip T Krein, Oxford, Indian Edition, 2008.
Web links and Video Lectures (e-Resources):
 .

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 Annexure-II 4

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



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 Template for Practical Course and if AEC is a practical Course Annexure-V

Power Electronics Laboratory Semester V

Course Code BEEL504 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Total Marks 100
Examination type (SEE) Practical Exam Hours 02
Course objectives:
1) To conduct experiments on semiconductor devices to obtain their static characteristics. To study different
methods of triggering the SCR
2) To study the performance of single phase controlled full wave rectifier and AC voltage controller with R and
RL loads.
3) To control the speed of a DC motor, universal motor and stepper motors.
4) To study single phase full bridge inverter connected to resistive load.
Sl.NO Experiments

1 Static Characteristics of SCR.

2 Static Characteristics of MOSFET and IGBT.

3 Characteristic of TRIAC.

4 SCR turn on circuit using synchronized UJT relaxation oscillator.

5 SCR digital triggering circuit for a single phase controlled rectifier and ac voltage regulator.

Single phase controlled full wave rectifier with R load, R –L load, R-L-E load with and without freewheeling
6
diode.

7 AC voltage controller using TRIAC and DIAC combination connected to R and RL loads.

8 Speed control of DC motor using single semi converter.

9 Speed control of stepper motor.

10 Speed control of universal motor using ac voltage regulator.

11 Speed control of a separately excited D.C. Motor using an IGBT or MOSFET chopper.

12 Single phase MOSFET/IGBT based PWM inverter.

Course outcomes (Course Skill Set):

At the end of the course the student will be able to:
1 Obtain static characteristics of semiconductor devices to discuss their performance.
2 Trigger the SCR by different methods
3 Verify the performance of single phase controlled full wave rectifier and AC voltage controller with R and
RL loads.
4 Control the speed of a DC motor, universal motor and stepper motors.
5 Verify the performance of single phase full bridge inverter connected to resistive load.

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 Template for Practical Course and if AEC is a practical Course Annexure-V

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%. The
minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the SEE minimum
passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be deemed to have satisfied the
academic requirements and earned the credits allotted to each subject/ course if the student secures a minimum of
40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.
Continuous Internal Evaluation (CIE):
CIE marks for the practical course are 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment is to be evaluated for conduction with an observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments are designed by the faculty who is
handling the laboratory session and are made known to students at the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
 Total marks scored by the students are scaled down to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct a test of 100 marks after the completion of all the experiments listed in the
syllabus.
 In a test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will carry a
weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
 The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the total CIE marks
scored by the student.

Semester End Evaluation (SEE):

 SEE marks for the practical course are 50 Marks.
 SEE shall be conducted by the two examiners. One from the same institute as an internal examiner
and another from a different institute as an external examiner, appointed by the university.
 The examination schedule and names of examiners are informed to the university before the conduction of
the examination. These practical examinations are to be conducted between the schedule mentioned in the
academic calendar of the University.
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointly by examiners.
 Students can pick one question (experiment) from the questions lot prepared by the examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
 General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result in -60%,
Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and scored marks shall
be scaled down to 50 marks (however, based on course type, rubrics shall be decided by the examiners)
 Change of experiment is allowed only once and 15% of Marks allotted to the procedure part are to be made
zero.
The minimum duration of SEE is 02 hours

Suggested Learning Resources:

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 Annexure-II 1

High Voltage Engineering Semester V

Course Code BEE515A CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:

1. To understand the conduction and breakdown mechanism in gases, liquid and solid dielectrics.
2. To know about the generation of high voltages and currents and their measurement.
3. To understand the various types of over voltages phenomena and protection methods.
4. To discuss non-destructive testing of materials and electric apparatus.
5. To discuss high-voltage testing of electrical equipment

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teachers can use to accelerate the attainment of the various
course outcomes.
1. Lecturer method (L) needs not to be only traditional lecture method, but alternative
effective teaching methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes
critical thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop
design thinking skills such as the ability to design, evaluate, generalize, and analyze
information rather than simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and
encourage the students to come up with their own creative ways to solve them.
Discuss how every concept can be applied to the real world-and when that's possible, it helps
improve the students' understanding..
Module-1
Introduction: Electric field stress, gas, liquid, solid and composite dielectrics.
Conduction and Breakdown in Gases: Gases as Insulating Media, Collision Process – types
of collision, Mobility of ions and electrons. Ionization Processes- Ionization by collision.
Townsend's Current Growth Equation--Current Growth in the Presence of primary and
Secondary Processes, Townsend's Criterion for Breakdown, Breakdown in Electronegative
Gases, Time Lags for Breakdown, Paschen's Law, Corona Discharges.
Conduction and Breakdown in Liquid Dielectrics: purification of liquid dielectrics,
Breakdown in Liquid dielectrics. - Suspended particle, bubble and stressed oil volume
mechanism.
Conduction and Breakdown in Solid Dielectrics: Intrinsic Breakdown, Electromechanical
Breakdown, Thermal Breakdown.
Module-2

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 Annexure-II 2

Generation of High Direct Current Voltages: Voltage Doubler circuit, Voltage multiplier
circuit- Cockcroft Walton circuit, Ripple and voltage drop in multiplier circuit. Vandegraaff
generator.
Generation of High Alternating Voltages: Cascade transformers, Resonant transformers,
Tesla coil.
Generation of Impulse Voltages and currents: Standard impulse wave, Circuit for producing
impulse waves- Analysis of impulse generator RLC circuit, Wave shape control, Marx circuit ,
Generation of impulse current: standard impulse current wave ,Circuit for producing impulse
current wave.
Module-3
Measurement of High DC Voltages and Currents: Measurement of High DC Voltages –
Series Resistance micro ammeter, Resistance potential divider, Generating voltmeter.
Measurement of High AC voltages- Series impedance voltmeter, Series capacitance voltmeter,
Capacitance potential dividers, Capacitance voltage transformers. Electrostatic voltmeter, series
capacitance peak voltmeter (chubb-Fortscue method), Spark gaps for measurement of High dc,
ac and Impulse voltages - Spark gap measurements, Factors influencing the spark over voltage of
sphere gaps.
Measurement of Impulse Voltages – Resistance potential dividers, capacitance voltage
dividers, Mixed R-C potential dividers Peak reading voltmeters for impulse voltages.
Measurement of High DC, AC and impulse Currents - Hall generator, Resistive shunt,
Rogowski coils and Magnetic links.

Module-4
Natural Causes for Over voltages
Lightning phenomenon –Charge formation in the clouds, Mechanism of lightning strokes,
Mathematical model for lighting, Over voltages due to indirect stroke.
Power frequency Overvoltage – Sudden load rejection, Ferranti effect. Control of over voltages
due to switching.
Protection of transmission lines against over voltages- Using shielded or ground wires,
Ground rods and counter poise wires, Surge arresters -Protector tubes, Nonlinear element surge
arrestor.

Module-5
Non-Destructive Testing of Materials and Electrical Apparatus
Power frequency measurements- Schering bridge for audio frequency, transformer ratio arm
bridge. Partial discharge measurements- straight discharge detection, Balance detection.
High Voltage Testing of Electrical Apparatus-Testing of insulators, bushings, circuit breakers,
cables. Testing of transformers- Impulse test, Tests on surge arrestors.

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 Annexure-II 3

Course outcome (Course Skill Set)

At the end of the course the student will be able to:
1. Have detailed knowledge of conduction and breakdown phenomenon in gases, liquids
and solid dielectrics.
2. Ability to design and simulate the generation of high voltages and currents
3. Ability to design and analyze the measurement techniques for high voltages and currents
4. Summarize overvoltage phenomenon and protection of electric power systems.
5. Explain non-destructive testing of materials and high-voltage testing of electric apparatus

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module(total for 100
marks).
4. Marks scored shall be proportionally reduced to 50 marks.

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 Annexure-II 4

Textbook:

1. High Voltage Engineering M.S. Naidu, V.Kamaraju McGraw Hill 5th Edition, 2013.

2. High Voltage Engineering Wadhwa C.L. New Age International 3rd Edition, 2012

Reference Books:

1. High Voltage Engineering Fundamentals E. Kuffel, W.S. Zaengl, J. Kuffel Newnes

2nd Edition, 2000

2. High-Voltage Test and Measuring Techniques Wolfgang Hauschild • Eberhard

Lemke Springer 1st Edition2014

3. High Voltage Engineering Farouk A.M. Rizk CRC Press 1st Edition2014

Web links and Video Lectures (e-Resources):

www.nptel.ac.in
Link of Journals, Magazines, websites and Research Papers
http://digital-library.theiet.org/content/journals/hve 2
https://archive.nptel.ac.in/courses/108/104/108104048
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
Quizzes, Seminars,
Visit transformer manufacturing industry,
Testing laboratories - CPRI.

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 Annexure-II 1

Power Electronics for Renewable Energy Systems Semester V

Course Code BEE515B CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
 To appreciate the advantages of renewable energy sources over conventional energy
sources
 To study solar PV systems – stand alone and grid connected - and their maximum power
tracking methods
 To study wind energy systems and the electrical machines (DFIG) used in WES
 To study MPPT methods and in WES.
 To study other renewable energy sources- biomass, fuel cells and ocean energy
 To study power electronics converters for PV and WES

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1. Chalk and board
2. PPT
Module-1
Classification of Energy Sources – Importance of Non-conventional energy sources , Advantages
and disadvantages of conventional energy sources, Impacts of renewable energy generation on
the environment
Module-2
Solar PV Systems: Solar PV characteristics, Grid requirement for PV, Power electronic
converters used for solar PV, Control techniques, MPPT, Grid connected and Islanding mode,
Grid synchronization, PLLs, battery charging in PV systems.

Module-3
Wind Energy Conversion: Wind Turbine characteristics, Grid requirement for Wind, PMSM
and DFIG for wind generators, Power electronic converters for PMSM and DFIG, Control
techniques, MPPT, Grid connected and Islanding mode.
Module-4
Qualitative study of other renewable energy resources: Ocean energy, Biomass energy, Hydrogen
energy, Fuel cells: Operating principles and characteristics

Module-5
Converters for PV systems- front end buck boost, boost converters, bridge in verters for feeding the grid,
Stand-alone PV systems, Grid integrated solar PV Systems – Grid Connection Issues, line side and
machine side converters for wind energy systems.

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 Annexure-II 2

Course outcome (Course Skill Set)

At the end of the course, the student will be able to :

1. Describe WES and PV systems

2. Develop MPPT algorithms for PV systems and WES.
3. Design converters for PVS and SES
4. Describe biomass, fuel cells and oceanic energy sources

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions of 20 marks, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.

Suggested Learning Resources:

Books
1. Fang Lin Luo, Hong Ye, “Advanced DC/AC Inverters: Applications in Renewable Energy”
CRC Press.
2. Sudipta Chakraborty, Marcelo G. Simões, William E. Kramer, “Power Electronics for

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 Annexure-II 3

Renewable and Distributed Energy Systems” Springer 2013.

Web links and Video Lectures (e-Resources):

 www.nptel.ac.in
 https://www.youtube.com/watch?v=FvOAZC8Urcs

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



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 Annexure-II 1

ELECTRIC VEHIVLE FUNDAMENTALS Semester V

Course Code BEE515C CIE Marks 50
Teaching Hours/Week (L:T:P: S) 2:2:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
 To understand the concept of electric vehicles.
 To study about the motors & drives for electric vehicles.
 To understand the electronics and sensors in electric vehicles.
 To understand the concept of hybrid vehicles.
 To study about fuel cell for electric vehicles.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1. .

Module-1
Introduction to Electric Vehicles : Electric Vehicle – Need - Types – Cost and Emissions –
End of life. Electric Vehicle Technology – layouts, cables, components, Controls. Batteries –
overview and its types. Battery plug-in and life. Ultra-capacitor, Charging – Methods and
Standards. Alternate charging sources – Wireless & Solar.
Module-2
Electric Vehicle Motors: Motors (DC, Induction, BLDC) – Types, Principle, Construction,
Control. Electric Drive Trains (EDT) – Series HEDT (Electrical Coupling) – Power Rating
Design, Peak Power Source (PPS); Parallel HEDT (Mechanical Coupling) – Torque Coupling
and Speed Coupling. Switched Reluctance Motors (SRM) Drives – Basic structure, Drive
Convertor, Design.
Module-3
Electronics and Sensor-less control in EV: Basic Electronics Devices – Diodes, Thyristors,
BJTs, MOSFETs, IGBTs, Convertors, Inverters. Safety – Risks and Guidance, Precautions,
High Voltage safety, Hazard management. Sensors - Autonomous EV cars, Selfdrive Cars,
Hacking; Sensor less – Control methods- Phase Flux Linkage-Based Method, Phase Inductance
Based, Modulated Signal Injection, Mutually Induced Voltage-Based, Observer-Based.
Module-4
Hybrid Vehicles: Hybrid Electric vehicles – Classification – Micro, Mild, Full, Plug-in, EV.
Layout and Architecture – Series, Parallel and Series-Parallel Hybrid, Propulsion systems and
components. Regenerative Braking, Economy, Vibration and Noise reduction. Hybrid Electric
Vehicles System – Analysis and its Types, Controls.
Module-5
Fuel Cells for Electric vehicles: Fuel cell – Introduction, Technologies & Types, Obstacles.
Operation principles, Potential and I-V curve, Fuel and Oxidation Consumption, Fuel cell
Characteristics – Efficiency, Durability, Specific power, Factors affecting, Power design of fuel
Cell Vehicle and freeze capacity. Lifetime cost of Fuel cell Vehicle – System, Components,
maintenance.

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 Annexure-II 2

Course outcome (Course Skill Set)

At the end of the course, the student will be able to :
1. Describe about working principle of electric vehicles.
2. Explain the construction and working principle of various motors used in electric vehicles.
3. Understand about working principle of electronics and sensor less control in electric vehicles.
4. Describe the different types and working principle of hybrid vehicles.
5. Illustrate the various types and working principle of fuel cells.

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions totaling to 100 marks, selecting one full question from each
module.
4. Marks scored shall be proportionally reduced to 50 marks.
Suggested Learning Resources:
Books
1. Jack Erjavec and Jeff Arias, “Hybrid, Electric and Fuel Cell Vehicles”, Cengage Learning, 2012.
2. Mehrdad Ehsani, Yimin Gao, sebastien E. Gay and Ali Emadi, “Modern Electric, Hybrid Electric
and Fuel Cell Vehicles: Fundamentals, Theory and Design”, CRC Press, 2009.

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 Annexure-II 3

Web links and Video Lectures (e-Resources):

 https://archive.nptel.ac.in/courses/108/106/108106170/

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



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 FUNDAMENTALS OF VLSI DESIGN Semester 5
Course Code BEE515D CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE)
Course objectives:
Impart knowledge of mass transistors theory and CMOS technology.
Understand the basic electrical properties of mass and BICMOS circuits.
Cultivate the concept of subsystem design and layout processes .
Understand the concept of design process computational elements.

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teachers can use to accelerate the attainment of the various course outcomes.
. These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
Lecturer method (L) does not mean only the traditional lecturer method, but a different type of teaching
method may be adopted to develop the outcomes.
Show video/ animation films to explain the functioning of various techniques.
Encourage group learning in the class.
Adopt problem based learning, which improves student analytical skills, develop thinking skills such as
the ability to evaluate, generalize, and analyze information rather than simply recall it.
Show the different ways to solve the same problem and encourage the students to come up with their
1. creative ways to solve them.

Module-1
Moore’s law, speed power performance, nMOS fabrication, CMOS fabrication: n-well, p-well processes,
BiCMOS, Comparison of bipolar and CMOS.
Basic Electrical Properties of MOS And BiCMOS Circuits: Drain to source current versus voltage
characteristics, threshold voltage, transconductance.

Module-2
Basic Electrical Properties of MOS And BiCMOS Circuits: nMOS inverter, Determination of pull up to pull
down ratio, nMOS inverter driven through one or more pass transistors, alternative forms of pull up, CMOS
inverter, BiCMOS inverters, latch up.
Basic Circuit Concepts: Sheet resistance, area capacitance calculation, Delay unit, inverter delay, estimation
of CMOS inverter delay, driving of large capacitance loads, super buffers, BiCMOS drivers.

Module-3
MOS and BiCMOS Circuit Design Processes: MOS layers, stick diagrams, nMOS design style, CMOS design
style, design rules and layout, λ - based design.
Scaling of MOS Circuits: scaling factors for device parameters, limitations of scaling.

Module-4

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 Subsystem Design and Layout-1 : Switch logic pass transistor, Gate logic inverter, NAND gates, NOR gates,
pseudo nMOS, Dynamic CMOS, example of structured design, Parity generator, Bus arbitration, multiplexers,
logic function block, code converter.
Subsystem Design and Layout-2 : Clocked sequential circuits, dynamic shift registers, bus lines, subsystem
design processes, General considerations, 4-bit arithmetic processes, 4-bit shifter.

Module-5
Design Process-Computational Elements: Regularity, design of ALU subsystem, ALU using adders, carry
look ahead adders, Multipliers, serial parallel multipliers, Braun array, Bough – Wooley multiplier.
Memory, Register and Aspects of Timing: Three Transistor Dynamic RAM cell, Dynamic memory cell,
Pseudo- Static RAM, JK Flipflop, D Flip-flop circuits, RAM arrays, practical aspects and testability: Some
thoughts of performance, optimization and CAD tools for design and simulation

Course outcome (Course Skill Set)

At the end of the course, the student will be able to :
1. Identify the CMOS layout levels, and the design layers used in the process sequence.
2. Describe the general steps required for processing of CMOS integrated circuits.
3. Design static CMOS combinational and sequential logic at the transistor level.
4. Demonstrate different logic styles such as complementary CMOS logic, pass-transistor Logic, dynamic logic,
etc.
5. Interpret the need for testability and testing methods in VLSI

@#05052024
 Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A
student shall be deemed to have satisfied the academic requirements and earned the credits allotted
to each subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum
total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.

Continuous Internal Evaluation:

 For the Assignment component of the CIE, there are 25 marks and for the Internal Assessment
Test component, there are 25 marks.
 The first test will be administered after 40-50% of the syllabus has been covered, and the
second test will be administered after 85-90% of the syllabus has been covered
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned.
 For the course, CIE marks will be based on a scaled-down sum of two tests and other methods of
assessment.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer for 100 marks ( 5 full questions), selecting one full question from each
module.
4. Marks
Suggested scoredResources:
Learning shall be proportionally reduced to 50 marks.
Books
1. Basic VLSI Design -3rd Edition, Douglas A Pucknell, Kamaran Eshraghian, Prentice Hall of India
publication, 2005.
2. CMOS Digital Integrated Circuits, Analysis And Design, 3rd Edition, Sung – Mo (Steve) Kang, Yusuf
Leblbici, Tata McGraw Hill, 2002.
3. VLSI Technology - S.M. Sze, 2nd edition Tata McGraw Hill, 2003.

Web links and Video Lectures (e-Resources):

@#05052024
 . .VTU e-shikshana programme

VTU Edu-sat programmes

https://nptel.ac.in/courses/117101058

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

 Quizzes
 Assignment
 Seminars

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 TEMPLATE for IPCC (26.04.2022) Annexure-III

POWER SYSTEM ANALYSIS I Semester VI

Course Code BEE601 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 8-10 Lab slots Total Marks 100
Credits 04 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:

 To introduce the per unit system and explain its advantages and computation.
 To explain the concept of one line diagram and its implementation in problems.
 To explain the necessity and conduction of short circuit analysis.
 To explain analysis of three phase symmetrical faults on synchronous machine and simple
power systems.
 To discuss selection of circuit breaker.
 To explain symmetrical components, their advantages and the calculation of symmetrical
components of voltages and currents in un-balanced three phase circuits.
 To explain the concept of sequence impedance and its analysis in three phase unbalanced
circuits.
 To explain the concept of sequence networks and sequence impedances of an unloaded
synchronous generator, transformers and transmission lines.
 To explain the analysis of synchronous machine and simple power systems for different
unsymmetrical faults using symmetrical components.
 To discuss the dynamics of synchronous machine and derive the power angle equation for a
synchronous machine.
 Discuss stability and types of stability for a power system and the equal area criterion for the
evaluation of stability of a simple system.

Teaching-Learning Process (General Instructions)

These are sample Strategies; that teachers can use to accelerate the attainment of the various course outcomes.
1. Lecture method (L) need not to be only traditional lecture method, but alternative
effectiveteaching methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain function for various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical
thinking.
5. Adopt Problem Based Learning (PBL), whichfoster students ‘Analytical skills, develop design
thinking skill such as the ability to design, evaluate, generalize, and analyse information rather
than simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and encourage
the students to come up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world-and when that's possible, it will
improvethe students understanding.
MODULE-1
Representationof Power System Components: Introduction, Single-phase Representation of
BalancedThree Phase Networks, One-Line Diagram and Impedance or Reactance Diagram, Per
Unit (PU)System, Steady State Model of Synchronous Machine, Power Transformer, Transmission
of Electrical Power, Representation of Loads.
MODULE-2

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 TEMPLATE for IPCC (26.04.2022) Annexure-III

Symmetrical Fault Analysis: Introduction,Transient on transmissionLine, Short Circuit of a

SynchronousMachine (On No Load), ShortCircuit of a Loaded Synchronous Machine, Illustrative
simple examples on power systems. Selection of Circuit Breakers.
MODULE-3
Symmetrical Components: Introduction, Symmetrical Component Transformation, Phase Shift in
Star-DeltaTransformers, Sequence Impedances of Transmission Lines, Sequence Impedances and
Sequence Network of Power System, Sequence Impedances and Networks of Synchronous
Machine, Sequence Impedances of Transmission Lines, Sequence Impedances and Networks of
Transformers, Construction of Sequence Networks of a Power System.
MODULE-4
Unsymmetrical Fault Analysis: Introduction, Symmetrical Component Analysis of
Unsymmetrical Faults,Single Line-To-Ground(LG)Fault, Line-To-Line(LL)Fault, Double Line-To-
Ground(LLG)Fault, OpenConductor Faults.
MODULE-5
Power System Stability: Introduction, Dynamics of a Synchronous Machine, Review of
PowerAngle Equation, Simple Systems, Steady State Stability, Transient Stability, Equal Area
Criterion.

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 TEMPLATE for IPCC (26.04.2022) Annexure-III

PRACTICAL COMPONENT OF IPCC

Sl.NO Experiments
1 Write a program to drawpower angle curves for salient and non-salient pole synchronous
machines, reluctance power, excitation, EMF and regulation.
2
Write a program to calculate Sag of a transmission line for
i)Poles at equal height ii)Poles at unequal height
3 Write a program to determinethe efficiency, Regulation, ABCD parameters for short and long
transmission line and verify AD-BC=1.
4 Write a program to determinethe efficiency, Regulation and ABCD parameters for medium
transmission line for i) П- configuration ii) T- Configuration and verify AD-BC=1.
5 Write a program to calculate sequence components of line voltages given the unbalanced
phase voltages.
6 Write a program to calculate the sequence components of line currents, given the unbalanced
phase currents in a three phase i) 3-wire system ii) 4 wire system.
7 Determination of fault currents and voltages in a single transmission line for
i) Single Line to Ground Fault. ii)Line to Line Fault
iii) Double Line to Ground Fault Using suitable simulating software package.
8 Determination of fault currents and voltages in a single transmission line for Three phase Fault
Using suitable simulating software package.
9 Write a program to obtain critical disruptive voltage for various atmospheric and conductor
conditions.
10 Write a program to evaluate transient stability of single machine connected to infinite bus
using equal area criterion.
Course outcomes (Course Skill Set):
At the end of the course, the student will be able to:
 Model the power system components &construct per unit impedance diagram of power
system.
 Analyse three phase symmetrical faults on power system.
 Compute unbalanced phasors in terms of sequence components and vice versa, also develop sequence
networks.
 Analyse various unsymmetrical faults on power system.
 Examine dynamics of synchronous machine and determine the power system stability..
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%. The
minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the SEE minimum
passing mark is 35% of the maximum marks (18 out of 50 marks). The student is declared as a pass in the course if
he/she secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal
Evaluation) and SEE (Semester End Examination) taken together.
The IPCC means the practical portion integrated with the theory of the course. CIE marks for the theory component
are 25 marks and that for the practical component is 25 marks.
CIE for the theory component of the IPCC
 25 marks for the theory component are split into 15 marks for two Internal Assessment Tests (Two Tests,
each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for other assessment methods
mentioned in 22OB4.2. The first test at the end of 40-50% coverage of the syllabus and the second test after
covering 85-90% of the syllabus.

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 TEMPLATE for IPCC (26.04.2022) Annexure-III

 Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for the theory
component of IPCC (that is for 25 marks).
 The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of the IPCC

 15 marks for the conduction of the experiment and preparation of laboratory record, and 10 marks for the
test to be conducted after the completion of all the laboratory sessions.
 On completion of every experiment/program in the laboratory, the students shall be evaluated including viva-
voce and marks shall be awarded on the same day.
 The CIE marks awarded in the case of the Practical component shall be based on the continuous evaluation of
the laboratory report. Each experiment report can be evaluated for 10 marks. Marks of all experiments’ write-
ups are added and scaled down to 15 marks.
 The laboratory test (duration 02/03 hours) after completion of all the experiments shall be conducted for 50
marks and scaled down to 10 marks.
 Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory component of
IPCC for 25 marks.
 The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for the
course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum of 3
sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will have a CIE
component only. Questions mentioned in the SEE paper may include questions from the practical
component.
 The minimum marks to be secured in CIE to appear for SEE shall be 10 (40% of maximum marks-25) in the
theory component and 10 (40% of maximum marks -25) in the practical component. The laboratory
component of the IPCC shall be for CIE only. However, in SEE, the questions from the laboratory
component shall be included. The maximum of 04/05 sub-questions are to be set from the practical
component of IPCC, the total marks of all questions should not be more than 20 marks.
 SEE will be conducted for 100 marks and students shall secure 35% of the maximum marks to qualify for
the SEE. Marks secured will be scaled down to 50.

 The student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of 100)
in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.

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 TEMPLATE for IPCC (26.04.2022) Annexure-III

Suggested Learning Resources:

Textbook
1. Modern Power System, D. P. Kothari, McGraw Hill, 4th Edition, 2011.

Reference Books
1. Elements of Power System, William D. Stevenson Jr, McGraw Hill, 4th Edition, 1982.
2. Power System Analysis and Design, J. Duncan Gloveretal, Cengage, 4th Edition, 2008.
3. Power System Analysis, Hadi Sadat, McGraw Hill,1stEdition,2002.
Web links and Video Lectures (e-Resources):
https://nptel.ac.in/courses/108104051
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
Activity Based Learning, Quizzes, Seminars.

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 74

CONTROLSYSTEMS (PCC)
Subject Code BEE602 IA Marks 50
Number of Lecture Hours/Week 04 Exam Hours 03
Total Number of Lecture Hours 50 ExamMarks 50
Credits 04 Exam Hours 03
Course objectives:
(1)To analyze and model electrical and mechanical system using analogous systems.
(2) To formulate transfer functions using block diagram and signal flow graphs.
(3) To analyze the transient and steady state time response.
(4) To illustrate the performance of a given system in time and frequency domains, stability analysis using Root
locus and Bode plots.
(5) To discuss stability analysis using Nyquist plots, Design controller and compensator for a given specification.

Module-1 Teaching
Hours
Introduction to control systems: Introduction, classification of control systems. 10
Mathematical models of physical systems: Modeling of mechanical system elements, electrical
systems, Analogous systems, Transfer function, Single input single output systems, Procedure for
Deriving transfer functions, servomotors, synchros, gear trains.
RevisedBloom’s L1–Remembering,L2–Understanding,L3–Applying,L4–Analysing.
TaxonomyLevel
Module-2
Block diagram: Elements of Block Diagram, Block diagram of a closed loop system, Block diagram 10
reduction techniques, procedure for drawing block diagram and block diagram reduction to find
transfer function. Numerical.
Signal flow graphs: Construction of signal flow graphs, definition of some important terms, basic
properties of signal flow graph, Mason’s gain formula, signal flow graph algebra, construction of
signal flow graph for control systems. Numerical
RevisedBloom’s L1–Remembering,L2–Understanding,L3–Applying,L4–Analysing.
TaxonomyLevel
Module-3
Time Domain Analysis: Introduction, Standard test signals, time response of first order systems, 10
time response of second order systems, types of control systems, steady state errors and error
constants, Approximation of higher order systems and step response of second order systems with
zero’s.
Routh Stability criterion: BIBO stability, Necessary conditions for stability, Routh stability
criterion, difficulties in formulation of Routh table, application of Routh stability criterion to linear
feedback systems, relative stability analysis. Numerical
RevisedBloom’s L2–Understanding,L3–Applying,L4–Analysing,L5–Evaluating.
TaxonomyLevel
Module-4
Root locus : Introduction, root locus concepts, construction of root loci, rules for the construction of 10
root locus. Numerical
Frequency domain analysis: Introduction, Co-relation between time and frequencyresponse–
2ndorder systems only.
Bode plots: Basic factors G(iw)/H(jw), General procedure for constructing Bode plots, computation
of gain margin and phase margin. Numerical
RevisedBloom’s L1–Remembering,L2–Understanding,L3–Applying,L4–Analysing.
TaxonomyLevel
Module-5 Teaching
Hours
Nyquistplot: Introduction, Principle of argument, Nyquist stability criterion, assessment of relative 10
stability using Nyquist criterion.
Design of Control Systems: Introduction, Design with the PD Controller, Design with the PI
Controller, Design with the PID Controller, Design with Phase-Lead Controller ,Design with Phase
-Lag Controller, Design with Lead-Lag Controller.∎
RevisedBloom’s L1–Remembering,L2–Understanding,L3–Applying,L4–Analysing.
TaxonomyLevel

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Course out comes:

At the end of the course the student will be able to:

 Analyze and model electrical and mechanical system using analogous.

 Formulate transfer functions using block diagram and signal flow graphs.
 Analyze the stability of control system, ability to determine transient and steady state time response.
 Illustrate the performance of a given system in time and frequency domains, stability analysis using Root
locus and Bode plots.
 Discuss stability analysis using Nyquist plots, Design controller and compensator for a given specification.

Graduate Attributes (As per NBA)

Engineering Knowledge, Problem analysis, Modern Tool Usage, Life-long learning.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE)
is 50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of
50) and for the SEE minimum passing mark is 35% of the maximum marks(18 out of 50 marks).
The student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks
out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal
Assessment Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50%
of the coverage of the syllabus, and the second test will be administered after 85-90% of
the coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The schedule for assignments
shall be planned properly by the course teacher. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned. Each assignment
shall be conducted for 25 marks. (If two assignments are conducted then the sum of the
two assignments shall be scaled down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of
tests and assignment/s marks.

Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers
for the course (duration 03 hours).

1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
 The students have to answer 5 full questions(for 100 marks), selecting one full question from each
module.
 Marks scored shall be proportionally reduced to 50 marks.

Textbook
1 Control Systems Anand Kumar PHI 2ndEdition,2014
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Reference Books
1 Automatic Control Systems Farid Golnaraghi, Wiley 9thEdition,2010
Benjamin C.Kuo
2 Control Systems Engineering Norman S.Nise Wiley 4thEdition,2004
3 Modern Control Systems Richard C D orfetal Pearson 11thEdition,2008

4 Control Systems, Principles and M.Gopal McGawHill 4thEdition,2012

Design
5 Control Systems Engineering S.Salivahananetal Pearson 1stEdition,2015

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 Annexure-II

Medium Voltage Substation Design Semester VI

Course Code BEE613A CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
 Explain the concepts behind substation engineering and design.
 Demonstrate how to prepare and read SLD for substation.
 Demonstrate how to size and select LV and HV equipment’s for power distribution,
protection and switchgear.
 Formulate and analyze erection key diagram, layout preparation and necessary sectional
clearance in substation installation.
 Assess multi-disciplinary approach in substation erection.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1. Chalk and Talk,
2. Discussion and Q & A
3. Quizzes
4. Videos and E –resources
5. Substation Visits etc

Module-1
Substation Basics
Substation Introduction and Classifications, Busbar Types in Outdoor Switchyard, Outdoor
/Indoor Substation - Auxiliary Equipment in a Substation, Standards and Practices, Factors
Influencing Substation Design -Different factors like Altitude, Ambient Temperature etc. with
animation, Selection of Dielectric Strength for Electrical Equipment with animation on
creepage distance, Testing of Electrical Equipment, Concepts of Single Line Diagram.
Module-2
Transformers and Switchgears
Classification of Transformers with a practical overview, Transformer Percentage Impedance
and Losses, Construction including busbar arrangement and safety features, Classifications of
MV Switchgear and Key Design Parameters, MV Switchgear Construction, LV Compartment,
Security Interlocks & General Arrangement, Control Circuit Components - Control Relays,
Time Delay Relays & Latched Relays), Control Scheme Basics, Trip Lockout, TCS and Anti-
pumping Circuits, Logic Schemes.
Module-3
Protection and Station Auxiliary equipment and Digital Substation
Power System Network, Protection System, Overcurrent and Earth Fault, Overcurrent and
Earth Fault – Coordination. Distribution Feeder Protection, Transformer – Unit/Main
Protection, Transformer Protection, Familiarization of NUMERICAL Relays, Diesel Generator
System, Instrument transformers (CT), Basics of AC/DC Auxiliary Power System & Sizing of
Aux. Transformer, DC System Components, Battery Sizing & charger Sizing, DG Set
Classification, and sizing. Evolution of Substation Automation, Communication System
Fundamentals, Substation Automation System: DI, DO, AI, AO, Remote Terminal Unit –

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 Annexure-II

RTU, Substation Automation Requirements – Time Synchronizing, HMI, SCADA.

Module-4
Cabling System & Illumination, Outdoor SS Layout engineering, Erection Key Diagram,
Earthing and Lighting Protection
LV Cables - Power & Control, MV Cables, Methods for Cable Installation, Practical aspects of
Cable Sizing, Cable Glands, Lugs, and their Accessories, Types and Classifications of Surge
Arresters, Characteristics of Surge Arresters, Illumination System Design, Equipment Layout
engineering aspects for Outdoor Substation and related calculations and guide lines, Basics of
Outdoor Air Insulated Substation up to 33 kV - Statutory Clearances, Practical approach to Cable
routing layout for Outdoor S/S, Practical approach to Erection Key Diagram (EKD) for outdoor
switchyard, Importance and Types of Earthing, Earthing Design, Types of Earthing Material,
Lightning Protection.
Module-5
MV substation Civil design, Fire Protection, HVAC, Maintenance and Safety
Transformer Foundation, Fire Wall, and Fire Rated Doors, Civil & Structural Engineering - MV
SS, Fire Detection & Alarm System and Fire Suppression System, Heating, Ventilation and Air-
conditioning (HVAC) for Substation, Need for Maintenance of a Substation & schedule,
Electrical Safety Rules, Standard Operating Procedures.
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Explain the key concepts of design, construction, operation, and maintenance of electrical
substations.
2. Develop design calculations in substation engineering such as earth-mat, lightning
protection, earthing, lighting, and cable sizing.
3. Develop design calculation for sizing of power transformers, diesel generator.
4. Select LV and HV equipment’s in substation for power distribution, protection, and
switchgear.
5. Explain Electrical Safety Rules, SOPs.

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 Annexure-II

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions(for 100 maks), selecting one full question from each
module.
4. Marks scored shall be proportionally reduced to 50 marks.
Suggested Learning Resources:
Books
1. Partap Singh Satnam, P.V. Gupta, “Sub-station Design and Equipment”, Dhanpat Rai
Publications, 1 st Edition, 2013
2. Sunil S. Rao, “Switchgear Protection and Power Systems (Theory, Practice & Solved
Problems)”, Khanna Publications, 14th Edition, 2019.
3. Electrical substation and engineering & practice by S. Rao, Khanna Publishers 2015
4. McDonald John D, “Electric Power Substations Engineering,” CRC Press, 3 rd. Edition,
2012

Web links and Video Lectures (e-Resources):

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 Annexure-II

 .

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



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 1

EMBEDDED SYSTEM DESIGN Semester VI

Course Code BEE613B CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy Total Marks 100
Credits 03 Exam Hours
Examination nature (SEE) Theory/practical/Viva-Voce /Term-work/Others
Course objectives:
To teach students
Introductory topics of Embedded System design
Characteristics & attributes of Embedded System
Introduction of Embedded System Software and Hardware development
RTOS based Embedded system design

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
. These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes and make Teaching –Learning more effective
1. Lecturer method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various analog and digital circuits.
3. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop
thinking skills such as the ability to evaluate, generalize, and analyse information rather than
simply recall it.
4. Show the different ways to solve the same problem and encourage the students to come up
with their own creative ways to solve them.
5. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding
Module-1
Introduction: Embedded Systems and general purpose computer systems, history, classifications,
applications and purpose of embedded systems Chapter 1 – Text 1
Core of Embedded Systems : Microprocessors and microcontrollers, RISC and CISC controllers, Big
endian and Little endian processors, Application specific ICs, Programmable logic devices, COTS,
sensors and actuators, communication interface, embedded firmware, other system components,
PCB and passive components Chapter 2 – Text 1

Module-2
Characteristics and quality attributes of embedded systems: Characteristics, Operational and
nonoperational quality attributes, application specific embedded system - washing machine, domain
specific – automotive Chapter 3 & 4 – Text 1
Module-3
Hardware Software Co design and Program Modelling : Fundamental issues in Hardware
Software Co-design, Computational models in Embedded System Design Chapter 7 – Text 1: 7.1, 7.2
Embedded Hardware Design and Development: Analog Electronic Components, Digital Electronic
Components, VLSI & Integrated Circuit Design, Electronic Design Automation Tools
Chapter 8 – Text 1: 8.1, 8.2, 8.3, 8.4

Module-4

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 2

Embedded Firmware Design and Development: Embedded Firmware Design Approaches,

Embedded Firmware Development Languages Chapter 9 – Text 1: 9.1, 9.2
Embedded System Development Environments: Types of files generated on cross compilation (
only explanation – programming codes need not be dealt), disassemble/decompliler, Simulators,
Emulators and Debugging Chapter 13 – Text 1: 13.2, 13.3,13.4
Module-5
Real-time Operating System(RTOS) based Embedded System Design:
Operating System basics, Types of Operating Systems, Tasks, Process and Threads, Multiprocessing
and Multitasking, Task Scheduling Chapter 10 – Text 1: 10.1 to 10.5
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Explain characteristics of Embedded System design
2. Acquire knowledge about basic concepts of circuit emulators, debugging and RTOS
3. Analyse embedded system software and hardware requirements
4. Develop programming skills in embedded systems for various applications
5. Design basic embedded system for real time applications
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A
student shall be deemed to have satisfied the academic requirements and earned the credits allotted
to each subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum
total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.

Continuous Internal Evaluation:

 For the Assignment component of the CIE, there are 25 marks and for the Internal Assessment
Test component, there are 25 marks.
 The first test will be administered after 40-50% of the syllabus has been covered, and the
second test will be administered after 85-90% of the syllabus has been covered
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned.
 For the course, CIE marks will be based on a scaled-down sum of two tests and other methods of
assessment.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions(for 100 marks), selecting one full question from each
module.
4. Marks scored shall be proportionally reduced to 50 marks.
Suggested Learning Resources:
Books
1.Shibu K V, “Introduction to Embedded Systems”, Second Edition, McGraw Hill Educatiion

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 3

Web links and Video Lectures (e-Resources):

. NPTL Lectures: https://nptel.ac.in/courses/108102045
 Embedded Systems, IIT Delhi, Prof. Santanu Chaudhary

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

To design a simple Embedded System like simple remote
To demonstrate simple microcontroller based experiments like LED interfacing, LCD
interfacing, DAC etc

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 Annexure-II 1

MULITLEVEL POWER CONVERTER Semester VI

Course Code BEE613C CIE Marks 50
Teaching Hours/Week(L:T:P:S) (3:0:0) SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:

 To learn multi level topology (Symmetry &Asymmetry) with common DC bus link.
 To study the working of cascaded H-Bridge, Diode Clamped and Flying Capacitor MLI.
 To study the working of MLI with reduced switch count.
 To simulate three level diode clamped MLI and there level flying capacitor based MLI
with resistive and reactive load
 To simulate the MLI with reduced switch count.

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1. Lecturer method (L) needs not to be only traditional lecture method, but alternative effective teaching
methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design thinking
skills such as the ability to design, evaluate, generalize, and analyse information rather than simply
recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps improve
the students' understanding.
Module-1
INTRODUCTION – Generalized Topology with a Common DC bus – Converters derived from
the generalized topology– symmetric topology without a common DC link–Asymmetric
topology. Design of Half bridge, Full bridge configurations, Push-pull converter, C’uk
converter, Sepic Converter; Design criteria for SMPS; Multi-output switch mode regulator;
Design of Inductor and high frequency transformer.
Module-2
RESONANT CONVERTERS Introduction, Need of resonant converters, Classification of
resonant converters, Load resonant converters, Resonant switch converters, zero-voltage
switching dc-dc converters, zero current switching dc-dc converters, clamped voltage
topologies. Introduction-H-Bridge Inverter, , CHB Inverter with Equal DC Voltage, H-Bridges
with Unequal DC Voltages
Module-3
DIODE CLAMPED MULTILEVEL CONVERTER Introduction–Converter structure and
Functional Description – Modulation of Multilevel converters – Voltage balance Control –
Effectiveness Boundary of voltage balancing in DCMC converters – Performance results.

Module-4

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 Annexure-II 2

FLYINGCAPACITORMULTILEVELCONVERTER: Introduction– Flying Capacitor

topology – Modulation scheme for the FCMC – Dynamic voltage balance of FCMC.
Module-5
MULTILEVEL CONVERTER WITH REDUCED SWITCH COUNT: Multilevel inverter with
reduced switch count-structures, working principles and pulse generation methods.

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 Annexure-II 3

Course outcome(Course Skill Set)

At the end of the course, the student will be able to :
CO1:Competencyinfunctionofvariouspowerelectronicsdevices
CO2: Skill of analyzing power electronic devices
CO3:Know-howofadvancePowerelectronicsconverter
CO4: Fitness in mitigating converter harmonics

Assessmen tDetails (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and
for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The student is
declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of 100) in the sum
total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment Test
component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of the
coverage of the syllabus, and the second test will be administered after 85-90% of the coverage of
the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the22OB2.4,if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy as per the
outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for the
course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum of
3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions(for 100 marks), selecting one full question from each module.
4. Marks scored shall be proportionally reduced to50 marks.

Suggested Learning Resources:

Books
1. Power Electronics Converters and Regulators Branko L. Doki ć Branko Blanu š a Springer
(International Publishing, Switzerland) 3rd Edition, 2015
2. Bin Wu, “High Power Converters and AC Drives”, JohnWilley&sons, Inc.,2006.
3. Derek A. Paice “Power Electronic Converter Harmonics –Multipulse Methods for Clean Power”, IEEE Press,
1996.
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 Annexure-II 4

MarianP.Kazmierkowski,R.KrishnanandF.Blaabjerg,“ControlinPowerElectronics”,AcademicPress,
ElsevierScience,2002.
4. Euzeli Cipriano dos Santos Jr.andEdison RobertoCabral Da Silva “Advanced Power Electronics Converters -
PWM Converters Processing AC Voltages”, Willey – IEEE Press, 2014.
5. Muhammad H. Rashid,“PowerElectronicsHandbook”,Elsevier,3rded.,2011.

Web links and Video Lectures (e-Resources):

 MIT OPEN COURSE WARE by Massachusetts Institute of Technology-website: ocw.mit.edu
 Courses available through NPTEL. -website: nptel.ac.in

Activity Based Learning (SuggestedActivitiesinClass)/PracticalBasedlearning

 Quiz
 Group discussion

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 Annexure-II 1

Electric Motor and Drive Systems for Electric Vehicles Semester VI

Course Code BEE613D CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
Course Objectives :The objective of this course is to make the student
1. Understand the concept of electric vehiclestechnology
2. Gain knowledge on power requirement of EV
3. Know the performance and controlof various motors for EVs

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teachers can use to accelerate the attainment of the various
course outcomes.
1. Lecturer method (L) needs not to be only traditional lecture method, but alternative
effective teaching methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes
critical thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop
design thinking skills such as the ability to design, evaluate, generalize, and analyse
information rather than simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and
encourage the students to come up with their own creative ways to solve them.
Discuss how every concept can be applied to the real world - and when that's possible, it
helps improve the students' understanding.
Module-1
Introduction -History of Electric and Hybrid Electric Vehicles.
Vehicle Fundamentals-General Description of Vehicle Movement, Power Train Tractive Effort
and Vehicle Speed.
Vehicle Performance –Maximum Speed of a Vehicle , Gradeability, Acceleration
Performance ,Braking Performance , Braking Force , Braking Distribution on Front and Rear
Axles
Module-2
Electric Vehicles:
Configurations of Electric Vehicles, Performance of Electric Vehicles , Traction Motor
Characteristics, Tractive Effort and Transmission Requirement , Vehicle Performance ,
Energy Consumption.
Module-3

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 Annexure-II 2

DC Motor Drives:
Operating principle, Speed characteristics of DC motors,
Combined Armature Voltage and Field Control, Chopper Control of DC Motors.
Control Methods- Two-Quadrant Control -Single Chopper with a Reverse Switch,
Class C Two-Quadrant Chopper,Four-Quadrant control.
Module-4
Induction Motor Drives:
Basic Operation Principles of Induction Motors , Steady-State Performance
Constant v/f Control, Power Electronic Control.
Field Orientation Control(FOC)
Principles of FOC,Control methods- Direction Rotor Flux control, Indirect Rotor Flux control,
Voltage Source Inverter control - Voltage Control, Current Control.

Module-5
BLDC Motor Drives:
BLDC Machine Construction and Classification, Performance Analysis, Control of BLDC
Motor Drives.
Control Techniques - Methods Using Observers, Methods Using Back EMF Sensing.
Switched Reluctance Motor Drives (SRM)-Basic Magnetic Structure, Torque Production,
Methods of Control -Phase Flux Linkage Method, Mutually Induced Voltage Method,
Observer-Based Method, Self-Tuning Using an Artificial Neural Network.
Course outcome (Course Skill Set)

At the end of the course, the student will be able to :

1.Explain the Fundamental and Performance of EV

2. Understand the Characteristics of motor control and energy consumption for EV operation
3.Analyse the Power electronics and sensors in DC motor electric vehicles.
4. Design and Analysethe induction motor drives and discuss methods for controlling them.
5. Comprehend the construction, working principle and controlof BLDC and SRM motors.

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 Annexure-II 3

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for
the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The student is
declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of 100) in the sum
total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment Test
component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of the
coverage of the syllabus, and the second test will be administered after 85-90% of the coverage of the
syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then only
one assignment for the course shall be planned. The schedule for assignments shall be planned
properly by the course teacher. The teacher should not conduct two assignments at the end of the
semester if two assignments are planned. Each assignment shall be conducted for 25 marks. (If two
assignments are conducted then the sum of the two assignments shall be scaled down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with
a maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.

Suggested Learning Resources:

Text Books
1. Modern Electric, Hybrid Electric, and Fuel Cell Vehicles.
Fundamentals, Theory, and Design by Mehrdad Ehsani, Yimin Gao, Sebastien E. Gay, Ali
Emadi, CRC Press, 2004.
1. Electric and Hybrid Vehicles Design Fundamentals Third Edition
Iqbal Husain, CRC Press
Reference Books:
1. Hybrid ElectricVehicles, Principles And ApplicationsWith Practical Perspectives by
Chris Mi , M. Abul Masrur, David Wenzhong Gao John Wiley & Sons, 2011.

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 Annexure-II 4

2 Electric and Hybrid Vehicles, .T. Denton, Routledge, 2016.

3. Permanent Magnet Synchronous and Brushless DC Motor Drives , R Krishnan, CRC Press
4. Switched Reluctance Motor Drives, Berker B., James W. J. & A. Emadi, CRC Press
Web links and Video Lectures (e-Resources):
NPTEL courses – eMobility and Electric Vehicle Engineering
https://archive.nptel.ac.in/courses/108/106/108106182

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

Quizzes, Seminars, visit EV manufacturing industry

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 Annexure-II 1

Utilization of Electric Power Semester VI

Course Code BEE654A CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
(1) To discuss electric heating, air-conditioning and electric welding.
(2) To explain laws of electrolysis, extraction and refining of metals and electro deposition.
(3) To explain the terminology of illumination, laws of illumination, construction and working of electric
lamps.
(4) To explain design of interior and exterior lighting systems- illumination levels for various purposes light
fittings- factory lighting- flood lighting-street lighting
(5) To discuss systems of electric traction, speed time curves and mechanics of train movement.
(6) To discuss motors used for electric traction and their control.
(7) To discuss braking of electric motors, traction systems and power supply and other traction systems.
(8) To Give awareness of technology of electric and hybrid electric vehicles.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1 Lecturer method (L) needs not to be only traditional lecture method, but alternative effective teaching
methods could be adopted to attain the outcomes.
2 Use of Video/Animation to explain functioning of various concepts.
3 Encourage collaborative (Group Learning) Learning in the class.
4 Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical thinking.
5 Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design thinking
skills such as the ability to design, evaluate, generalize, and analyse information rather than simply recall
it.
6 Introduce Topics in manifold representations.
7 Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8 Discuss how every concept can be applied to the real world - and when that's possible, it helps improve the
students' understanding.
Module-1
Heating and welding: Electric Heating, Resistance ovens, Radiant Heating, Induction Heating, High
frequency Eddy Current Heating, Dielectric Heating, The Arc Furnace, Heating of Buildings,
Air – Conditioning, ElectricWelding, Modern Welding Techniques.
Electrolytic Electro – Metallurgical Process: Ionization, Faraday’s Laws of Electrolysis, Definitions,
Extraction of Metals, Refining of Metals, Electro Deposition.
Module-2
Illumination: Introduction, Radiant Energy, Definitions, Laws of Illumination, Polar Curves,
Photometry, Measurement of Mean Spherical Candle Power by Integrating Sphere, Illumination Photometer,
Energy Radiation and luminous Efficiency, electric Lamps, Cold Cathode Lamp, Lighting Fittings,
Illumination for Different Purposes, Requirements of Good Lighting.
Module-3
Electric Traction Speed - Time Curves and Mechanics of Train Movement: Introduction, Systems of
Traction, Systems of electric Traction, Speed - Time Curves for Train Movement, Mechanics
of Train Movement, Train Resistance, Adhesive Weight, Coefficient of Adhesion.
Motors for Electric traction: Introduction, Series and Shunt Motors for Traction Services, Two Similar
Motors (Series Type) are used to drive a Motor Car, Tractive Effort and Horse Power, AC Series Motor, Three
Phase Induction Motor.
Control of motors: Control of DC Motors, Tapped Field Control or Control by Field Weakening, Multiple Unit
Control, Control of Single Phase Motors, Control of Three Phase Motors.

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 Annexure-II 2

Module-4
Braking: Introduction, Regenerative Braking with Three Phase Induction Motors, Braking with Single
Phase Series Motors, Mechanical braking, Magnetic Track Brake, Electro – Mechanical Drum Brakes.
Electric Traction Systems and Power Supply: System of Electric Traction AC Electrification,
Transmission Lines to Sub - Stations, Sub – Stations, Feeding and Distribution System of AC Traction Feeding
and Distribution System for DC Tramways, Electrolysis by Currents through Earth, Negative Booster, System
of Current Collection, Trolley Wires.
Trams, Trolley Buses and Diesel – Electric Traction: Tramways, The Trolley – Bus, Diesel Electric Traction.
Module-5
Electric Vehicles: Configurations of Electric Vehicles, Performance of Electric Vehicles, Tractive Effort
in Normal Driving, Energy Consumption.
Hybrid Electric Vehicles: Concept of Hybrid Electric Drive Trains, Architectures of Hybrid Electric Drive
Trains.
Course outcome (Course Skill Set)
At the end of the course the student will be able to :
1. Discuss different methods of electric heating & welding.
2. Discuss the laws of electrolysis, extraction, refining of metals and electro deposition process.
3. Discuss the laws of illumination, different types of lamps, lighting schemes and design of lighting systems.
Analyze systems of electric traction, speed time curves and mechanics of train movement.
4. Explain the motors used for electric traction, their control & braking and power supply system used for
electric traction.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.
Continuous Internal Evaluation:
 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.

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 Annexure-II 3

Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.

Suggested Learning Resources:

Books
Textbooks
1. A Text Book on Power System Engineering, A. Chakrabarti et al, Dhanpat Rai and Co, 2nd Edition, 2010.
2. Modern Electric, Hybrid Electric, and Fuel Cell Vehicles: Fundamentals Theory, and Design,
(Chapters 04and 05 for module 5), Mehrdad Ehsani et al, CRC Press, 1st Edition, 2005.
Reference Books
1. Utilization, Generation and Conservation of Electrical Energy, Sunil S Rao, Khanna Publishers, 1st
Edition,2011.
2. Utilization of Electric Power and Electric Traction, G.C. Garg, Khanna Publishers, 9th Edition, 2014.
Web links and Video Lectures (e-Resources):
 .

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



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 Annexure-II 1

Renewable Energy Sources Semester VI

Course Code BEE654B CIE Marks 50
Teaching Hours/Week (L:T:P: S) SEE Marks 50
Total Hours of Pedagogy Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
(1) To discuss causes of energy scarcity and its solution, energy resources and availability of renewable
energy.
(2) To explain sun – earth geometric relationship, Earth – Sun Angles and their Relationships.
(3) To discuss about solar energy reaching the Earth’s surface and solar thermal energy
applications.To discuss types of solar collectors, their configurations and their applications.
(4) To explain the components of a solar cell system, equivalent circuit of a solar cell, its
characteristicsand applications.
(5) To discuss benefits of hydrogen energy, production of hydrogen energy, storage its advantages and
disadvantages.
(6) To discuss wind turbines, wind resources, site selection for wind turbine.
(7) To discuss geothermal systems, their classification and geothermal based electric power generation
(9To discuss waste recovery management systems, advantages and disadvantages.
(8) To discuss biomass composition, production, types of biomass gasifiers, properties of producer gas
benefits.
(9) To discuss tidal energy resources, energy availability, power generation.
(10) To explain motion in the sea wave, power associated with sea wave and energy availability and the
devicesfor harnessing wave energy.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1 Lecturer method (L) needs not to be only traditional lecture method, but alternative effective teaching
methods could be adopted to attain the outcomes.
2 Use of Video/Animation to explain functioning of various concepts.
3 Encourage collaborative (Group Learning) Learning in the class.
4 Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical thinking.
5 Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design thinking
skills such as the ability to design, evaluate, generalize, and analyse information rather than simply recall
it.
6 Introduce Topics in manifold representations.
7 Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8 Discuss how every concept can be applied to the real world - and when that's possible, it helps improve the
students' understanding.

Module-1
Introduction: Causes of Energy Scarcity, Solution to Energy Scarcity, Factors Affecting Energy Resource
Development, Energy Resources and Classification, Renewable Energy – Worldwide Renewable Energy
Availability, Renewable Energy in India.
Energy from Sun: Sun- earth Geometric Relationship, Layer of the Sun, Earth – Sun Angles and their
Relationships, Solar Energy Reaching the Earth’s Surface, Solar Thermal Energy Applications.
Module-2
Solar Thermal Energy Collectors: Types of Solar Collectors, Configurations of Certain Practical Solar
Thermal Collectors, Material Aspects of Solar Collectors, Concentrating Collectors, Parabolic Dish – Stirling
Engine System, Working of Stirling or Brayton Heat Engine, Solar Collector Systems into Building Services,
Solar Water Heating Systems, Passive Solar Water Heating Systems, Applications of Solar Water Heating
Systems, Active Solar Space Cooling, Solar Air Heating, Solar Dryers, Crop Drying, Space Cooing, Solar
Cookers, Solar pond.
Solar Cells: Components of Solar Cell System, Elements of Silicon Solar Cell, Solar Cell materials, Practical
Solar Cells, I – V Characteristics of Solar Cells, Efficiency of Solar Cells, Photovoltaic panels (series and parallel
arrays).

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 Annexure-II 2

Module-3
Hydrogen Energy: Benefits of Hydrogen Energy, Hydrogen Production Technologies, Hydrogen Energy
Storage, Use of Hydrogen Energy, Advantages and Disadvantages of Hydrogen Energy, Problems
Associated with Hydrogen Energy.
Wind Energy: Windmills, Wind Turbines, Wind Resources, Wind Turbine Site Selection.
Geothermal Energy: Geothermal Systems, Classifications, Geothermal Resource Utilization, Resource
Exploration, Geothermal Based Electric Power Generation, Associated Problems, environmental Effects.
Solid waste and Agricultural Refuse: Waste is Wealth, Key Issues, Waste Recovery Management
Scheme, Advantages and Disadvantages of Waste Recycling, Sources and Types of Waste, Recycling
of Plastics.
Module-4
Biomass Energy: Biomass Production, Energy Plantation, Biomass Gasification, Theory of
Gasification, Gasifier and Their Classifications, Chemistry of Reaction Process in Gasification, Updraft,
Downdraft and Cross-draft Gasifiers, Fluidized Bed Gasification, Use of Biomass Gasifier, Gasifier
Biomass Feed Characteristics, Applications of Biomass Gasifier, Cooling and Cleaning of Gasifiers.
Biogas Energy: Introduction, Biogas and its Composition, Anaerobic Digestion, Biogas Production,
Benefitsof Biogas, Factors Affecting the Selection of a Particular Model of a Biogas Plant, Biogas Plant Feeds
and theirCharacteristics.
Tidal Energy: Introduction, Tidal Energy Resource, Tidal Energy Availability, Tidal Power
Generation in India, Leading Country in Tidal Power Plant Installation, Energy Availability in Tides, Tidal
Power Basin, Turbines for Tidal Power, Advantages and Disadvantages of Tidal Power, Problems
Faced in Exploiting Tidal Energy.
Module-5
Sea Wave Energy: Introduction, Motion in the sea Waves, Power Associated with Sea Waves, Wave Energy
Availability, Devices for Harnessing Wave Energy, Advantages and Disadvantages of Wave Power.
Ocean Thermal Energy: Introduction, Principles of Ocean Thermal Energy Conversion (OTEC), Ocean
Thermal Energy Conversion plants, Basic Rankine Cycle and its Working, Closed Cycle, Open Cycle
and Hybrid Cycle, Carnot Cycle, Application of OTEC in Addition to Produce Electricity, Advantages,
Disadvantages and Benefits of OTEC.
Course outcome (Course Skill Set)
At the end of the course the student will be able to :
1. Discuss causes of energy scarcity and its solution, energy resources and availability of renewable
energy. Outline energy from sun, energy reaching the Earth’s surface and solar thermal energy
applications.
2. Discuss types of solar collectors, their configurations, solar cell system, its characteristics and their
applications.
3. Explain generation of energy from hydrogen, wind, geothermal system, solid waste and agriculture
refuse.
4. Discuss production of energy from biomass, biogas.
5. Summarize tidal energy resources, sea wave energy and ocean thermal energy.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.

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 Annexure-II 3

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions(for 100 marks), selecting one full question from each
module.
4. Marks scored shall be proportionally reduced to 50 marks.

Suggested Learning Resources:

Books
Textbook
1. Nonconventional Energy Resources, Shobh Nath Singh, Pearson, 1st Edition, 2015.
Reference Books
1. Nonconventional Energy Resources, B.H. Khan, McGraw Hill, 3rd Edition.
2. Renewable Energy; Power for a sustainable Future, Godfrey Boyle, Oxford, 3rd Edition, 2012.
3. Renewable Energy Sources: Their Impact on global Warming and Pollution, Tasneem Abbasi S.A. Abbasi,
PHI,1st Edition, 2011.
Web links and Video Lectures (e-Resources):
 .

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



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 Annexure-II 1

Industrial Servo Control Systems Semester VI

Course Code BEE654C CIE Marks 50
Teaching Hours/Week (L:T:P: S) SEE Marks 50
Total Hours of Pedagogy Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory/
Course objectives:
(1) To explain the evolution and classification of servos, with descriptions of servo drive actuators,
amplifiers, feedback transducers, performance, and troubleshooting techniques.
(2) To discuss system analogs and vectors, with a review of differential equations.
(3) To discuss the concept of transfer functions for the representation of differential equations.
(4) To discuss mathematical equations for electric servo motors, both DC and brushless DC servo
motors.
(5) To represent servo drive components by their transfer function, to combine the servo drive building
blocks intosystem block diagrams.
(6) To determine the frequency response techniques for proper servo compensation.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1 Lecturer method (L) needs not to be only traditional lecture method, but alternative effective teaching
methods could be adopted to attain the outcomes.
2 Use of Video/Animation to explain functioning of various concepts.
3 Encourage collaborative (Group Learning) Learning in the class.
4 Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical thinking.
5 Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design thinking
skills such as the ability to design, evaluate, generalize, and analyse information rather than simply recall
it.
6 Introduce Topics in manifold representations.
7 Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8 Discuss how every concept can be applied to the real world - and when that's possible, it helps improve the
students' understanding.
Module-1
Servos: Introduction, Benefits of Servo Systems, Types of Servos - Evolution of Servo Drives,
Classification of Drives, Components of Servos - Hydraulic/Electric Circuit Equations, Actuators- Electric,
Actuators-Hydraulic,Amplifiers-Electric,Amplifiers-Hydraulic,Transducers (Feedback).
Module-2
Machine Servo Drives: Types of Drives, Feed Drive Performance.
Troubleshooting Techniques: Techniques by Drive, Problems: Their Causes and Cures.
Machine Feed Drives: Advances in Technology, Parameters for making Application Choices.
Application of Industrial Servo Drives: Introduction, Physical System Analogs, Quantities and Vectors,
Differential Equations for Physical Systems, Electric Servo Motor Transfer Functions and Time Constants,
Transport Lag Transfer Function, Hydraulic Servo Motor Characteristics, General Transfer Characteristics

Module-3
Generalized Control Theory: Servo Block Diagrams, Frequency-Response Characteristics and Construction
of Approximate (Bode) Frequency Charts, Nichols Charts, Servo Analysis Techniques, Servo Compensation.
Indexes of Performance: Definition of Indexes of Performance for Servo Drives, Indexes of Performance
for Electric and Hydraulic Drives.
Module-4
Performance Criteria: Percent Regulation, Servo System Responses.
Servo Plant Compensation Techniques: Dead-Zone Nonlinearity, Change-in-Gain Nonlinearity, Structural
Resonances, Frequency Selective Feedback, Feed forward Control. Machine Considerations: Machine feed
drive Considerations, Ball Screw Mechanical Resonances and Reflected Inertias for Machine Drives.

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 Annexure-II 2

Module-5
Machine Considerations: Drive Stiffness, Drive Resolution, Drive Acceleration, Drive Speed
Considerations, Drive Ratio Considerations, Drive Thrust/Torque And Friction Considerations, Drive Duty
Cycles.
Course outcome (Course Skill Set)
1. Explain the evolution and classification of servos, with descriptions of servo drive actuators,
amplifiers,feedback transducers, performance, and troubleshooting techniques.
2. Discuss system analogs, vectors and transfer functions of differential equations.
3. Discuss mathematical equations for electric servo motors, both DC and brushless DC servo motors.
4. Represent servo drive components by their transfer function, to combine the servo drive building
blocksinto system block diagrams.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions for 100 marks, selecting one full question from each
module.
4. Marks scored shall be proportionally reduced to 50 marks.

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 Annexure-II 3

Suggested Learning Resources:

Books
Textbook
1. Industrial Servo Control Systems Fundamentals and Applications, George W. Younkin, Marcel Dekker,
1stEdition, 2003.
Reference Books
1. Servo Motors and Industrial Control Theory, Riazollah Firoozian, Springer, 2nd Edition, 2014.
2. DC SERVOS Application and Design with MATLAB, Stephen M. Tobin, CRC, 1st Edition, 2011.
Web links and Video Lectures (e-Resources):
 .

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



@#05052024 3
 SEMICONDUCTOR DEVICES Semester VI
Course Code BEE654D CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
Course objectives:

1)To learn basics of various types of power electronic devices

2)To study Snubber circuits for the protection of power semiconductor devices.
3)To learn gate and base drive circuits for power semiconductor devices
4) To develop a heat sink to control the temperature rise of semiconductor devices
5)Learn to design magnetic components inductors and transformers used in the power
electronic circuits

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teachers can use to accelerate the attainment of the various course outcomes.
. These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes and make Teaching –Learning more effective
1. Lecturer method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various analog and digital circuits.
3. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop
thinking skills such as the ability to evaluate, generalize, and analyse information rather than
simply recall it.
4. Show the different ways to solve the same problem and encourage the students to come up
with their own creative ways to solve them.
5. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding
Module-1
Power Electronics: Introduction, Converter Classification, Power Electronics Concepts,
Electronic Switches, Switch Selection, Spice, PSpice and Capture, Representation of switches in
Pspice -The Voltage-Controlled Switch, Transistors, Diodes and Thyristors (SCRs).
Power Computations: Introduction, Power and Energy, Inductors and Capacitors, Energy
Recovery, Effective Values, Apparent Power and Power Factor, Power Computations for
Sinusoidal AC Circuits, Power Computations for Nonsinusoidal Periodic Waveforms, Power
Computations Using Pspice.
Basic Semiconductor Physics: Introduction, Conduction Processes in Semiconductors pn
Junctions, Charge Control Description of pn-Junction Operation, Avalanche Breakdown
Module-2

@#05052024
 Power Diodes: Introduction, Basic Structure and I – V characteristics, Breakdown Voltage
Considerations, On –State Losses, Switching Characteristics, Schottky Diodes.
Bipolar Junction Transistors: Introduction, Vertical Power Transistor Structures, Z-V
Characteristics, Physics of BJT Operation, Switching Characteristics, Breakdown Voltages,
Second Breakdown, On-State Losses, Safe Operating areas.
Power MOSFETs : Introduction, Basic Structure, I-V Characteristics, Physics of Device
Operation, Switching Characteristics, Operating Limitations and Safe Operating Areas

Module-3
Thyristors: Introduction, Basic Structure, I-V Characteristics, Physics of Device Operation,
Switching Characteristics, Methods of Improving di/dt and dv/dt Ratings.
Gate Turn-Off Thyristors: Introduction, Basic Structure and Z-V Characteristics,
Physics of Turn-Off Operation, GTO Switching Characteristics, Overcurrent Protection of GTOs.
Insulated Gate Bipolar Transistors: Introduction, Basic Structure, I-V Characteristics, Physics
of Device Operation, Latchup in IGBTs, Switching Characteristics, Device Limits and SOAs.
Emerging Devices and Circuits: Introduction, Power Junction Field Effect Transistors, Field-
Controlled Thyristor, JFET-Based Devices versus Other Power Devices, MOS-Controlled
Thyristors, Power Integrated Circuits, New Semiconductor Materials for Power Devices
Module-4
Snubber Circuits: Function and Types of Snubber Circuits, Diode Snubbers, Snubber Circuits
for Thyristors, Need for Snubbers with Transistors, Turn-Off Snubber, Overvoltage Snubber,
Turn-On Snubber, Snubbers for Bridge Circuit Configurations, GTO Snubber Considerations.
Gate and Base Drive Circuits: Preliminary Design Considerations, dc-Coupled Drive Circuits,
Electrically Isolated Drive Circuits, Cascode-Connected Drive Circuits, Thyristor Drive Circuits,
Power Device Protection in Drive Circuits, Circuit Layout Considerations

Module-5
Component Temperature Control and Heat Sinks: Control of Semiconductor Device
Temperatures, Heat Transfer by Conduction, Heat sinks, Heat Transfer by Radiation and
Convection.
Design of Magnetic Components: Magnetic Materials and Cores, Copper Windings, Thermal
Considerations, Analysis of a Specific Inductor Design, Inductor Design Procedures, Analysis of
a Specific Transformer Design, Eddy Currents, Transformer Leakage Inductance, Transformer
Design Procedure, Comparison of Transformer and Inductor Sizes

Course outcome (Course Skill Set)

At the end of the course the student will be able to:
1)Discuss power electronic concepts, electronic switches and semiconductor physics.
2) Explain representation of switches in P-spice and power computations.
3) Explain the internal structure, the principle of operation, characteristics and base drive
circuits of power semiconductor devices; power diodes, power BJT, power MOSFET.
4) Explain the internal structure, the principle of operation, characteristics and base drive

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 circuits of power semiconductor devices; thyristors, power IGBT, power FET

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A
student shall be deemed to have satisfied the academic requirements and earned the credits allotted
to each subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum
total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.

Continuous Internal Evaluation:

 For the Assignment component of the CIE, there are 25 marks and for the Internal Assessment
Test component, there are 25 marks.
 The first test will be administered after 40-50% of the syllabus has been covered, and the
second test will be administered after 85-90% of the syllabus has been covered
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned.
 For the course, CIE marks will be based on a scaled-down sum of two tests and other methods of
assessment.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions for 100 marks, selecting one full question from each
module.
4. Marks
Suggested scoredResources:
Learning shall be proportionally reduced to 50 marks.
Books
1. . Power Electronics, Daniel W Hart, McGraw Hill.
2. Power Electronics Converters, Applications, and Design, Ned Mohan et al, Wiley, 3rd
Edition, 2014.
3. Semiconductor Device Modeling with Spice, G. Massobrio, P. Antognetti, McGraw-Hill,
2nd Edition, 2010.
4. Power Semiconductor Devices, B. Jayant Baliga, Springer, 2008.
5. Power Electronics Principles and Applications, Joseph Vithayathil, McGraw-Hill, 2011.

Web links and Video Lectures (e-Resources):

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 .
Youtube videos
NPTEL lecturers

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

Seminars
Quiz
Assignments

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 B. E. ELECTRICAL AND ELECTRONICS ENGINEERING
Choice Based Credit System (CBCS) and Outcome Based Education (OBE)
SEMESTER – VI
CONTROL SYSTEM LABORATORY
Course Code BEEL606 CIE Marks 50
Number of Practical Hours/Week(L:T:P) 0.0.2
SEE Marks 50
Credits 01 Exam Hours 03
Course Learning Objectives:
 To draw the speed torque characteristics of AC and DC servo motor.
 To determine the time and frequency reposes of a given second order system using
discrete components.
 To design and analyze Lead, Lag and Lag – Lead compensators for given specifications.
 To study the feedback control system and to study the effect of P, PI, PD andPID controller
and Lead compensator on the step response of the system.
 To s i m u l a t e a n d write a script files to plot root locus, bode plot, to study the stability of
the system
Sl. Experiments
NO
1 Experiment to draw the speed torque characteristics of (i) AC servo motor (ii) DC servo motor
2 Experiment to draw synchro pair characteristics
3 Experiment to determine frequency response of a second order system
4 (a) To design a passive RC lead compensating network for the given specifications, viz, the
maximum
phase lead and the frequency at which it occurs and to obtain the frequency response.
5 (a) To design a passive RC lag compensating network for the given specifications, viz, the
maximum phase lag and the frequency at which it occurs and to obtain the frequencyresponse.
(b) To determine experimentally the transfer function of the lag compensating network
6 Experiment to draw the frequency response characteristics of the lag – lead compensator
network and determination of its transfer function.
7 To study a second order system and verify the effect of (a) P, (b) PI, (c) PD and (d) PID controller on
the step response.
8 (a) To simulate a typical second order system and determine step response and evaluate time
response specifications.
(b) To evaluate the effect of adding poles and zeros on time response of second order system.
(c) To evaluate the effect of pole location on stability
9 (a) To simulate a D.C. Position control system and obtain its step response.
(b) To verify the effect of input waveform, loop gain and system type on steady state errors.
(c) To perform trade-off study for lead compensator.
(d) To design PI controller and study its effect on steady state error.
10 (a) To examine the relationship between open-loop frequency response and stability, open-loop
frequency and closed loop transient response
(b) To study the effect of open loop gain on transient response of closed loop system using
root locus.
11 (a) To study the effect of open loop poles and zeros on root locus contour
(b) Comparative study of Bode, Nyquist and root locus with respect to stability.
Note:
Sl. Description Experiment numbers
1 Perform experiments using suitable components/equipment’s 1&2
2 Perform experiments using suitable components/equipment’s and 3,4,5,6 and 7
verify the results using standard simulation package
3 Perform simulation only using standard package 8,9,10 and 11

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 Course Outcomes: At the end of the course the student will be able to:
 Utilize software package and discrete components in assessing the time and frequency
domain response of a given second order system.
 Design, analyze and simulate Lead, Lag and Lag – Lead compensators for given
specifications.
 Determine the performance characteristics of ac and DC servomotors and synchro-transmitter
receiver pair used in control systems.
 Simulate the DC position and feedback control system to study the effect of P, PI, PD and
PID controller and Lead compensator on the step response of the system.
 Develop a script files to plot Root locus, Bode plot and Nyquist plot to study the stability of
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%. The
minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the SEE
minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be deemed to
have satisfied the academic requirements and earned the credits allotted to each subject/ course if the
student secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal
Evaluation) and SEE (Semester End Examination) taken together.

Continuous Internal Evaluation (CIE):

CIE marks for the practical course are 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
1. Each experiment is to be evaluated for conduction with an observation sheet and record write-up.
Rubrics for the evaluation of the journal/write-up for hardware/software experiments are designed by
the faculty who is handling the laboratory session and are made known to students at the beginning of
the practical session.
2. Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
3. Total marks scored by the students are scaled down to 30 marks (60% of maximum marks).
4. Weightage to be given for neatness and submission of record/write-up on time.
5. Department shall conduct a test of 100 marks after the completion of all the experiments listed in the
syllabus.
6. In a test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will carry
a weightage of 60% and the rest 40% for viva-voce.
7. The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
8. The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
9. The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the total
CIE marks scored by the student.
Semester End Evaluation (SEE):
 SEE marks for the practical course are 50 Marks.
 SEE shall be conducted by the two examiners. One from the same institute as an internal
examiner and another from a different institute as an external examiner, appointed by the
university.
 The examination schedule and names of examiners are informed to the university before the
conduction of the examination. These practical examinations are to be conducted between the
schedule mentioned in the academic calendar of the University.
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointly by examiners.
 Students can pick one question (experiment) from the questions lot prepared by the examiners
jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by
examiners.
 General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result in
-60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and scored
marks shall be scaled down to 50 marks (however, based on course type, rubrics shall be decided by the
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 examiners)
 Change of experiment is allowed only once and 15% of Marks allotted to the procedure part are to be
made zero.
The minimum duration of SEE is 02 hours

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 TEMPLATE for AEC (if the course is atheory) Annexure-IV

Energy Management in Electric Vehicles Semester VI

Course Code BEE657A CIE Marks 50
Teaching Hours/Week (L:T:P: S) 1:0:0:0 SEE Marks 50
Total Hours of Pedagogy 15 Total Marks 100
Credits 01 Exam Hours 01
Examination type (SEE) MCQ
Course objectives:
 To provide a comprehensive understanding of energy management principles and
strategies specific to electric vehicles.
 To familiarize students with the various components and systems involved in energy
management in electric vehicles.
 To equip students with the knowledge and skills to apply optimization techniques for
efficient energy management in electric vehicles.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1. Interactive Lectures: Conduct interactive lectures where the instructor presents the
theoretical concepts, principles, and case studies related to energy management in electric
vehicles.
2. Case Studies and Projects: Assign case studies and projects that require students to apply
the concepts and strategies learned in class to real-world scenarios.
3. Guest Lectures and Industry Visits: Invite guest speakers from the industry or research
organizations who are experts in the field of energy management in electric vehicles.
Module-1
Introduction to Electric Vehicles and Energy Management Overview of electric vehicles
(EVs) - Types of EVs (Battery Electric Vehicles, Plug-in Hybrid Electric Vehicles);
Advantages and challenges of EVs. Introduction to energy management in EVs - Importance of
energy management; Key objectives of energy management in EVs. Electric vehicle
components and systems- Battery systems; Power electronics and motor drive systems;
Regenerative braking systems; Energy storage and management systems

Module-2
Fundamentals of Energy Management Energy storage technologies for EVs - Lithium-ion
batteries; Solid-state batteries; Supercapacitors; Fuel cells. Battery charging and discharging
techniques - Charging infrastructure for EVs; Charging modes (AC and DC charging); Fast
charging vs. slow charging; Battery management systems (BMS). Energy efficiency and energy
loss analysis - Losses in power electronics and motor drive systems; Losses in battery systems;
Factors affecting energy efficiency in EVs.
Module-3
Advanced Energy Management Strategies State-of-charge (SoC) estimation and
management - SoC estimation techniques (Coulomb counting, Kalman filtering, etc.); SoC
balancing techniques; Impact of SoC on battery life and performance. Power management
strategies - Optimal power allocation between different vehicle systems; Dynamic power
allocation based on driving conditions; Power flow control in EVs. Regenerative braking and
energy recovery - Principles of regenerative braking; Control strategies for regenerative
braking; Energy recovery and utilization.

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 TEMPLATE for AEC (if the course is atheory) Annexure-IV

Module-4
Optimization Techniques for Energy Management Optimization models for energy
management - Linear programming and nonlinear optimization; Model predictive control (MPC)
for energy management; Genetic algorithms and other heuristic optimization techniques.
Intelligent energy management systems - Artificial intelligence (AI) and machine learning
techniques for energy management; Reinforcement learning-based energy management; Data-
driven approaches for energy optimization. Realtime energy management algorithms - Real-time
optimization algorithms for energy allocation; Adaptive control strategies for energy
management; Integration of energy management with navigation systems.
Module-5
Case Studies and Applications Energy management in electric buses and fleet management
- Challenges and strategies for energy management in public transportation; Fleet management
and scheduling optimization. Energy management in electric vehicles charging infrastructure -
Smart charging stations and grid integration; Demand-side management and load balancing.
Emerging trends and future directions in energy management - Wireless charging technologies;
Vehicle-to-vehicle (V2V) communication for energy optimization; Advanced energy storage and
conversion technologies.
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Understand and analyse the energy storage technologiesused in electric vehicles.
2. Understand the design and implementation of energy management strategies for electric
vehicles, considering factors such as battery charging, power allocation and regenerative
braking.
3. Understand optimization techniques and intelligent algorithms to optimize energy
management in electric vehicles, considering real-time constraints and factors such as
driving conditions and energy efficiency goals.

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 TEMPLATE for AEC (if the course is atheory) Annexure-IV

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together
Continuous internal Examination (CIE)
 For the Assignment component of the CIE, there are 25 marks and for the Internal Assessment
Test component, there are 25 marks.
 The first test will be administered after 40-50% of the syllabus has been covered, and the second
test will be administered after 85-90% of the syllabus has been covered
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned.
 For the course, CIE marks will be based on a scaled-down sum of two tests and other methods of
assessment.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.

Semester End Examinations (SEE)

SEE paper shall be set for 50 questions, each of the 01 marks. The pattern of the question paper is MCQ
(multiple choice questions). The time allotted for SEE is 01 hour. The student has to secure a minimum of
35% of the maximum marks meant for SEE.

Suggested Learning Resources:

Books
1. "Electric Vehicle Technology" by H. C. Rai
2. "Electric Vehicle Energy Management System for Efficiency Optimization" by Jingang Han,
Linlin Tan, and Xinbo Ruan
3. "Advanced Electric Drive Vehicles" edited by Ali Emadi
4. "Electric Vehicle Technology Explained" by James Larminie and John Lowry

Web links and Video Lectures (e-Resources):

 makes.mindmatrix.io

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning



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 Templatefor Practical Course and if AEC is a practical Course Annexure-V

Simulation and Control of Power Electronics Circuits Semester

Course Code BEEL657B CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0-0-1 SEE Marks 50
Credits 01 Exam Hours 02
Examination type (SEE) practical/Viva-Voce
Course objectives:
 To be able to simulate any DC-DC converter and observe the performance under various test conditions
 To be able to simulate single phase and three phase DC –AC converters and observe the performance under
various test conditions
 To be able to simulate uncontrolled, half controlled and fully controlled AC-DC converters and observe the
performance under various test conditions
Sl.NO Experiments
1 (a)Simulate a single phase half wave diode bridge rectifier. Input 100V, 50 Hz. AC supply. At the out put,
resistance of 50 ohms.
(b)Simulate a single phase full wave diode bridge rectifier. Input 100V, 50 Hz. AC supply. At the out put,
resistance of 50 ohms.

2 (a) Simulate a single phase half controlled full wave rectifier. Input 100V, 50 Hz. AC supply. At the out
put, resistance of 50 ohms.
(b) Simulate a single phase fully controlled full wave rectifier. Input 100V, 50 Hz. AC supply. At the out
put, resistance of 50 ohms.

3 Simulate a buck converter with 20 V DC input, and regulate the output at 10 V by implementing a PI
controller for closed loop operation. The out put power to vary from 10 W to 20 W. Ensure that voltage
ripple is limited to 1%.

4 Simulate a boost converter with 20 V DC input, and regulate the output at 35 V by implementing a PI
controller for closed loop operation. The out put power to vary from 30W to 60 W. Ensure that voltage
ripple is limited to 1%

5 Simulate a single phase AC voltage controller using a triac with 100V ,50 Hz. AC supply for an RL load of
10 oms and 2 mH.

6 Simulate a three phase inverter with 180 degree conduction mode with DC input of 100V and a star
connected balanced resistive of 40 ohms each. Use IGBT for inverter.

7 Simulate a single phase SPWM inverter with 50V DC input with modulation indices of 0.5, 0.6 and 0.8.
connect a resistance of 25 ohms at the output of inverter. Use power Mosfets for inverter.

8 Simulate a three phase inverter with 120 degree mode of conduction. Take input DC voltage of 100V and
three phase star connected balanced resistive load of 50 ohms each.
Demonstration Experiments ( For CIE )
9 In expt. 8. connect suitable LC filter at the output to obtain a sinusoidal output with THD of less than 8 %.

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 Templatefor Practical Course and if AEC is a practical Course Annexure-V

10 Simulate a three phase SPWM inverter with 50V DC input with modulation indices of 0.5, 0.6 and 0.8.
connect a star connected resistances of 25 ohms each at the output of the inverter. Use power Mosfets for
inverter.

11 Simulate a three phase, 5 level, neutral point clamped (NPC) inverter. Input DC voltage is 100V. The
inverter output is connected to a balanced 3 phase resistive load of 40 Ohms each.
12 Simulate a forward converter with input DC voltage of 30 V. Take transformer ratio of 1.5:1. Observe the
output voltages for duty cycles of 0.4, 0.6 and 0.8. Ensure that the output voltage ripple is less than 0.5 V.
The load resistance is 10 Ohms.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
 Simulate any given power electronic circuit and evaluate its performance under different test conditions
and also observe the performance for different values of passive filtering elements used in the converter.

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%. The
minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the SEE minimum
passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be deemed to have satisfied the
academic requirements and earned the credits allotted to each subject/ course if the student secures a minimum of
40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.

Continuous Internal Evaluation (CIE):

CIE marks for the practical course are 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment is to be evaluated for conduction with an observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments are designed by the faculty who is
handling the laboratory session and are made known to students at the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
 Total marks scored by the students are scaled down to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct a test of 100 marks after the completion of all the experiments listed in the
syllabus.
 In a test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will carry a
weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
 The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the total CIE marks
scored by the student.
Semester End Evaluation (SEE):
 SEE marks for the practical course are 50 Marks.
 SEE shall be conducted by the two examiners. One from the same institute as an internal examiner
and another from a different institute as an external examiner, appointed by the university.
 The examination schedule and names of examiners are informed to the university before the conduction of
the examination. These practical examinations are to be conducted between the schedule mentioned in the

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 Templatefor Practical Course and if AEC is a practical Course Annexure-V

academic calendar of the University.

 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointly by examiners.
 Students can pick one question (experiment) from the questions lot prepared by the examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
 General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result in -60%,
Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and scored marks shall
be scaled down to 50 marks (however, based on course type, rubrics shall be decided by the examiners)
 Change of experiment is allowed only once and 15% of Marks allotted to the procedure part are to be made
zero.
The minimum duration of SEE is 02 hours

Suggested Learning Resources:

https://in.mathworks.com/solutions/electrification/power-electronics-simulation.html
 - This provides design examples for power electronics simulation using MATLAB

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 Template for Practical Course and if AEC is a practical Course Annexure-V

Energy Audit Project Semester

Course Code BxxLxxx CIE Marks 50
Teaching Hours/Week (L:T:P: S) SEE Marks 50
Credits 01 Exam Hours 03
Examination type (SEE) Practical
Course objectives:
• Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their convenience and
repeat any number of times to understand the concept.
• Provide unhindered access to perform whenever the students wish.
• Vary different parameters to study the behaviour of the circuit without the risk of damaging equipment /
device or injuring themselves.
• To carryout Energy Audit for an industry, business establishment, organization and its computation using
• Scilab Software and proposing possible remedial measures to reduce the energy consumption.

Students shall select real time project/audit with the approval of the guide. The following shall be
considered by the students and guide while auditing.
(1) Building and Utility Data Analysis: The main purpose of this step is to evaluate the characteristics of
the energy systems and the patterns of energy use for the premises considered. The premises
characteristics can be collected from the architectural/ mechanical/electrical drawings and/or from
consultation/discussions with premises operators. The energy use patterns can be obtained from a
compilation of utility bills over a period.
(2) Walk-Through Survey: This step should identify potential energy savings measures. The results of this
stepare important since they determine if the building warrants any further energy auditing work. Some of
the tasks involved in this step are • Identify the customer’s concerns and needs • Check the current
operating and maintenance procedures • Determine the existing operating conditions of major energy use
equipment (lighting,HVAC systems, motors, etc.) • Estimate the occupancy, equipment, and lighting (energy
use density and hours of operation).
(3)Baseline for Building Energy Use: The main purpose of this step is to develop a base-case model that
represents the existing energy use and operating conditions for the building. This model will be used as a
reference to estimate the energy savings due to appropriately selected energy conservation measures.
Evaluation of Energy-Saving Measures: In this step, a list of cost-effective energy conservation measures is
determined using both energy savings and economic analysis.

Based on the ability/abilities of the student/s and recommendations of the mentor, a single discipline or a
multidisciplinary project under ability enhancement can be assigned to an individual student or to a group
havingnot more than 4 students.
Assessment Details (both CIE and SEE)
CIE procedure for project ability enhancement course:
(i) Single discipline: The CIE marks shall be awarded by a committee consisting of the Head of the
concernedDepartment and two senior faculty members of the Department, one of whom shall be the Guide.
The CIE marks awarded for the project work, shall be based on the evaluation of project report, project
presentation skill and question and answer session in the ratio 50:25:25.The marks awarded for the project
reportshall be the same for all the batch mates.
Interdisciplinary: Continuous Internal Evaluation shall be group wise at the college level with the
participation of all the guides of the college.
The CIE marks awarded for the project, shall be based on the evaluation of project report, project
presentation skill and question and answer session in the ratio 50:25:25.The marks awarded for the project
report shall be thesame for all the batch mates.
SEE for project:
(i) Single discipline: Contribution to the Mini-project and the performance of each group member shall be
assessed individually in the semester end examination (SEE) conducted at the department.

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 Template for Practical Course and if AEC is a practical Course Annexure-V

(ii) Interdisciplinary: Contribution to the Mini-project and the performance of each group member shall
be assessed individually in semester end examination (SEE) conducted separately at the departments to
which the student/s belong to.
The SEE marks awarded for the project, shall be based on the evaluation of project report, project
presentation skill and question and answer session in the ratio 50:25:25.The marks awarded for the project
report shall be thesame for all the batch mates.

Course outcomes (Course Skill Set):

At the end of the course the student will be able to:
• Analyze the data collected for energy audit of a building or industry or organization.
• Perform comparative analysis with and without energy audit.
• Analyze the energy saving measures to be considered with economy considerations.
• Analyse in a systematic way, think better, and perform better
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%. The
minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the SEE minimum
passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be deemed to have satisfied the
academic requirements and earned the credits allotted to each subject/ course if the student secures a minimum of
40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.

Continuous Internal Evaluation (CIE):

CIE marks for the practical course are 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment is to be evaluated for conduction with an observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments are designed by the faculty who is
handling the laboratory session and are made known to students at the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
 Total marks scored by the students are scaled down to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct a test of 100 marks after the completion of all the experiments listed in the
syllabus.
 In a test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will carry a
weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
 The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the total CIE marks
scored by the student.
Semester End Evaluation (SEE):
 SEE marks for the practical course are 50 Marks.
 SEE shall be conducted by the two examiners. One from the same institute as an internal examiner
and another from a different institute as an external examiner, appointed by the university.
 The examination schedule and names of examiners are informed to the university before the conduction of
the examination. These practical examinations are to be conducted between the schedule mentioned in the
academic calendar of the University.
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be

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 Template for Practical Course and if AEC is a practical Course Annexure-V

decided jointly by examiners.

 Students can pick one question (experiment) from the questions lot prepared by the examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
 General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result in -60%,
Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and scored marks shall
be scaled down to 50 marks (however, based on course type, rubrics shall be decided by the examiners)
 Change of experiment is allowed only once and 15% of Marks allotted to the procedure part are to be made
zero.
The minimum duration of SEE is 02 hours

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 Template for Practical Course and if AEC is a practical Course Annexure-V

Project on Renewable Energy Sources Semester VI

Course Code BEEL657D CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 02
Examination type (SEE) Practical
Course objectives:
 Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their convenience
and repeat any number of times to understand the concept.
 Provide unhindered access to perform whenever the students wish.
 Vary different parameters to study the behavior of the circuit without the risk of damaging
equipment/ deviceor injuring themselves.
Students can select appropriate projects with the approval of the guide. The projects be
application oriented and can be considered any of the following or any other.
 Automatic solar tracking system.
 Solar-based small traffic control system.
 Solar mobile charger.
 Vertical axis wind turbine system.
 Solar powered Smart irrigation system.
 Renewable energy-based home automation system.
 Domestic illumination using solar.
 Solar grass cutter.
 Solar UPS.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
(1) Analyse in a systematic way, think better, and perform better.

Based on the ability/abilities of the student/s and recommendations of the mentor, a single discipline or a
multidisciplinary project under ability enhancement can be assigned to an individual student or to a group having
not more than 4 students.
Assessment Details (both CIE and SEE)
CIE procedure for project ability enhancement course:
(i) Single discipline: The CIE marks shall be awarded by a committee consisting of the Head of the concerned
Department and two senior faculty members of the Department, one of whom shall be the Guide.
The CIE marks awarded for the project work, shall be based on the evaluation of project report, project
presentation skill and question and answer session in the ratio 50:25:25.The marks awarded for the project report
shall be the same for all the batch mates.
(ii) Interdisciplinary: Continuous Internal Evaluation shall be group wise at the college level with the
participation of all the guides of the college.
The CIE marks awarded for the project, shall be based on the evaluation of project report, project presentation
skill and question and answer session in the ratio 50:25:25.The marks awarded for the project report shall be the
same for all the batch mates.
SEE for project:
(i) Single discipline: Contribution to the Mini-project and the performance of each group member shall be
assessed individually in the semester end examination (SEE) conducted at the department.
(ii) Interdisciplinary: Contribution to the Mini-project and the performance of each group member shall be
assessed individually in semester end examination (SEE) conducted separately at the departments to which the
student/s belong to.
The SEE marks awarded for the project, shall be based on the evaluation of project report, project presentation
skill and question and answer session in the ratio 50:25:25.The marks awarded for the project report shall be the
same for all the batch mates.

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 Template for Practical Course and if AEC is a practical Course Annexure-V

Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%. The
minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the SEE minimum
passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be deemed to have satisfied the
academic requirements and earned the credits allotted to each subject/ course if the student secures a minimum of
40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.

Continuous Internal Evaluation (CIE):

CIE marks for the practical course are 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment is to be evaluated for conduction with an observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments are designed by the faculty who is
handling the laboratory session and are made known to students at the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
 Total marks scored by the students are scaled down to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct a test of 100 marks after the completion of all the experiments listed in the
syllabus.
 In a test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will carry a
weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
 The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the total CIE marks
scored by the student.
Semester End Evaluation (SEE):
 SEE marks for the practical course are 50 Marks.
 SEE shall be conducted by the two examiners. One from the same institute as an internal examiner
and another from a different institute as an external examiner, appointed by the university.
 The examination schedule and names of examiners are informed to the university before the conduction of
the examination. These practical examinations are to be conducted between the schedule mentioned in the
academic calendar of the University.
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointly by examiners.
 Students can pick one question (experiment) from the questions lot prepared by the examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
 General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result in -60%,
Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and scored marks shall
be scaled down to 50 marks (however, based on course type, rubrics shall be decided by the examiners)
 Change of experiment is allowed only once and 15% of Marks allotted to the procedure part are to be made
zero.
The minimum duration of SEE is 02 hours

Suggested Learning Resources:

@#05052024
 Template for Practical Course and if AEC is a practical Course Annexure-V

@#05052024