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Advanced VLSI Design 2021

Advanced VLSI notes for ECE

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shivanshmore0906
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47 views1 page

Advanced VLSI Design 2021

Advanced VLSI notes for ECE

Uploaded by

shivanshmore0906
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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CENTRE FOR DEVELOPMENT OF ADVANCED COMPUTING

A-34, PHASE VIII, INDUSTRIAL AREA, MOHALI


WhatsApp No. 76278 90037 Telephones No. 0172-2237052-55, 6619000
Email: [email protected], [email protected]

ADVANCED VLSI DESIGN: SEMI- CUSTOM TO FULL-CUSTOM


ELIGIBILITY: B.Tech in Electronics & Communication Engineering, Electrical & Electronics Engineering, CSE/IT
or equivalent
Duration: 26 Weeks
COURSE CONTENTS

MODULE 1 : ADVANCED DIGITAL DESIGN


Introduction to basic digital fundamental, Combinatorial Logic Design, Sequential Logic
Design: Counter Design, Advanced Design Issues: metastability, noise margins, skew, timing
considerations, Finite state Machine, Shift Registers, Memories, Case study of digital design
circuits
MODULE 2 : VHDL
VLSI Design flow, Introduction to EDA Tools, Introduction to VHDL, Various Modeling styles
Syntax and Semantics of VHDL, Design Suits- Entities, architecture declaration, VHDL Modeling
of Combinational circuits, Variable and signal types, arrays and attributes, Operators, attributes
and signal assignments, Sequential assignment statements, if, case, loops, wait statement,
assertion statement, Delay Model – Inertial delay Model, Transport delay model; VHDL
Modeling of Sequential circuits, Concurrent assignment statements- when else, with select,
Configurations, Packages. Functions, Procedures, generics, FSM based Modeling of Digital
Circuits, Writing Test Benches
MODULE 3: VERILOG HDL
Data Types, Data objects, Introduction to Verilog HDL, Various Modeling styles, Syntax, Task
and Functions, Specify Block and Timing Checks, Verification and Writing Test Benches
MODULE 4: FULL CUSTOM DESIGN
Introduction to: Full-Custom, Semi-Custom Design, introduction to ASIC design methodology,
ASIC design flow, Basic elements of FPGA, Planning, Placement, routing algorithms, FPGA
Implementation
MODULE 5: SPICE SIMULATION
Analog circuits : Introduction to Analog VLSI Design, CMOS Technology, Device Sizing, Timing
Parameters & Parasitic Extraction, CMOS Design Rules, Basic Analog Building Blocks- Inverter,
NAND, NOR gates, CMOS Differential Amplifier Design, CMOS Common Source/Drain Amplifier
Design, CMOS Current Mirror Design, Introduction to System on Chip (SoC)
MODULE 6: PYTHON FOR LOGIC DESIGN
Introduction to Python, Python based design of basic logic gates
PROJECT WORK

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