OB2201

High Performance Quasi-Resonant PWM Controller

Product Specification

GENERAL DESCRIPTION FEATURES

OB2201 is a high performance flyback Quasi- ■ Multi-Mode Operation:
Resonant (QR) controller optimized to achieve • At Full Loading, Fix Frequency (52KHz)
high efficiency in the universal input range and full CCM Operation @ Low Line and QR Mode
loading range with effective system cost. Operation @ High Line Input
At full loading, the IC operates in fix frequency • Quasi-Resonant Operation at Normal
(52KHz) CCM mode in the low line input range Load
and operates in QR mode in high line input range. • Pulse Frequency Modulation (PFM)
In this way, high efficiency in the universal input Operation at Light Load
range at full loading can be achieved. • Burst Mode at No Load
At normal load condition, it operates in QR mode. ■ Adaptive Frequency Shuffling and Slope
To minimize switching loss, the maximum Compensation @ Fix Frequency CCM Mode
switching frequency in QR mode is internally ■ Programmable OTP with latch Shutdown
limited to 90 KHz. When the loading goes low, it ■ Fixed 4ms Soft-start
operates in PFM mode for high power conversion ■ 2.5us Minimum Off Time
efficiency. When the load is very small, the IC ■ 12.5us Maximum On Time Limit
operates in ‘Extended Burst Mode’ to minimize the ■ 55us Maximum Off Time Limit
standby power loss. As a result, high conversion ■ 90KHz Maximum Frequency Limit
efficiency can be achieved in the whole loading ■ Internal Leading Edge Blanking
range. ■ Output Over Voltage Protection
OB2201 offers comprehensive protection ■ 800mA Peak Current Sink/Source Capability
coverage including Cycle-by-Cycle Current
Limiting (OCP), VCC Under Voltage Lockout
(UVLO), Output Over Voltage Protection (OVP),
Over Temperature Protection (OTP), Over Load APPLICATIONS
Protection (OLP), VCC Over Voltage Protection Offline AC/DC flyback converter for
(VCC OVP), VCC Clamp, and Gate Clamp. ■ Power Adaptor and Open-frame SMPS
OB2201 also features protections against pin ■ Set-Top Box Power Supplies
open and short conditions on selected pins. ■ NB/DVD
OB2201 is offered in SOP-8 and DIP-8 packages.

TYPICAL APPLICATION

AC

OB2201 NTC
1 RI RT 8

2 FB DEM 7

3 CS VCC 6

4 GND GATE 5

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 OB2201
High Performance Quasi-Resonant PWM Controller

GENERAL INFORMATION Package Dissipation Rating

Pin Configuration Package RθJA (℃/W)
The pin map of OB2201 in DIP8 and SOP8 DIP8 90
package is shown as below. SOP8 150

Absolute Maximum Ratings

Parameter Value
VCC Zener Clamp Voltage 29 V
VCC Clamp Continuous
10 mA
Current
RI Input Voltage -0.3 to 7V
FB Input Voltage -0.3 to 7V
CS Input Voltage -0.3 to 7V
DEM Input Voltage -0.7 to 7V
RT Input Voltage -0.3 to 7V
Maximum Operating Junction
150 oC
Temperature TJ
Min/Max Storage Temperature
-55 to 150 oC
Tstg
Ordering Information Lead Temperature (Soldering,
260 oC
Part Number Description 10secs)
OB2201AP 8 Pin DIP, Pb free in Tube Note: Stresses beyond those listed under “absolute
maximum ratings” may cause permanent damage to the device.
OB2201CP 8 Pin SOP, Pb free in Tube These are stress ratings only, functional operation of the
OB2201CPA 8 Pin SOP, Pb free in T&R device at these or any other conditions beyond those indicated
Note: All Devices are offered in Pb-free Package if not under “recommended operating conditions” is not implied.
otherwise noted. Exposure to absolute maximum-rated conditions for extended
periods may affect device reliability.

OB2201 X X X

High Performance Qusi-Resonant Package Package Pb free Packing

PWM controller
A:DIP8 Blank:Normal Blank:Tube
C:SOP8 P:lead-free A: Tape/Reel

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High Performance Quasi-Resonant PWM Controller

Marking Information

SOP8 DIP8

YWW YWW

OB2201CP OB2201AP
s s

Y: Year Code (0-9) Y: Year Code (0-9)

WW: Week Code (1-52) WW: Week Code (1-52)

C: SOP8 A: DIP8

P:lead-free P:lead-free

s: internal code s: internal code

TERMINAL ASSIGNMENTS
Pin Num Pin Name I/O Description
A resistor connected between RI and GND sets the internal frequency
1 RI I and timer. The resistor is recommended to be set in the vicinity of 20K
Ohm.
Feedback input pin. PWM duty cycle is determined by voltage level into
2 FB I
this pin and current-sense signal level at Pin 3.
3 CS I Current sense input.
4 GND P Ground for internal circuitry.
5 GATE O Totem-pole gate drive output for power MOSFET.
6 VCC P Chip DC power supply pin.
Transformer core demagnetization detection pin. This pin is also used for
7 DEM I
output over voltage protection (OVP).
Over Temperature Protection pin. Connected through a NTC resistor to
8 RT I
GND for over temperature latch shutdown.

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BLOCK DIAGRAM

1 RI
VDD
6 UVLO POR Trimmed
Internal reference Soft GATE
Voltage /Current
Driver 5
Reference

Internal S Q
supply
Regulator
Timer,
Logic, R Qb
RT
&
8 OTP Fault
Management

Mode selection

Valley FB
detector
OLP 2

DEM
7 Load OVP

LEB
CS
Adaptive Frequency
Shuffling 3
4mS soft
startup
4 GND

RECOMMENDED OPERATING CONDITION

Symbol Parameter Min Max Unit
VCC VCC Supply Voltage 12 28 V
o
TA Operating Ambient Temperature -20 85 C

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ELECTRICAL CHARACTERISTICS
(TA = 25OC, VCC=16V, RI=20K Ohm if not otherwise noted)
Symbol Parameter Test Conditions Min Typ Max Unit
Supply Voltage Section (VCC Pin)
VCC =UVLO(OFF)-1.5V,
I_VCC_Startup VCC Start up Current - 5 15 uA
Measure current into VCC
Operation Current without
I_VCC_quiet FB=3V - 2.0 4.0 mA
switching
Operation current with FB=3V, 1nF load at
I_VCC_operation - 3.0 5.0 mA
switching GATE
VCC Under Voltage
UVLO(ON) 8.0 9.0 10.0 V
Lockout Enter
VCC Under Voltage
UVLO(OFF) 15 16 17 V
Lockout Exit (Startup)
VCC Over Voltage
OVP(ON) 28 V
Protection Enter
VCC Zener Clamp
VCC_Clamp I_VCC = 5 mA 29 V
Voltage
Feedback Input Section (FB Pin)
AVCS PWM Input Gain ΔVFB /ΔVcs - 3.5 - V/V
VFB_Open FB Open Voltage -- -- V
5.3
FB pin short circuit Short FB pin to GND,
IFB_Short -- 1.5 - mA
current measure current
VTH_BM_on Burst Mode on threshold - 0.8 - V
VTH_BM_off Burst Mode off threshold - 0.7 - V
Power Limiting FB
VTH_PL - 4.4 - V
Threshold Voltage
Power limiting Debounce
TD_PL -- 80 -- ms
Time
ZFB_IN Input Impedance - 4 - Kohm
Current Sense Input Section (CS Pin)
CS Input Leading Edge
T_blanking - 300 - ns
Blanking Time
VTH_OCP_zero_ Internal current limiting 0.41 0.48
Zero duty cycle 0.45 V
ontime threshold 5 5
Internal current limiting
VTH_OCP_max Maximum duty cycle - 0.80 - V
threshold
Flodback mode and burst
VTH_CS_min 0.3 V
mode CS peak
Over Current Detection
TD_OC CL=1nf at GATE, - 100 -- ns
and Control Delay
Demagnetization Detection Section (DEM Pin)
Demagnetization
VTH_DEM comparator threshold -- 75 -- mV
voltage
Negative clamp voltage - -0.7 - V
VDEM_clamp(neg)
VDEM_clamp(pos) Positive clamp voltage - 6.0 - V
Suppression of the
Tsupp transformer ringing at -- 2.5 -- us
start of secondary stroke
Timeout after last demag
TOUT -- 5 -- us
transistion
TDEM_delay Demag propagation delay - 250 - ns

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VTH_OVP Output OVP trigger point - 3.75 - V

Number of subsequent
T_OVP_delay - 4 - Cycle
cycles to be true OVP
Soft Start Section
T_soft Internal soft startup 4 ms
Timer Section
Operating RI resistor
RI_range 14 20 26 Kohm
range
V_RI_open RI open voltage 2.0 V
Burst mode switching
Fburst RI=20K - 22 - KHz
frequency
Frequency high clamp in
Fmax_QR_H RI=20K 82 90 98 KHz
QR mode
Frequency low clamp in
Fmin_QR_L RI=20K 47 52 57 KHz
QR mode
Fmin_QR_L frequency
△F（shuffle）/F -4 +4 %
shuffling range
Ton_max Maximum on time RI=20K 10 12.5 15 us
Toff_max Maximum off time RI=20K 40 55 75 us
PFM mode frequency
KHz/
G_PFM modulation slope versus - 90 -
V
control voltage
Over temperature Protection
I_RT Output current of RT pin, RI=20K 100 uA
Vth_OTP OTP threshold voltage 1.00 1.05 1.10 V
V_RT_open RT pin open voltage 3.5 V
Latch Protection
V_latch_release VCC latch release voltage -- 6.3 -- V
VCC current when latch
Ivdd(latch) VCC=V_latch_release+1V - 45 - uA
off
Gate Drive Output (GATE Pin)
VOL Output Low Level Io = 100 mA (sink) - - 1 V
VOH Output High Level Io = 100 mA (source) 7.5 - - V
Output Clamp Voltage
VG_Clamp VCC=20V - 16.5 - V
Level
T_r Output Rising Time CL = 1nf - 80 - ns
T_f Output Falling Time CL = 1nf - 30 - ns

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CHARACTERIZATION PLOTS
Iop_n vs Vdd Istartup(uA) vs Temperature(℃ )

9.0
5
4 8.0

Istartup(uA)
Ivdd(mA)

3
2 7.0
1
6.0
0
4 12 20 28 5.0
Vdd(V) -40 0 40 80 120
Temperature(℃ )

UVLO(ON)(V) vs Temperature(℃ ) UVLO(OFF)(V) vs Temperature(℃ )

16.20
9.20
UVLO(OFF)(V)
16.05
UVLO(ON)(V)

9.00
15.90
8.80 15.75

8.60 15.60
-40 0 40 80 120 -40 0 40 80 120
Temperature(℃ ) Temperature(℃ )

F_QR_clamp_l(KHz) vs Vth_load_OVP(V) vs
Temperature(℃ ) Temperature(℃ )
F_QR_clamp_l(KHz)

Vth_load_OVP(V)

53.50 3.90

52.00 3.85

50.50 3.80

49.00 3.75
-40 0 40 80 120 -40 0 40 80 120
Temperature(℃ ) Temperature(℃ )

I_RT(uA) vs Temperature(℃ ) Fmin_QR_L vs RI

103.0 90.0
Fmin_QR_L(KHz)

80.0
I_RT(uA)

101.5 70.0
60.0
100.0 50.0
40.0
98.5 30.0
-40 0 40 80 120 12 16 20 24 28 32
Temperature(℃ ) RI(Kohm)

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OPERATION DESCRIPTION
Quasi-Resonant (QR) converter typically features modulation) mode for high power conversion
lower EMI and higher power conversion efficiency efficiency. In PFM mode, the “ON” time in a
compared to conventional hard-switched switching cycle is fixed and the system modulates
converter with a fixed switching frequency. the frequency according to the load conditions.
OB2201 is a highly integrated QR controller Generally, in flyback converter, the decreasing of
optimized for offline flyback converter applications. load results in voltage level decreasing at FB pin.
The built-in advanced energy saving with high The controller monitors the voltage level at FB
level protection features provide cost effective and control the switching frequency. However, the
solutions for energy efficient power supplies. valley switching characteristic is still preserved in
PFM mode. That is, when load decreases, the
z Startup Current and Start up Control system automatically skip more and more valleys
Startup current of OB2201 is designed to be very and the switching frequency is thus reduced. In
low so that VCC could be charged up above such way, a smooth frequency foldback is realized
UVLO(OFF) threshold level and device starts up and high power conversion efficiency is achieved.
quickly. A large value startup resistor can
therefore be used to minimize the power loss yet ■ At zero load or very light load conditions
reliable startup in application. For a typical (VFB<Vth1), the system operates in On-Bright’s
AC/DC adaptor with universal input range design, proprietary “extended burst mode”. In this
a 2MΩ, 1/8 W startup resistor could be used condition, voltage at FB is below burst mode
together with a VCC capacitor to provide a fast threshold level, Vth1. The Gate drive output
startup and yet low power dissipation design switches only when VCC voltage drops below a
solution. preset level or FB input is active to output an on
state. Otherwise the gate drive remains at off
z Operating Current state to minimize the switching loss thus reduce
The operating current of OB2201 is as low as the standby power consumption to the greatest
3mA. Good efficiency is achieved by the low extend. In extended burst mode, the switching
operating current together with extended burst frequency is fixed to 22KHz, in this way, possible
mode control schemes at No/light load conditions. audio noise is eliminated.

z Multi-Mode Operation for High Efficiency

OB2201 is a multi-mode QR controller. The
controller changes the mode of operation
according to FB voltage, which reflects the line
and load conditions.

■ At full load conditions (FB>Vth3, Figure 1), there

are two situations: firstly, if the system input is in
low line input range, the IC operates in fix
frequency (52KHz @ RI=20K Ohm) CCM mode.
Thus, small size transformer can be used with
high power conversion efficiency. Secondly, if the
system input is in high line input range, the IC
operates in QR mode. In this way, high power
conversion efficiency can be achieved in the
universal input range when system is at full
loading conditions. Figure 1

■ At normal operating conditions (Vth2<VFB<Vth3, z Internal frequency and timer setting

Figure 1), the system operates in QR mode. The A resistor connected between RI and GND sets
frequency varies depending on the line voltage the constant current source to charge/discharge
and the load conditions. Therefore, the system the internal cap and thus the internal frequency
may actually work in DCM when 90KHz frequency and timer is determined. It is recommended that
clamping is reached. the resistor is set to be in the vicinity of 20K Ohm.

■ At light load conditions (Vth1<VFB<Vth2, Figure z Demagnetization Detection

1), the system operates in PFM (pulse frequency

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The transformer core demagnetization is detected become rather high without limiting. To meet EMI
by monitoring the voltage activity on the auxiliary limit and to achieve high efficiency at light loading
windings through DEM pin. This voltage features conditions, the maximum switching frequency in
a flyback polarity. A new cycle starts when the OB2201 is internally limited to 90KHz.
power switch is activated. After the on time
(determined by the CS voltage and FB), the z Ringing Suppression Timer
switch is off and the flyback stroke starts. After the A ringing suppression timer Tsupp is implemented
flyback stroke, the drain voltage shows an in OB2201. In normal operation, Tsupp starts
oscillation with a frequency of approximately when CS reaches the feedback voltage FB, the
1 / 2π L p C d , where L p is the primary self external power switch is set to off state. During
Tsupp, the external power switch remains in off
inductance of the transformer and Cd is the state and cannot be turned on gain. The ringing
suppression time is necessary in applications
capacitance on the drain node.
where the transformer has a large leakage
inductance, particularly at low output voltages or
startup. In OB2201, the ringing suppression timer
Tsupp is set to 2.5us internally.

z OCP Compensation
The variation of max output power in QR system
can be rather large if no compensation is provided.
The OCP threshold value is self adjusted lower at
higher AC voltage. This OCP threshold slope
adjustment helps to compensate the increased
output power limit at higher AC voltage. In
OB2201, a proprietary OCP compensation block
is integrated and no external components are
needed. The OCP threshold in OB2201 is a
Figure 2
function of the switching ON time. For the ON time
The typical detection level is fixed at 75mV at the less than 12.5us, the OCP threshold changes
DEM pin. Demagnetization is recognized by linearly from 0.45V to 0.8V. For the ON time larger
detection of a possible “valley” when the voltage than 12.5us, the OCP threshold is clamped to
at DEM is below 75mV in falling edge. DEM 0.8V, as shown in Figure 3. (Note: RI=20K
detection is suppressed during the ringing conditions)
suppression time Tsupp (please refer to “Ringing
Suppression Timer” section).

z Current Sensing and Leading Edge

Blanking
Cycle-by-Cycle current limiting is offered in
OB2201. The switch current is detected by a
sense resistor into the CS pin. An internal leading
edge blanking circuit chops off the sense voltage
spike at initial MOSFET on state, the QR current
limit comparator is disabled and cannot turn off
the external MOSFET during the blanking period.

z Maximum and Minimum On-Time

The minimum on-time of the system is determined
Figure 3
by the LEB time (typical 300ns, RI=20K). The IC
limits the on-time to a maximum time of 12.5uS.
z Adaptive Frequency Shuffling and Slope
z Maximum Frequency Clamp Compensation
According to the QR operation principle, the In OB2201, when the fix frequency CCM mode is
switching frequency is inversely proportional to touched, the frequency shuffling and slope
the output power. Therefore, when the output compensation will be automatically added to the
power decreases, the switching frequency can system to improve the EMI performance and
current loop stability. The magnitude of shuffling

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High Performance Quasi-Resonant PWM Controller

lies in the range of ±4% of 52K Hz. When the on soft start. It resumes operation once the fault
system leaves fix frequency CCM mode, the disappears.
frequency shuffling and slope compensation will
automatically disappear. z Over Temperature Protection with latch
shutdown
z Output Over Voltage Protection (OVP) A NTC resistor in series with a regular resistor
An output over voltage protection (OVP) is should be connected between RT and GND for
implemented by sensing the auxiliary winding temperature sensing and protection. NTC resistor
voltage at DEM pin during the flyback phase. The value becomes lower when the ambient
auxiliary winding voltage is a well-defined replica temperature rises. A resistor between RI and
of the output voltage. The OVP works by sampling GND sets internal reference current and the timer.
the plateau voltage at DEM pin during the flyback The relationship between RT source current and
phase. Internal 2.5us delay (plateau sensing) RI resistor fellows below equation:
guarantees a clean plateau, provided that the 20 K
leakage inductance ringing has been fully damped. I_RT = 100* ( uA ),
RI
Auxiliary
winding
With 20K Ohm RI selected, an internal 100uA
current flows through the NTC resistors. The
OB2201 voltage at RT pin becomes lower at high
temperature. The internal OTP circuit is triggered
R1
and shuts down the MOSFET when the sensed
Plateau
8
Sampling input voltage is lower than 1.05V. OTP is a
R2 DEM
3.75V
latched shutdown.

Lasts for 4 z Pin Floating and Short Protection

subsequent cycles OB2201 provides pin floating protection for RI, CS,
FB, DEM, etc., and RI pin short protection. In
Yes
True OVP cases when the pin are floating or RI pin is
shorted to ground, Gate switching is disabled,
Figure 4
thus protect the power system.
If the sampled plateau voltage exceeds the OVP z External latch trip point
trip level (3.75V), an internal counter starts By externally forcing a level on pin RT (e.g.., with
counting subsequent OVP events. If OVP events a signal coming from a temperature sensor) less
are detected in successive 4 cycles, the controller than 1.05V, OB2201 can be permanently latched-
assumes a true OVP and it enters a latch off off. To resume normal operation, VCC voltage
mode and stops all switching operations. The should go below 6V (typical), which implies to
counter has been added to prevent incorrect OVP unplug the SMPS from the mains.
detection which might occur during ESD or
lightning events. If the output voltage exceeds the z Gate Drive
OVP trip level less than 4 successive cycles, the The Gate pin is connected to the gate of an
internal counter will be cleared and no fault is external QR power switch with 0.8A capability. An
asserted. internal 16.5V clamp is added for MOSFET gate
protection at high VCC voltage. When VCC
z Over Load Protection voltage drops below UVLO(ON), the Gate pin is
When over load (for example, short circuit) occurs, internally pull low to maintain the off state.
the feedback current of photo coupler is below
minimum value, FB pin voltage approaches its
floating pin voltage, then a fault is detected. If this
fault is present for more than 80ms, the controller
enters an auto-recovery soft burst mode. All
pulses are stopped, VCC will drops below UVLO
and the controller will try to restart with the power

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PACKAGE MECHANICAL DATA

8-Pin Plastic DIP

Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 3.710 5.334 0.146 0.21
A1 0.381 0.015
A2 3.175 3.600 0.125 0.142
B 0.350 0.650 0.014 0.026
B1 1.524 (BSC) 0.06 (BSC)
C 0.200 0.360 0.008 0.014
D 9.000 10.160 0.354 0.4
E 6.200 6.600 0.244 0.260
E1 7.320 7.920 0.288 0.312
e 2.540 (BSC) 0.1 (BSC)
L 2.921 3.810 0.115 0.15
E2 8.200 9.525 0.323 0.375

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High Performance Quasi-Resonant PWM Controller

8-Pin Plastic SOP

Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 1.350 1.750 0.053 0.069
A1 0.050 0.250 0.002 0.010
A2 1.250 1.650 0.049 0.065
b 0.310 0.510 0.012 0.020
c 0.170 0.250 0.006 0.010
D 4.700 5.150 0.185 0.203
E 3.800 4.000 0.150 0.157
E1 5.800 6.200 0.228 0.244
e 1.270 (BSC) 0.05 (BSC)
L 0.400 1.270 0.016 0.050
θ 0º 8º 0º 8º

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High Performance Quasi-Resonant PWM Controller

IMPORTANT NOTICE
RIGHT TO MAKE CHANGES
On-Bright Electronics Corp. reserves the right to make corrections, modifications, enhancements,
improvements and other changes to its products and services at any time and to discontinue any product
or service without notice. Customers should obtain the latest relevant information before placing orders
and should verify that such information is current and complete.

WARRANTY INFORMATION
On-Bright Electronics Corp. warrants performance of its hardware products to the specifications
applicable at the time of sale in accordance with its standard warranty. Testing and other quality control
techniques are used to the extent it deems necessary to support this warranty. Except where mandated
by government requirements, testing of all parameters of each product is not necessarily performed.
On-Bright Electronics Corp. assumes no liability for application assistance or customer product design.
Customers are responsible for their products and applications using On-Bright’s components, data sheet
and application notes. To minimize the risks associated with customer products and applications,
customers should provide adequate design and operating safeguards.

LIFE SUPPORT
On-Bright Electronics Corp.’s products are not designed to be used as components in devices intended to
support or sustain human life. On-bright Electronics Corp. will not be held liable for any damages or
claims resulting from the use of its products in medical applications.

MILITARY
On-Bright Electronics Corp.’s products are not designed for use in military applications. On-Bright
Electronics Corp. will not be held liable for any damages or claims resulting from the use of its products in
military applications.

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