WWW - Manaresults.co - In: II B. Tech I Semester Supplementary Examinations, January - 2023 Electronic Devices and Circuits
WWW - Manaresults.co - In: II B. Tech I Semester Supplementary Examinations, January - 2023 Electronic Devices and Circuits
5. a) Draw the input output characteristics of NPN transistor in CE configuration and (7M)
explain.
b) Explain the construction and working of n-channel JFET and draw the drain (7M)
and transfer characteristics.
6. a) What is the need for biasing what are the factors effecting the operating point in BJT? (7M)
b) In a self-bias n-channel JFET, the operating point is to be set at ID = 1.5mA (7M)
and VDS =10 V. The JFET parameters are IDSS = 5 mA and VGS(off) = − 2 V.
Find the values of RS and RD. Given that VDD = 20 V.
7. a) Draw the circuit diagram of common Emitter amplifier and derive expression for (7M)
voltage gain, current gain, input impedance and output admittance using approximate
model.
b) Draw the small signal low frequency h- parameter model of CE, CB, and CC (7M)
configurations and compare voltage gain, current gain, input impedance, output
impedance.
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