INTRODUCTION TO DIGITAL SYSTEMS

SYSC2310
Dr. Mostafa Taha

Lab 5: Designing an ALU using Multiplexers.

and Latches and Flip-Flops using Digital Gates

Objectives
- Design and implement an Arithmetic Logic Unit (ALU) using multiplexers.
- Build latches using digital gates.
- Build a 4-bit register using FFs.
- Gain practical experience in combinational and sequential logic design.

Relation to course outcomes

The work in this lab is related to the following course outcomes:
- Understand the basic building blocks of digital systems.
- Apply analysis and design skills to implement combinational and sequential logic circuits.

Preparation
1. Create a folder named 'sysc2310lab/lab5' to save your work during this lab.
2. Review the relevant lecture material on multiplexers, ALUs, latches, and flip-flops.

Experiment 1: Designing an ALU using Multiplexers

Objective
Design and implement a simple Arithmetic Logic Unit (ALU) using multiplexers. ALU stands for
Arithmetic and Logical Unit, it means a circuit that can perform arithmetic operations such as
addition and logical operations such as AND, OR, XOR operations. Every microprocessor has
an ALU in its heart which performs these operations. The purpose of this exercise is to design
a simple ALU that can perform 8 different operations on two inputs A0 and B0.
The following circuit shows a 1-bit ALU (inputs are 1 bits). The first three squares represent
adder, subtractor and multiplier.
You can select a decoder from the library as shown below:

Figure 1:Finding Multiplexer

1
The multiplexer characteristics can be modified for more or less inputs:

Figure 2: Multiplexer attributes

Include the pre-lab and the simulation results in your report.

Figure 3: ALU circuit

Procedure
1. Create a new circuit in the simulation software.
2. Add the necessary components, such as multiplexers, input registers, and output registers.
3. Connect the components according to the ALU design specifications.

2
4. Simulate the circuit and verify the correctness of the ALU's functionality.
5. Document your design, circuit diagram, and simulation results in a report.
6. Change the ALU design and make it a 4-bit ALU by changing the data bit of all components
attributes to 4. Below shows an example for the adder. You must also change the inputs and
output sizes.

Figure 4: Data bit width for the Adder

7. Test the new 4-bit ALU for two inputs: 1100 and 0110. Test the circuit for all 8 possible
selector lines and examine the output. Modify the circuit to see the carry out for an addition
operation.

Experiment 2: Storage Elements

Objective
Latch and FFs are the primary building blocks of sequential circuits. They act like a storage
element that memorizes the state of the circuit. In this experiment, you will build latches and
flip-flops using digital gates and observe their behavior.

Experiment 2.1:
1. Create a new circuit in the simulation software.
2. Build the following Latch in Logisim. Connect Q and Q’ to two LEDs.

Figure 5: S-R latch using NAND gates

3. Test the latch's behavior of the Latch by applying the following sequence of inputs and fill
out the table for your lab report.

S R Q Q’
1 0
1 1
0 1
1 1
0 0
3
Experiment 2.2: Building a 4-bit Register

Flip-flops (FFs) are sequential logic elements used to store and synchronize data in digital
circuits. They are composed of latches and operate based on a clock signal, typically a square
wave signal. The clock signal ensures that the operations of the FFs are synchronized and
occur at specific points in time.
Each flip-flop is capable of storing 1 bit of information. The most common type of flip-flop is the
D flip-flop (D-FF). With a D-FF, when an input is applied to the flip-flop, it appears at the output
after one complete clock period. For instance, if the clock frequency is set to 1 Hz, it would
take 1 second for the input to be reflected in the output.
In this experiment, we will explore the concept of registers, which are storage elements
capable of storing multiple bits of information. Specifically, we will build a 4-bit register using
ready to use D-FF building block available on Logisim. The register will enable us to store and
manipulate data in 4-bit chunks, providing a higher level of storage capacity compared to a
single bit.

1- Build the following circuit using D-FFs. Select D-FF from the memory section of the li-
brary. To find a clock source, got the wiring section of the library.

Figure 6: 4-bit register made of D-FFs

Figure 7: Finding Clock and D-FF

2- Enable simulation.
3- Activate tick simulation (see figure 8).
4
 Figure 8: Enabling clock
4- Go to Simulate> Tick Frequency and set the frequency to 0.5 Hz. Make changes to the
input of the circuit and record your observation.
5- This circuit is called a 4-bit register.

Questions

1- What are the differences between a latch and FF?

2- How does a D Flip-Flop (D-FF) store and propagate the input data based on the clock
signal?
3- What does it mean a FF is edge-triggered?
4- How is a D Flip-Flop (D-FF) different from other types of Flip-Flops?
5- Which FF would you prefer to use for designing circuits? Why?

5
Lab Report and Deliverables:
In the lab:
• You must attend the lab to get its mark, make sure to sign your name before leaving the
lab.
• In order to get full credit, complete all exercises and be prepared to answer questions
asked by the TA during the lab.
• Be ready to show to your TA all circuit files as well as all simulation files.
What to include in the report?
• Review the Rubric given Brightspace.
• Your report should have the following sections.
1- Screenshot of the circuit design on Logisim
2- Logging file that shows the inputs and outputs for the circuit
3- Answer any questions that may have been asked in the lab manual.
Lab report format
• A single pdf file that contains all above.
• Include a text with your name, student ID, lab number and date into your circuits.

Note: version 1.3, This manual was revised by Dr. Rose Gomar in June 2024.