Digital Logic

0907231

Adapted from Dr. Bassam Kahhaleh’ Slides by Prof. Iyad Jafar

 Chapter 4
Combinational Logic
Analysis and Design
Outline
★ Introduction

★ Analysis of Combinational Logic Circuits

★ Design of Combinational Logic Circuits

2
Introduction
Combinational Logic Circuits
★ Output is function of input only
i.e. no feedback

Combinational
n inputs • • m outputs
•
• Circuits •
•

🡺
When input changes, output may change (after a delay)

4
 Analysis of
Combinational Logic
 Analysis of Combinational Logic Circuits

★ Analysis
● Given a circuit, find out its function(s)
● Function(s) may be expressed as:
♦ Boolean expression
♦ Truth table

6
Example 1
★ Boolean Expression Approach

ABC
A+B+C
AB'C'+A'BC'+A'B'C

(A’+B’)(A’+C’)(B’+C’)

AB+AC+BC

F1 = AB'C'+A'BC'+A'B'C+ABC
F2 = AB+AC+BC 7
Example 1
★ Truth Table Approach A B C F1 F2
=0 0 0 0 0 0 0
0
=0
=0
0
=0
=0 0
=0 0 1
=0
=0 0
=0
=0 0 0
=0
=0

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Example 1
★ Truth Table Approach A B C F1 F2
=0 0 0 0 0 0 0
=0 1
0 0 1 1 0
=1
=0 1
=0 1
=1
0 1
=0
=0
0
=0
=1 0 0
=0
=1

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Example 1
★ Truth Table Approach A B C F1 F2
=0 0 0 0 0 0 0
=1 1
0 0 1 1 0
=0
1 0 1 0 1 0
=0
=1 1
=0 0 1
=0
=1 0
=0
=0 0 0
=1
=0

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Example 1
★ Truth Table Approach A B C F1 F2
=0 0 0 0 0 0 0
=1 0
0 0 1 1 0
=1
1 0 1 0 1 0
=0
=1 0 0 1 1 0 1
=1 0
0
=0
=1 0
=0
=1 1 1
=1
=1

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Example 1
★ Truth Table Approach A B C F1 F2
=1 0 0 0 0 0 0
=0 1
0 0 1 1 0
=0
1 0 1 0 1 0
=1
=0 1 0 1 1 0 1
=0 0 1 0
1 1 0 0
=1
=0 0
=1
=0 0 0
=0
=0

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Example 1
★ Truth Table Approach A B C F1 F2
=1 0 0 0 0 0 0
=0 0
0 0 1 1 0
=1
1 0 1 0 1 0
=1
=0 0 0 1 1 0 1
=1 0 0 1 0 0 1 0
=1
=0 1 0 1 0 1
1
=1
=1 0 1
=0
=1

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Example 1
★ Truth Table Approach A B C F1 F2
=1 0 0 0 0 0
0 0
=1 0 0 1 1 0
=0
0 1 0 1 0
=1 1
=1 0 0 1 1 0 1
=0
1 0 1 0 0 1 0
=1
=1 1 0 1 0 1
0 1 1 0 0 1
=1
=0
0 1
=1
=0

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Example 1
★ Truth Table Approach A B C F1 F2
=1 1 0 0 0 0 0
=1 1
0 0 1 1 0
=1
1 0 1 0 1 0
=1
=1 0 0 1 1 0 1
=1
1 0 1 0 0 1 0
=1
=1 1 0 1 0 1
1 1 1 0 0 1
=1 1
=1
1
1 1 1 1 1
=1
=1
B B
0 1 0 1 0 0 1 0
A 1 0 1 0 A 0 1 1 1
C C

F1=AB'C'+A'BC'+A'B'C+ABC F2=AB+AC+BC
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 Design of
Combinational Logic
Design of Combinational Logic Circuits

★ Design
● Given a desired function(s), determine the
circuit

•
•
•
? •
•
•

● Function(s) may be expressed as:

♦ Boolean function
♦ Truth table
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Design Procedure
★ Given a problem statement
1. Specification
♦ Write description of the circuit
♦ Determine the number of inputs and outputs in the circuit
2. Formulation
♦ Determine the relation between the inputs and the outputs
♦ Derive the truth table
3. Optimization
♦ Simplify the Boolean expression for each output
(algebra/k-map)
4. Technology Mapping (AOI, NOR, NAND)
5. Verify your design
6. Produce the required circuit
18
Example 2
★ Design a logic circuit that has 3 inputs; x, y, and z,
and one output; F(x,y,z). The output is 1 if the
number of 1s in the input is greater than the
number of 0s. Otherwise, the output is zero.
(Majority Circuit)
Number of inputs = 3 🡺 x, y, z

Number of outputs = 1 🡺 F(x,y,z)

x
y ? F(x,y,z)

z
19
Example 2 - continued
y

x y z F 0 0 1 0
0 0 0 0 0 x 0 1 1 1
1 0 0 1 0 z
2 0 1 0 0 F(x,y,z) = xy + xz + yz
3 0 1 1 1
4 1 0 0 0
5 1 0 1 1
6 1 1 0 1
7 1 1 1 1

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Example 2 - continued
★ Technology mapping using
NAND gates

X
Y

X
Z

Y
Z

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Example 3
★ Design a logic circuit that compares two 2-bit
numbers ; A and B, and outputs two signals; O1
and O0 such that

00, A==B and both are even

O1O0 = 01, A < B
10, A > B
11, A==B and both are odd

Number of inputs = 4 🡺 A1, A0, B1, B0 A1

A0
B1 ?
B0

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Example 3 - Continued
A1 A0 B1 B0 O1 O0
0 0 0 0 0 0 00, A==B and both are even
0 0 0 1 0 1 01, A < B
O1O0 =
0 0 1 0 0 1 10, A > B
0 0 1 1 0 1 11, A==B and both are odd
0 1 0 0 1 0
0 1 0 1 1 1
0 1 1 0 0 1
0 1 1 1 0 1
1 0 0 0 1 0
1 0 0 1 1 0
1 0 1 0 0 0
1 0 1 1 0 1
1 1 0 0 1 0
1 1 0 1 1 0
1 1 1 0 1 0
1 1 1 1 1 1 23
Example 3 - Continued
A1 A0 B1 B0 O1 O0 O1 B1
0 0 0 0 0 0
0 0 0 1 0 1
1 1
0 0 1 0 0 1 A0
0 0 1 1 0 1 1 1 1 1
A1
0 1 0 0 1 0 1 1
0 1 0 1 1 1
B0
0 1 1 0 0 1
0 1 1 1 0 1 O 1 = A 1B 1 + A 0B 1 + A 1A 0
1 0 0 0 1 0
1 0 0 1 1 0
1 0 1 0 0 0
1 0 1 1 0 1
1 1 0 0 1 0
1 1 0 1 1 0
1 1 1 0 1 0
1 1 1 1 1 1 24
Example 3 - Continued
A1 A0 B1 B0 O1 O0 O0 B1
0 0 0 0 0 0 1 1 1
0 0 0 1 0 1
0 0 1 0 0 1
1 1 1
A0
0 0 1 1 0 1 1
A1
0 1 0 0 1 0 1
0 1 0 1 1 1
0 1 1 0
B0
0 1
0 1 1 1 0 1
O 0 = A 1B 0 + A 1B 1 + B 1B 0
1 0 0 0 1 0
1 0 0 1 1 0
1 0 1 0 0 0
1 0 1 1 0 1
1 1 0 0 1 0
1 1 0 1 1 0
1 1 1 0 1 0
1 1 1 1 1 1 25
Example 3 - Continued

A1
A0
B1
B0

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Example 3 - continued
★ Technology mapping using
NAND gates

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Example 4
★ Design a logic circuit that converts a single BCD
digit into Excess-3 code
Single BCD digit 🡺 values [0,9] 🡺 4 bits
Number of inputs = 4 🡺 A, B, C, D

Excess-3 = BCD + 3 🡺 Values [3,12] 🡺 4 bits

Number of outputs = 4 🡺 w, x, y, z

A w
B
C ? x
y
D z
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Example 4 - Continued
★ BCD-to-Excess3 Converter Excess-3 = BCD + 3
A B C D w x y z
C C
0 0 0 0 0 0 1 1
0 0 0 1 0 1 0 0 1 1 1
0 0 1 0 0 1 0 1 1 1 1 1
x x x x
B x x x x
B
0 0 1 1 0 1 1 0 A A
1 1 x x 1 x x
0 1 0 0 0 1 1 1
0 1 0 1 1 0 0 0
D D
0 1 1 0 1 0 0 1 w = A+BC+BD x = B’C+B’D+BC’D’
0 1 1 1 1 0 1 0
1 0 0 0 1 0 1 1 C C
1 0 0 1 1 1 0 0 1 1 1 1
1 0 1 0 x x x x 1 1 1 1
1 0 1 1 x x x x x x x x
B x x x x
B
1 1 0 0 x x x x A 1 x x
A 1 x x
1 1 0 1 x x x x D D
1 1 1 0 x x x x
1 1 1 1 x x x x y = C’D’+CD z = D’ 29
Example 4 - Continued
★ BCD-to-Excess3 Converter
A B C D w x y z
0 0 0 0 0 0 1 1
0 0 0 1 0 1 0 0
0 0 1 0 0 1 0 1
0 0 1 1 0 1 1 0
0 1 0 0 0 1 1 1
0 1 0 1 1 0 0 0
0 1 1 0 1 0 0 1
0 1 1 1 1 0 1 0
1 0 0 0 1 0 1 1
1 0 0 1 1 1 0 0
1 0 1 0 x x x x
1 0 1 1 x x x x
1 1 0 0 x x x x
1 1 0 1 x x x x w = A + B(C+D) y = C’D’ + CD
1 1 1 0 x x x x x = B’(C+D) + B(C+D)’ z = D’
1 1 1 1 x x x x 30
Example 5- Seven-Segment Decoder Example
Design a BCD to 7-segment decoder.

What is a 7-Segment Display?

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Example 5 - Seven-Segment Decoder Example

Don’t
care are
marked
with X

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Example 5 - Seven-Segment Decoder Example
★ Find the simplified expressions for a,b,c,d,e,f,g in
the 7-segments display.
● a(W,X,Y,Z) = W+Y+XZ+X’Z’
● b(W,X,Y,Z) =
● c(W,X,Y,Z) =
● d(W,X,Y,Z) =
● e (W,X,Y,Z) = YZ’+X’Z’
● f (W,X,Y,Z) =
● g(W,X,Y,Z) =

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Exercise
★ Modify your design of the BCD to 7-segment decoder such
that it can display the hexadecimal digits 0 through F

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Exercises
Suggested Problems (5th Edition)
★ 4-1
★ 4-2
★ 4-3
★ 4-7
★ 4-15
★ 4-27
★ 4-28

36
Exercises
Obtain the simplified Boolean expressions for output F and G in
terms of the input variables in the following circuit.

37
Exercises
Design a combinational circuit with three inputs, x, y, and z,
and three outputs, A, B, and C. When the binary input is 0, 1, 2,
or 3, the binary output is one greater than the input. When the
binary input is 4, 5, 6, or 7, the binary output is one less than
the input.

38
Exercises
Design a 4-bit combinational circuit incrementer (A circuit
that adds one to a 4-bit binary number).

39