Diploma in Embedded and VLSI Design and Verification

Placement Oriented Program

Duration – 300 Hrs
Eligibility – B.E, B. Tech, M.E, M. Tech.

Modules Project stream:

• Application development based on Data Structure (Eg: Flood
Live Sessions : fund releasing data, cyber management systems, Bank
Programming management system, contact management system)
• Electronics and Embedded Hardware • Embedded Project development using wired/wireless
Familiarization technology such as GPS, GSM, BLE, Wi-Fi, and sensors
• Problem Solving Using C following MISRA • Design and Simulation of Digital Controller/CPU
Guidelines Core/Protocols such as UART, SPI, I2C, AXI4
• Data Structures and Algorithms • Design, Simulation, Implementation and Verification of Digital
• Oops with C++ Controllers, ALU Cores and protocols such as UART, SPI, I2C,
• Linux commands, Shell Scripting, System AXI4 on FPGA Board.
Programming • SV Verification of Digital Controller/CPU Core/Protocols such
Embedded Specialization as UART, SPI, I2C, AXI4
• ARM Bare Metal / CORTEX M4 Programming using • UVM Verification of Digital Controller/CPU Core/Protocols
Embedded C such as UART, SPI, I2C, AXI4
• Embedded Protocols – UART, I2C, SPI
VLSI Design Specialization Platform:
• RTL coding with Verilog • Ubuntu (Linux OS, with gcc compiler)
• FPGA Design and TCL Scripting • Lpc1768 development board
• System Verilog Programming • Keil Micro vision , Flash Magic
• UVM (Universal Verification Method) • XILINX ISE/VIVADO
• Questasim/EDA Playground
• Spartan 6 FPGA Board
• Artix7 FPGA Board

Programming
Electronics and Embedded Hardware Familiarization – 05 Days
Analog Electronics: Passive and Active
Circuit analysis using KCL and KVL Diode, Transistor and Op-amp Circuits
components
Digital Electronics: Combinational circuits Sequential circuits design: Flipflops,
Microprocessors, Microcontrollers,
design: Address, Mux, Encoder, Decoder Registers, Counters
Basic Embedded System Architecture Standard Interfaces Understanding schematics/datasheet
Fundamentals of Booting for Embedded
Electrostatic Discharge Essentials: Causes Techniques to improve embedded
Processors: Host and Target Development
of ESD and Prevention of ESD system security
Setups

CRANES VARSITY (A Division of CSIL) St.Marks Road, Bangalore Ph: 080-6764 4800/4848 ( www.cranesvarsity.com )
Problem solving Using C following MISRA Guidelines 10 Days
Introduction to C: Simple C program
Operators with precedence and
structure, Literals, constants, variables and Control flow statements with Examples
associativity
data types
Modular Programming using functions Working with multiple files Storage Class Specifiers
Arrays and Strings Preprocessor directives Pointer

Dynamic Memory Allocation Structures and Bit Fields Unions

Recursion Command Line Arguments typedef, enums

Conditional Compilation Cross Compiler Buiding an Executable

Coding standards/guidelines for secure
Stratup code, linker script and their use Object file and map file
and safe coding
Debugging and Tracing Memory Profiling and analysis
Data Structures and Algorithms 05 Days
Introduction to Data Structures Stacks and queus LinkedList

Stack Implementation using array Queue Implementation using array Tree: Binay Search Tree

Code Optimization GDB Debugger Splint

G Coverage tool G Profiling Valgrind software

Oops with C++ - 10 days
Introduction to C++, Structure of a C++
Procedural overview of C++ Objected Oriented Approach in C++
program
Constructor and Destructor Friends and Operators overloading Generic Programming

Generalization Run time polymorphism Exception Handling

C++ Library Features Inheritance Runtime Polymorphism

Call Back Functions Code Optimization and Profiling

Linux Commands – 10 days
Introduction to the operating system Process management subsystems File management subsystems

Memory management systems Shell Introduction to Linux-os

Linux file management system Linux process management system Signals

Pipes Message queues Shared memory

Semaphores Threads Mutex

Embedded Specialization
ARM Bare Metal Programming using Embedded C – 17 days
GPIO programming with LED,Swith and
ARM7TDMI Architecture and features LPC21798 Features
Buzzer

CRANES VARSITY (A Division of CSIL) St.Marks Road, Bangalore Ph: 080-6764 4800/4848 ( www.cranesvarsity.com )
16 X 2 LCD programming 4 X 4 KEYPAD programming ADC programming
Timer programming PWM programming RTC and WDT programming
PLL programming VIC (Interrupt) programming
Embedded Protocol - 03 days
UART programming SPI programming I2C Programming
VLSI Design Specialization
RTL coding with Verilog - 10 days
Designing Methodology Top-Down Methodology Bottom-Up Methodology
Verilog data types Verilog Scalar /Vector Verilog Arrays
GATE LEVEL MODELING
Gate Instantiate Design RTL From logic Diagram Logic Gate primitive
Delay in Gate level Design Learning about different types of Data Flow modeling
counters, register
Continuous Assignment statement Synchronous Finite State Machine
Design.
BEHAVIORAL MODELING
Structured procedural Statement: Always Blocking Statement, Non-Blocking Timing Control Statement: Delay based
Statement, Procedural Statement statement timing control, Event Based timing
control
Conditional Statement: If..else statement, Loop: While, do while, for, for each, Block statement, Sequential block,
case statement: casex, casez forever, repeat. Parallel Block
DESIGN OF DIGITAL CIRCUITS
FSM: Mealy machine, Moore machine Flip flop Counters, PWM
Useful Of Modeling Technique All combinational and sequential circuit Delay Control Statement: Intra delay,
using Verilog inter delay, rise delay, fall delay
Procedural continuous, Assignment Design Statement, force statement, CRC checking, UART
Statement Release statement
FPGA Design and TCL Scripting - 05 days
Introduction to FPGA FPGA Architecture CLB, I/O blocks
CPLD, FPGA, FPGA Working, Design Flow Interconnects, Tool Installation working Designing basic FPGS example
(Adder, Subtractor, Counter)
Design and Implementation of projects on Implementation of Counter - up counter, UART, SPI, I2C, AXI4 on FPGA
FPAG down counter, up down counter, mod
counter, Johnson counter, ring counter
Introduction, Running TCL, Simple Text While loop, For and incr, proc, Variable String Subcommands - length index
Output, assigning values to variables, expr, scope - global and upvar, TCL List. range, String comparisons
Compute, Put,
Associative Arrays, Array - Iterating and Invoking Subprocesses from TCL - exec, Modularization – source, building
use in procedures, Dictionaries, File open, Info. reusable libraries - packages and
Access, Information about Files - file, glob namespaces, Creating Commands - eval
UART: Universal Asynchronous Receiver SPI: Serial Peripheral Interface. I2C: Inter-Integrated Circuit.,AXI4
and Transmitter protocol

CRANES VARSITY (A Division of CSIL) St.Marks Road, Bangalore Ph: 080-6764 4800/4848 ( www.cranesvarsity.com )
 VLSI Verification Specialization
Design and Verification using System Verilog- 15 Days
Introduction of System Verilog, Need of Environment of Verification Data types -2satete, 4 state, enum ,
system Verilog string, structure, union, class
Array- Fixed array- packed and unpacked Dynamic Array, Associative array Queues
array
Process: - Fork-join, Fork-join any, Fork- OOPS- Inheritance, Polymorphism, Data Class- Deep copy, shallow copy,
join none, Wait-fork hiding, Encapsulation Overriding class, Coverage: Functional
Coverage, Cross coverage.
Explanation of assertion with example Explanation of coverage with example Working on verification environment
Verification using UVM - 10 Days
Introduction UVM: why UVM UVM Objects: Base classes UVM Macros, UVM Base Class Methods

UVM Phases, UVM Config DB, UVM UVM TLM Ports, Analysis, Fifo, UVM UVM test Bench Components and UVM
Reporting Mechanism, socket concept, UVM Callbacks test Benches.

CRANES VARSITY (A Division of CSIL) St.Marks Road, Bangalore Ph: 080-6764 4800/4848 ( www.cranesvarsity.com )