Analog 3
Analog 3
then S (1+ )
This shows S =" 51.
that the
collector current
temperature).
the stability factor.
Therefore, for this rent changes
chan8
Or Current highly dependent
is
51 times when there is achange in reverse
us Ico (which depenas on
10-4 configuration,
configuration, bias on
bias stabilisation is very important to imprOVe
staDIsa
From the DIFFERENT METHODS
point of view FOR
VBB and Vcc)
bias
ias for aa in
the
of TRANSISTOR
the outputsimplicity and economy, BIASING
ansistor output
transistor are
are as
circuit (i.e., Vc
Circuit
as foll
only one source of supply (instead
of two
(1) Base follows: Vcc) is used. Some of the methods used for
resistor method.
(2) Collector proviaing8
to base
(3) Base bias bias.
(4) Voltage with collector and emitter
lhe basic divider bias. feedbacks.
(1.e., collector
.e, principle involved in all the above
collector current) ffrom Vccin zero methods is to obtain the
signal conditions. The value of required
base
n such a
way that the voltage current
germanium transistor and 0-7 between collector
ioaa
collector and emitter should not fall beloW Oo for
volt for silicon transistor.
10.5 BASE RESISTOR METHOD
gure (L0:1) shows an NPN
this method, a transistor connected in CE
high resistance RR is configuration with resistor biased. In
base of the
transistor. Here, it shouldconnected between positive terminal of
be remembered that if the suPpiy C d
connected between transistor is PNP,
negative terminal of then ^B
required zero signal base current flows supply Vcc and base of the transistor. Here, tne
base-enmitter junction is forward biased through Rß and is provided by Vcc. In fig(10-1), the
selection of Rg, the because the base is positive w.r.t. emitter.
required zero signal base current (and hence By proper a
B
E VCE
V BE
E
G
Considerirng the closed circuit ABEGA and applying the Kirchhoff's voltage law, we have
IB RB +
VBE =
Vcc
IB RB =
Vcc -
VBE
Rg Vcc VBE .(1)
IB
Further .2)
Rg =Vcc-VBE)B
Ic 3
value of Rg can be
The value of VBE can be seen from the transistor manual. Using eq. (3), the
zlulated. As VBE is generally very small as compared to Vcc, hence
B BVcc .4)
Ic
this method is sometimes called as
From eq. (4), the value of Rg can be found directly. Hence,
fixed-bias method.
Stability factor S
The stability factor S is given by
S
(1B)
1 - p (dlg/dlc)
*
is independent of collector current Ic. So, the
In base resistor method, the base
current Ig
stability factor S is givern by
.5)
S (1 +P)
changes 101 times as much asany change in Ico
101. This shows that Ic he value of
of S is the
the highest
100, then S =
hence upon
temperature. The
lco and
c ,lcis very dependent
i s very upon
poor stability.
Ihis is the main disadvantage of
that c the circuit has very fact this method is rarely used,
d n be obtained. Hence Due to this
base Esistor
rer method o r fixed bias
method.
ri
or Ip Rg = Vcc - VBE - I c RL
RD
RB Vcc - VBEIc RL
TB
10-8 Eloctronic Devicos and Circuits
S
1 (dl / dl)
.5)
R,R
This value is smaller than (1 () wliich in oblained lor tinel bian
cireuit. 'ThuN, there in an
improvement in the Mability
The circuit of fiy, (10.4) oviulei
paliv lemlhu'k. This reduren the gain ol he
amplifier.So the in ead itability ol w collrtor loba blari ctrruil a odbtainedat the
a.c, voltage gan cost ol
10-8 SELF BIAS OR EMITTER BIAS
A erv commonly used biasing
(VOLTAGE DIVIDER BIAS)
arrangement is self-bias or emitter bias. The circuit
isshown in tig. (10.9). This is also known as universal bias arrangernent
hwOresistances Ri and R2 are connected across stabilization circuit. In this method
emitter resistance RE provides stabilization. supply voltage Vcc and provide biasing 1ne
The name voltage divider is used due to the
tac
P+Vcc
R
Ic
B VCE
VBE E
VB
VE
r e s i s t a n c e
R must be
The
10-14 a c r o s s
Vcc. the junction
Since
divider
junction. The n e t
potential network.
form a emitter
R2
resistors Ri and R2 r e v e r s e - b i a s
the through Ri- RE.
the supply
across
that
direction so as to
obtained
from
d.c. voltage
drop
a m i n u s the
drop in voltage is follows:
equal to Vh
as
the base is explained
be c u r r e n t in
forward-biased,
e m i t t e r junction
a c r o s s the
stability may in Now, the lc.
forward bias
operating
point a rise current
in the a rise
in lcoie., the base
improvement causcs
have
Applying KVL to the base circuit, we
V2 VBE + VE = =
VBE + I RE
or V2 = VBE + Ic RE
Ic V2-VBE 3)
RE
Here, Ic is almost independent of transistor parameters and hence good stabilization is
ensured.
The collector emitter voltage VcE can be calculated as follows:
Applying KVL to the collector side we have
Vcc Ic RI + VcE +
I RE
=
Ic R. + VCE + Ic RE
Vcr Vcc Ic (RL + RE)
.(4)