nd

Unit-2
Central Processing
Unit
General Register Organization-A set of flip-
flops forms a register. A register is a unique high-speed
storage area in the CPU. They include combinational
circuits that implement data processing. The information
is always defined in a register before processing. The
registers speed up the implementation of programs.

Registers implement two important functions in the CPU

operation are as follows –

1- It can support a temporary storage location for data.

This supports the directly implementing programs to
have fast access to the data if required.
2- It can save the status of the CPU and data about the
directly implementing program.

The CPU bus system is managed by the control unit. The

control unit explicit the data flow through the ALU by
choosing the function of the ALU and components of the
system.
Consider R1 ← R2 + R3, the following are the functions
implemented within the CPU −
1- MUX A Selector (SELA) − It can place R2 into bus A.
2- MUX B Selector (SELB) − It can place R3 into bus B.
3- ALU Operation Selector (OPR) − It can select the
arithmetic addition (ADD).
4- Decoder Destination Selector (SELD) − It can
transfers the result into R1.
Stack organization –
1-Stack organization is a storage structure that stores
information such a way that the last item stored is the
first item retrieved.
2- It is based on the principle of LIFO (Last-In-First-Out).
3The stack in digital computers is a group of memory
locations with a 4-register that holds the address of top of
element.
4-This register that holds the address of the top of the
stack is called stack pointer.
5-In stack organization, ALU operation is performed on
stack data that is both the operands are always required
on the stack.
6-After manipulation, the result in placed in the stack.

The main two operations that are performed on the

operators of the stack are:

Push –insert an item on the of the stack.

SP  SP+1 (Increment stack

pointer)
M [SP]  DR (write item on the top
of stack)
IF (SP=0)THEN (FULL 1) (check id status is full)
EMTY  0 (Mark stack not
empty)
POP – Delete an item from the of the stack.

DR  M [SP] (Read item from top

of stack)
SP  SP-1 (Decrement stack
pointer)
IF(SP=0)THEN (EMPTY 1) (check if status is empty)
FULL  0 (Mark the stack not full)

Implementation of the stack-

In the digital computer, stack can be implemented in two
ways:

1- Register stack 2- Memory stack

Memory stack-
A stack can be implemented by a random access memory
attached to a cpu. A contiguous block of the location is
reserved in main memory(or virtual memory)fot the
stack.most of the time, the block is partially field with
stack element and the remainder is available for the stack
growth.

Addresses are needed for the proper

operation.
Stack pointer:
Contains the addressn of the top of the stack. If an item is
added to or deleted from the stack, the pointer is
incremented or decremented to conains the address of the
new top of the stack.

Stack Base:
Contains the address of the bottom location in the
reserved block. If an attempt is made to POP operation
when the stack is empty, an error is reported.

Stack limit:
Contains the address of the other end of the reserved
block.if an attempt is made to PUSH Operation when the
block is fully utilzed for the stack, an error is reported.

Instruction formats-
An instrcution set is a collection of all the instruction a
CPU can execute. Each instruction consists of several
elements. An instrcution element is a unit of information
required by the CPU for execution.
 Opcode Reference to Opcode Reference to
operands

4 bits 6 bits 6 bits

Types of instruction format:

There are 4 types of instrction format.

1)Three-Address Instruction:-
Machines with three-address instruction formats can
format as of use each address field to specify either a
processor register or a memory operand. Such an
instruction contains three address fields, each providing
the address of one of the three operands- X, Y, and Z. The
operation field of the instruction specifies that addition is
to be performed. This three address instruction can be
represented symbolically as:

ADD X. Y. Z
The general form of three-address instruction is as below:

Operation-Code, Sourcel 1 , Source 2,

Destination

For example- Evaluates X = (A+B) * (C+ D)

ADD R1 ,A ,B R1M [A]+M [B]

ADD R2, C ,D R2  M [C]+M [D]

MUL X ,R1 ,R2 R3 M[X]-R1 R2

2) Two-Address Instructions-
Two-address instructions are the moser common
commercial machines. Here again each address field can
specify either a proce register or a memory word.

The general form of two-address instruction is as below:

ADD A , B

Operation-Code , Source ,
Destination

For example- Evaluates X = (A+B) * (C+ D)

MOV R1 ,A R1  M[A]

ADD R1 ,B R1  R1 + M[B]

MOV R2 ,C R2  M[C]

ADD R2 ,D R2  R2+ M[D]

MUL R1 , R2 R1  R1 * R2

MOV X, R1 M[X] R1

3) One-Address Instrcution- One address

machines use an implied accumulator (AC) register for all
data manipulation. For multiplication and division there is
a need for a second register. However, here we will
neglect the second register and assume that the AC
contain the result of all operations.
The general form of one-address instruction is as below:
Operation-Code
Source
For example Evaluate X = (A + B) * (C + D)

LOAD A AC  M[A]

ADD B AC AC + M[B]

STORE T M[T] AC

LOAD C AC M[C]

ADD D AC  AC + M[D]

MUL T AC AC *M[T]

STORE X M[X]  AC

Zero-Address Instruction-
Zero-address instructions are those in which locations of
all operands are defined implicitly. The execution of these
instructions is the fastest as the speed with which a given
task is carried out depends on the time it takes to transfer
instructions from memory into the processor, and to
access the operand. These instructions are generally used
for stacks.

The general form of one-address instruction is as below:

Operation-Code

For example- Evaluates X = (A+B) * (C+ D)

PUSH A TOS  A
PUSH B TOS  B
ADD TOS  (A+B)
PUSH C TOS  C
PUSH D TOS  D
ADD TOS  (C+D)
MUL TOS  (C+D)*(A+B)
POP X M[X]  TOS
Addressing Modes:
1- Microprocessor executes the instructions stored in
memory (RAM).
2- It executes one instruction at a time.
3- Each of the instruction contains operations and
operands.
4- Operation specifies the type of action to be
performed.
For example: ADD, SUB, MOV, INC, LOAD, STORE
5- Operands are the data on which the operation is to be
performed.
MOV B, A Here MOV is operation and (B & A) are
operands.
ADD B Here ADD is operation and (B) is operand.
6- Operand can be place either in one of the processor
register or in memory.
7- There are different ways to get the operands.
8- The way in which the operand is taken from register
or memory is named as addressing mode.

There are 10 types of addressing mode.

1. Immediate Addressing Mode

The operand is specified within the instruction.
Operand itself is provided in the instruction rather than
its address.
2. Register Direct Addressing Mode
The operand is specified within one of the processor
register. Instruction specifies the register in which the
operand is stored.

3. Register Indirect Addressing Mode

The instruction specifies the register in which the
memory address of operand is placed.
It do not specify the operand itself but its location
within the memory where operand is placed.
 4. Direct Addressing Mode-
The instruction specifies the direct address of the
operand.
The memory address is specified where the actual operand
is.
5. Indirect Addressing Mode
The instruction specifies the indirect address where
the effective address of the operand is placed.
The memory address is specified where the actual
address of operand is placed.
 6. Implied Addressing Mode-
In this addressing mode, the definition of the instruction
itself specifies the operands implicitly.
It is also called as implicit addressing mode.
The instruction “Complement Accumulator” is an implied
mode instruction (CMA).
In a stack organized computer, zero address instructions
are implied mode instructions.

7. Displacement Addressing Mode-

In this the contents of the indexed register is added to the
Address part of the instruction, to obtain the effective
address of operand.
EA = A + (R), In this the address field holds two values,
A(which is the base value) and R(that holds the
displacement), or vice versa.

8. Relative Addressing Mode-

In relative addressing mode, contents of Program Counter
PC are added to address part of instruction to obtain
effective address.
The address part of the instruction is called as offset and
it can +ve or –ve.
When the offset is added to the PC the resultant number
is the memory location where the operand will be placed.

9. Autoincrement or Autodecrement
Addressing Mode -
It is similar to register indirect addressing mode.
Here the register is incremented or decremented before or
after its value is used.