02 DC Analysis 2400 23S

Download as pdf or txt
Download as pdf or txt
You are on page 1of 85

ELEC 2400 Electronic Circuits

Chapter 2: Resistive Networks and


DC Analysis

Course Website: http://canvas.ust.hk

HKUST, 2023-24 Spring


Chapter 2: Resistive Networks and DC Analysis
2.1 Circuit Terminology
2.2 Circuit Laws
2.2.1 Kirchhoff's Current Law
2.2.2 Kirchhoff's Voltage Law
2.3 Resistive Network
2.3.1 Resistors in Series and in Parallel
2.3.2 Voltage and Current Dividers
2.4 Circuit Analysis
2.4.1 Nodal Analysis
2.4.2 Loop and Mesh Analysis
2.4.3 Superposition
2.5 Maximum Power Transfer & High-Voltage Transmission
2.6 Equivalence and Source Transformation
2.6.1 Thevenin's and Norton's Theorems
2.6.2 General Proof
2-2
Circuit Hardware and Circuit Diagram

Printed Circuit Board (PCB)

Schematic Circuit Diagram


Two-dimensional representation
of the components and
interconnections of the circuit
using standardized symbols.

2-3
2.1 Circuit Terminology
In this chapter, we will discuss fundamental laws of circuit theory.
Some definitions are introduced first.
Lumped parameter circuit:
(1) a circuit with physical dimensions small compared to the
signal wavelength.
(2) the circuit is modeled as an interconnection of concentrated
elements (resistors, capacitors, and inductors, etc.) joined by a
network of perfectly conducting wires. The circuit elements have
idealized lumped parameters (resistance, capacitance, inductance,
etc.).

2-4
Circuit Terminology

Node: an electrical joint connecting the terminals of two or more


circuit elements.
Branch: consists of two nodes between which a circuit elements is
inserted.
Path: a sequence of nodes proceeding from the starting node
to the ending node.
Loop: a closed path with the starting node the same as the
ending node without passing an intermediate node more
than once.
Mesh: a loop that does not contain any other loops within it.

2-5
Circuit Diagram

Circuit diagram: a graphical representation of a circuit (closed


connections of circuit elements).

source voltage branch voltage


wire, no element,
+ V1 – Node D only one node
Node A
+ node
+ + V5
V7 VS1 V4 –
– Node G
+ V2 ––
Node E
Node B
+ I9
+ + no connection no connection
V8 VS2 V9 IS3 V6
– – –
Node C
+ V3 – Node F branch current
source current
7 nodes
9 branches
2-6
Examples 2-1, 2-2
Example 2-1: How many nodes and branches are there in the
circuit diagram on the right?

Soln: 2 nodes and 5 branches:


5 elements in parallel.

You can redraw a circuit diagram in any way you like as long as you don’t
(1) break any existing connections and (2) make any new connections.

Example 2-2: How many loops and meshes are there in the circuit
diagram?

Soln: 3 loops and 2 meshes. L1 L2


L3

2-7
Chapter 2: Resistive Networks and DC Analysis
2.1 Circuit Terminology
2.2 Circuit Laws
2.2.1 Kirchhoff's Current Law
2.2.2 Kirchhoff's Voltage Law
2.3 Resistive Network
2.3.1 Resistors in Series and in Parallel
2.3.2 Voltage and Current Dividers
2.4 Circuit Analysis
2.4.1 Nodal Analysis
2.4.2 Loop and Mesh Analysis
2.4.3 Superposition
2.5 Maximum Power Transfer & High-Voltage Transmission
2.6 Equivalence and Source Transformation
2.6.1 Thevenin's and Norton's Theorems
2.6.2 General Proof
2-8
2.2.1 Kirchhoff's Current Law

Kirchhoff's Current Law (KCL):


At any instant of time, the algebraic sum of
the currents entering (or leaving) a node of
a circuit is equal to 0, i.e., 𝐼𝑖 0.

Example 2-3:
I3
I2
I1
A I4
Gustav Robert Kirchhoff
I5 (1824-1887)

Consider currents entering Node A:


 I1 – I2 + I3 – I4 + I5 = 0
N.B. I2 and I4 bear minus signs because they are leaving A.
2-9
Current In = Current Out

KCL is a consequence of conservation of charge: charge entering


a node must leave that node instantaneously, and there is no
charge accumulation at the node.
𝑞𝑖 0   0  𝐼𝑖 0

KCL is more conveniently stated as:


𝐼𝑖 𝐼𝑘
where Ij's and Ik's are currents entering and leaving the node,
respectively.
Example 2-4:
I3
I2
I1
A I4
I5

I1 + I3 + I5 = I2 + I4
2-10
Additional Assumption for KCL
No change of net charge within any circuit elements.
In general, a good assumption.
𝑑𝑞6
0
𝑑𝑞1 𝑑𝑡
0 𝐼1
𝑑𝑡 𝐼6
𝑑𝑞5
𝐼2 0
𝑑𝑡

𝑑𝑞2 Here 𝑞𝑖 is the net charge inside the 𝑖 th


0 circuit element. This is different from the
𝑑𝑡
earlier definition in which 𝑞𝑖 was the
charge that moved through a given 𝐼5
plane.

𝑑𝑞4
𝐼3 0
𝐼4 𝑑𝑡
𝑑𝑞3
0 Under this assumption:
𝑑𝑡
𝐼1 𝐼2 𝐼3 𝐼4 𝐼5 𝐼6 2-11
Examples 2-5, 2-6

Example 2-5:
I2
B
A
Node A: I1 + I2 = 0
I3 I5
I7 Node B: I2 = I3 + I5
I1 C D Node C: I3 = I4 + I7
Node D: I5 + I7 = I6
I4 I6
Node E: I1 + I4 + I6 = 0
E

Example 2-6: Find I6. A


I1=5 A R1 I8=–2 A
Soln.:
R4
I1 = I6 + I8
I6=?
 I6 = 7 A

2-12
Examples 2-7, 2-8, 2-9

A
Example 2-7: Find I. I=?

Soln.: I = 15 A 10 A 5A

Example 2-8: Find I. 10 A


B
A
Soln.:
Invalid circuit because KCL is 5A
violated at Node A (5 A  10 A). C I=?

Example 2-9:
A Iy=? B
Soln.:
Wire
Is Node A = Node B? Node A = Node B.
Is Iy = 0? Iy cannot be determined here.
Is VAB = 0? VAB = 0.
2-13
2.2.2 Kirchhoff's Voltage Law
Kirchhoff's Voltage Law (KVL): C
D
At any instant of time, the algebraic
sum of the branch voltages around a
B
loop of a circuit is equal to zero, i.e.,
𝑉𝑖 0.
E
Only true if the electric field is
conservative.
Example 2-10: A
𝐻𝑒𝑖𝑔ℎ𝑡𝑖 0. Note: ABCDEA
+ V2 – B doesn’t have to be an actual “walkable” path.
A
L1 + +
V3 V5 Loop 1 (L1, voltage rise is positive,
+ L2 – + V7 – – voltage drop is negative):
V1 C D +V1 – V2 – V5 + V7 – V4 = 0
– + +
V4 V6 Loop 2 (L2):
– –
+V1 – V2 – V3 – V4 = 0
E 2-14
Main Assumption for KVL
No varying magnetic field inside the circuit outside the circuit
elements. Hence, no invisible voltage sources due to electromagnetic
induction. As a result, the electric field is conservative.

𝑉6

𝑉1


𝑉5
𝐵
𝑉2



𝑉4
𝑉3 – Faraday’s law of
electromagnetic
induction
𝜕𝐵 0
Voltage round the loop 𝐸 · 𝑑𝑙⃗ · 𝑑𝑆⃗ 0 ⇒ 𝑉 0 2-15
𝜕𝑡
Conservation of Energy and Ground Potential
KVL is a consequence of conservation of energy, with voltage
being energy per unit charge (V = E/q). An increase in energy for
a positive charge from A to B is thus identified as a rise in
voltage, while a decrease in energy is a drop in voltage.
Voltage is a relative quantity, and it is convenient to specify a
reference node for the whole circuit, usually known as the ground
node, or simply ground (GND), assigned as 0 V.

Symbols for Ground

Ground is usually just


a node designation,
rather than a physical
connection to earth.

2-16
Equivalent Statement of KVL

With the introduction of the ground node, KVL can be restated:


The voltage at a node, with reference to ground, is the
algebraic sum of the branch voltages that constitute a
path from ground to that node.
The resulting node voltage is independent of path.

Example 2-11: Find Vx. Soln.:


+4V– Consider the two paths from ground to
VX V x.
+ +
1
2V 6V Path 1:
– –
Vx = +3 V + 2 V – 4 V = 1 V
+ –
3V 2 10 V Path 2:
– + Vx = +5 V – 10 V + 6 V = 1 V
–5V+
2-17
External Ground and Supply Connections
(A) Single Ground Connection. No
Other External Connections: Circuit
IGND = 0 because ground is a dead
end and there is no return path. IGND = 0

(B) Multiple Ground Connections:


IGND’s are not necessarily zero, but Circuit
total ground current is zero, i.e.,
IGND1 + IGND2 + IGND3 = 0 IGND1 IGND2 IGND3

vS1 vS2
(C) Multiple Ground and Supply
IS1 IS2
Connections:
Total supply current is equal to total
ground current, i.e., Circuit
IS1 + IS2 = IGND1 + IGND2 + IGND3
IGND1 IGND2 IGND3

2-18
Examples 2-12, 2-13

Example 2-12: Find Vo. Example 2-13: Find Vo.



+
–10 V R1
Vo 10 V 5 V R1 Vo

5V R2
+
Mesh A

Soln.: Soln.:
Apply KVL to the mesh: KVL of Mesh A should give Vi = 0,
(Going clockwise, tracking but
voltage rises.) 10 V – 5 V = 5 V  0 V
and no solution exists (invalid circuit).
– 5 V – 10 V + Vo = 0 V
Vo = 15 V Remark: Voltage sources of unequal
values cannot be connected in
Be careful about the signs! parallel.

2-19
Chapter 2: Resistive Networks and DC Analysis
2.1 Circuit Terminology
2.2 Circuit Laws
2.2.1 Kirchhoff's Current Law
2.2.2 Kirchhoff's Voltage Law
2.3 Resistive Network
2.3.1 Resistors in Series and in Parallel
2.3.2 Voltage and Current Dividers
2.4 Circuit Analysis
2.4.1 Nodal Analysis
2.4.2 Loop and Mesh Analysis
2.4.3 Superposition
2.5 Maximum Power Transfer & High-Voltage Transmission
2.6 Equivalence and Source Transformation
2.6.1 Thevenin's and Norton's Theorems
2.6.2 General Proof
2-20
2.3 Resistive Network

Resistive network: consists of only resistors, voltage sources and


current sources.
N. B. A network is a more complicated circuit; and network is
usually interchangeable with circuit.

Example 2-14:
3 nodes, 4 elements

Examples of resistive 1-port network:


i i
+ +

V V

– –

2-21
2.3.1 Resistors in Series
Consider connecting two resistors in series:
KCL mandates I
IR1 = IR2 = I +
KVL gives R1 VR1

Vs = VR1 + VR2 Vs +
= IR1 + IR2 (Ohm’s law) VR2
R2
= I(R1+R2) –
Hence, the equivalent resistance Req is
Req = R1 + R2
In general, for n resistors connected in series:
Req = R1 + R2 + … + Rn
= nk 1 R k
For resistors in series: 1) Connected in a daisy chain manner.
2) Share the same current.
3) The order of connection is immaterial
for circuit analysis. 2-22
Resistors in Parallel
Consider connecting two resistors in parallel:
KVL mandates that I
Vs = VR1 = VR2 IR1 IR2
KCL gives Vs R1 R2
I = IR1 + IR2
Vs Vs  1 1 
   Vs    (Ohm’s law)
R1 R 2 R
 1 R 2 
1 1 1
  
R eq R1 R 2

In general, for n resistors connected in parallel:


1 1 1 1 n 1
   ...   
R eq R1 R 2 R n k 1 R k
For resistors in parallel: 1) Heads all connected together. So are the tails.
2) Share the same voltage.
3) Order of connection is immaterial. 2-23
2 and 3 Resistors in Parallel

For R1 and R2 connected in parallel, Req is written as Req = R1||R2,


and 1 1 1
 
R eq R1 R 2
 R1R 2  product 
R eq  R1 || R 2   
R1  R 2  sum 

For 3 resistors in parallel, apply the formula twice and


R1R 2
R1R 2 R3
R eq  R1 || R 2 || R 3  || R 3 
R1  R 2
R1  R 2 R1R 2
 R3
R1  R 2
R1R 2R 3
 (Too complicated
R1R 2  R1R 3  R 2R 3
to be useful!)
R1R 2R 3
Note that R1||R2||R3  (Wrong dimension!)
R1  R 2  R 3
2-24
Resistance and Conductance

In dealing with resistors connected in parallel, conductance G (=


1/R) may be used to simplify analysis:
 I1  I2  I3 I
I
 G1 Vs  G2 Vs  G3 Vs I1 I2 I2

 Vs (G1  G2  G3 ) Vs G1 G2 G3
Geq  G1  G2  G3

Example 2-15: Find Geq and Req.

1 1 1 1
Geq   Req 50 50
50 50

Geq = 0.02 + 0.02 Req = 50||50


= 0.04 –1 (or 0.04 S, S = Siemens) = 25 
2-25
Examples 2-16, 2-17

Example 2-16: Find Geq.

1 1
 30 1 1
30 50 
Geq Req Req Geq 50
1 1
 20
20
Geq = 0.02 S

Example 2-17: Find Req.

30  30 
Req Req Req
50  30  60  50  20  50  50 

30  60
30 || 60  30  20  50 R eq  50 || 50
30  60
 20  25
2-26
2.3.2 Voltage Divider
A voltage divider circuit can be formed from using two resistors
connected in series:
I +
Vs = VR1 + VR2 R1 VR1

= IR1+IR2 Vs I
+
R R R2 VR2
V V V V –
R R R R

By choosing appropriate R1 and R2, we can divide a voltage Vs into


VR1 and VR2, each of which can take on values from 0 to full Vs.
However, it should be noted that I I”
this VR2 cannot be used to drive I’ +
R1
any load. For the circuit to the
right, if the network N takes in a Vs R2 VR2 N
current I”, then I’ = I – I”  I, –
and the above VR2 /Vs relation will
not hold.
2-27
Current Divider
A current divider is the dual of the voltage divider. It can be
formed from using two resistors connected in parallel:

Is = IR1 + IR2 IR1 IR2 +

Vo Vo Vo Is R1 R2 Vo
  
R1 R 2 R1 || R 2

IR1 Vo / R1 R2
 
Is Vo / (R1 || R 2 ) R1  R 2

R R
I I I I
R R R R

Note that IR1 is proportional to R2,


and IR2 is proportional to R1. Also be
reminded that the smaller resistor
draws the larger current.
2-28
Example 2-18

Example 2-18: Find I1, I2, I3, VA and VB.


VB
I1
I2 I3
2
8A VA 4  2
4A

Soln.:
I1  4A
2 Current divider
I2  (8A  4A)  4A
24
I3  12A  I2  8A
VB  I3  2  16V
VA  VB  (4A  2)  24V
2-29
Examples 2-19, 2-20

Example 2-19: Find IR, V1 and V2.


+ IR
Soln.: V1 2 A –
– 2 V2
IR = 2 A
4V +
V2 = –IR2  = –4 V
4 V + V1 = –V2 = 4 V
V1 = 0 V !

Example 2-20: Find VA, I1 and I2.


0V
Soln.: I2 I1
I1 = 4 V/2  = 2 A 4V 2 2A
I2 = I1 – 2 A = 0 A
VA = 0 – 4 = –4 V VA

2-30
Examples 2-21, 2-22

Example 2-21: Find IR1, VA Example 2-22: Find IR2, VC


and VB. and VD.
IR1 VA IR2 VD
4 VC 4 

2A 4V 2A 4V
VB

Soln.: Soln.:
IR1 = 2 A IR2 = 2 A
VA = 0 – 24 = –8 V VD = 0 + 4 = 4 V
VB = VA – 4 = –8 – 4 VC = VD + 24 = 4 + 8
= –12 V = 12 V

2-31
Chapter 2: Resistive Networks and DC Analysis
2.1 Circuit Terminology
2.2 Circuit Laws
2.2.1 Kirchhoff's Current Law
2.2.2 Kirchhoff's Voltage Law
2.3 Resistive Network
2.3.1 Resistors in Series and in Parallel
2.3.2 Voltage and Current Dividers
2.4 Circuit Analysis
2.4.1 Nodal Analysis
2.4.2 Loop and Mesh Analysis
2.4.3 Superposition
2.5 Maximum Power Transfer & High-Voltage Transmission
2.6 Equivalence and Source Transformation
2.6.1 Thevenin's and Norton's Theorems
2.6.2 General Proof
2-32
2.4.1 Nodal Analysis

A circuit can be very complicated, and one needs a systematic


way to analyze it  use nodal analysis.

rear windshield
defrosting circuit

2-33
Procedure of Nodal Analysis

To solve a complicated circuit, nodal analysis (related to nodes)


can be employed. The procedure is as following.

(1) For a circuit with n nodes, one node is assigned the ground
(reference) node with node voltage of 0 V.
(2) Write (n–1) KCL equations at the (n–1) non-ground nodes.
Alternatively, any (n–1) nodes can be chosen.
(3) For the (n–1) equations in (n–1) unknowns, we may solve
them by the Gaussian elimination method.

After all node voltages are obtained, all branch currents can then
be computed. In this course, we deal with at most 2 equations
with 2 unknowns, and simple elimination method is adequate.

2-34
Example 2-23

Example 2-23: (circuit with voltage source): Solve for Va and I1.
Va 4
I1 I2
2A 4 4V

Soln.: Write KCL equation at Va.


Va Va  4
@Va: 2 
4 4
 2Va  4  8

Ans.: Va  6V, I1  1.5V

2-35
Example 2-24

Example 2-24: Solve for all node voltages and branch currents.
Va 2 Vb
I3 I2 I1
2A 3 1 –1 A

Soln.: Write KCL equations at Va and Vb first.


Va Va  Vb
@Va: 2   5Va  3Vb  12 (1)
3 2
@Vb: Va  Vb Vb
 1  Va  3Vb  2 (2)
2 1
(1) – (2): 4Va  10V
1 1 1 7 5
Ans.: Va  2 V, Vb  V, I1  A, I2  A, I3  A.
2 6 6 6 6
2-36
Example 2-25
Example 2-25: Solve for Io. Supernode

I1 2 k Va 12 V Vb 2 k
Ix Ix I3
6V 1 k 2 k –4 V
I2 Io

Soln.: The current Ix through the 12 V voltage source cannot be


expressed in terms of Va and Vb, but we can apply KCL to
the 12 V source, which is "considered" as a supernode,
and sum its incoming and outgoing currents.
I1 = I2 + Ix = I2 + Io + I3
6  Va Va Va  12 Va  12  (4)
  
2k 1k 2k 2k
 6  Va  2Va  Va  12  Va  16
22 V  12
 Va  V and Io  a  3.8mA
5 2k 2-37
Example 2-26

Example 2-26: (circuit with dependent source): Solve for Va and


I1.
I1 2 Va 1

10 V 3A 2I1

Soln.: Write KCL at Node A gives


Va  2I1
I1  3 
1
10  Va 10  Va
  3  Va  2( )
2 2
 10  Va  6  4Va  20

Ans. Va  7.2V, I1  1.4A

2-38
SPICE Simulations
SPICE stands for Simulation Program with Integrated Circuit
Emphasis.
SPICE was developed in 1973 at the University of California,
Berkeley by Laurence Nagel and his research advisor, Prof. Donald
Pederson. Nodal analysis is used in the simulations.
SPICE is a very important and powerful circuit-simulation program
widely used by electrical engineers involved in circuit analysis and
design. It can simulate electrical circuit behavior and calculate
node voltages, branch currents, power, and other parameters of a
circuit. An engineer can study the behavior of circuits without
having to actually build them. The circuit can consist of resistors,
capacitors, inductors, operational amplifiers, diodes, transistors,
semiconductor devices, and other components.
PSPICE is a commercial version of SPICE from Cadence Design
Systems. You will use it in your labs.

https://en.wikipedia.org/wiki/SPICE
2-39
2.4.2 Mesh Analysis (Optional)

If a circuit with n nodes and b branches can be laid out on a


plane surface with no crossing of branches (planar graph), then it
can be shown that there exist sets of b–(n–1) independent KVL
equations related to loop/mesh currents, and mesh analysis can
be used. (Loops and meshes are treated the same way.)
(1) Assign loops/meshes and the corresponding loop/mesh
currents.
(2) For an element Ri that belongs to only 1 loop/mesh with
current Ij, the voltage drop across Ri is IjRi.
(3) For Ri that belongs to two loops/meshes with currents Ij and
Ik, special care is needed to determine the voltage drop as
(IjIk)Ri according to the directions of Ij and Ik.
(4) Solve for the b–n+1 equations.
Note that using loop/mesh analysis always have equal or more
equations to solve than using nodal analysis.
2-40
Example 2-27 (Optional)

Example 2-27: Solve for Io.


3 k 2 k
Io
I1 I2
12 V 3V
6 k

Mesh A 3 k 1 k Mesh B
Soln.:
KVL of Mesh A: 12 – 3kI1 – 6k(I1–I2) – 3kI1 = 0 (1)
KVL of Mesh B: 3 + 2kI2 + 6k(I2–I1) + 1kI2 = 0 (2)
(1)  12kI1 – 6kI2 = 12 (3)
(2)  6kI1 – 9kI2 = 3 (4)
(3) – 2(4)  12kI2 = 6  I2 = 0.5 mA
I2 in (3)/6  2kI1 = 2 + 1k0.5  I1 = 1.25 mA
Finally, Io = I1 – I2 = 0.75 mA
Ans. I1 = 1.25 mA, I2 = 0.5 mA, Io = 0.75 mA
2-41
Example 2-28 (Optional)
4A
Example 2-28: Solve for I.
Loop A
Soln.: 4–I 2  7–I 3 
3–I
Loop A is the mesh with the 4 A
1 2
source, but KVL cannot be easily
applied, nor to the meshes with the 4 V 3A
5V
I I2
3 A source. Hence, define Loop B (a
I
superloop or supermesh) as shown. Loop B
To facilitate computation, use KCL at
the nodes to find the unknown
currents first.
At the branch with 3 A source: I – I2 = 3  I2 = I – 3
Loop B: 4 + 1I + 2(I–4) + 3(I–3–4) + 2(I–3) – 5 = 0
 4 + I + 2I – 8 + 3I – 21 + 2I – 6 – 5 = 0
 8I = 36  Ans. I = 4.5 A
The loop/mesh analysis is not straightforward and is not preferred.
2-42
2.4.3 Linearity
A circuit can be considered mathematically as a function, with an
input and an output. The input is also known as the excitation,
and the output is known as the response.

input Circuit output x f() y = f(x)

excitation circuit response

A circuit satisfies the property of homogeneity iff (if and only if)
f(kx) = kf(x)

kx f() y = kf(x)

The only function that can meet the homogeneity requirement is


f(x) = mx, i.e., a straight line passing through the Origin.
2-43
Superposition and Linearity

A circuit satisfies the property of superposition iff (if and only if)
f(x1+x2) = f(x1) + f(x2)

x1 + x2 f() y = f(x1) + f(x2)

A circuit is linear iff it satisfies both the properties of homogeneity


and superposition, that is
f(ax1+bx2) = af(x1) + bf(x2)

ax1 + bx2 f() y = af(x1) + bf(x2)

2-44
Application of Superposition
In this course, we often deal with linear circuits (with important
exceptions, e.g., diodes), and as such, superposition applies.
Therefore, if a linear circuit contains multiple independent sources,
the output voltage and/or the output current can be calculated by
summing the contributions of each source acting alone.

When computing the individual contribution of a source, all other


independent sources are set to zero: a voltage source becomes a
short circuit (Vsi = 0 V) and a current source becomes an open
circuit (Isj = 0 A). Yet, all dependent sources should remain
operative.
Vs3 Is4

Io  Io V  Io I  Io V  Io I
s1 s2 s3 s4

Vs1 
Linear
Vo  Vo V  Vo I  Vo V  Vo I
Circuit s1 s2 s3 s4

Is2 
2-45
Example 2-29

Example 2-29: Compute VA and VB for Vs = 6 V and Vs = 12 V.


Comment on the result.
2 VA 2  VB

Soln.: Vs=6 V 4 2

4 || 4
VA  Vs  0.5Vs
4 || 4  2
2
VB  VA  0.5VA
22

Therefore,
(1) for Vs = 6 V, VA = 3 V, VB = 1.5 V; and
(2) for Vs = 12 V, VA = 6 V, VB = 3 V.

Note that the node voltages are proportional to Vs, observing


homogeneity.
2-46
Example 2-30

Example 2-30: Compute Vo by using nodal analysis and by using


superposition.
3 VA 4  Vo

Vs1=36 V 2
Is2=6 A

Soln.:
(1) Nodal analysis:

KCL at VA : 36  VA V
6 A
3 6
 72  2VA  36  VA
 V  12V
A

and Vo = 4 V
2-47
Example 2-30 (cont.)

(2) Superposition:
3 VA 4  Vo
(i) Is2 set to 0:
Vs1=36 V IS2=0  open 2
Vo I 2
s2  0
  36  8V
342

3 VA 4  Vo
(ii) Vs1 set to 0:
Io
3 VS1=0
Io V 6 2A 2
s1  0
3 6  short Is2=6 A
Vo V 2A 2Ω 4V
s1  0

Finally, add the two contributions together to get


Vo  Vo V Vo I  4V  8V  4V
s1  0 s2  0

2-48
Example 2-31

Example 2-31: Compute I1 (superposition with tricky circuitry).


I1 2  2A

6V 2 2 4V

Soln.: Note that the parallel combination of 2 ||4 V is in series


with the 2 A source, and plays no part in determining I1.
I1  I1 6V  I1 2A
6V 2
   2A
2  2 2  2
 1.5A  1A
 2.5A
2-49
Example 2-32 (1)

Example 2-32: Use superposition to find I (note the dependent


source).
I 2 1

10 V 3A 2I

Soln.:
(1) Consider I due to the 10 V source first (= Ia), and remember
that the dependent source 2I (now 2Ia) remains operative.
Ia 2  1
Apply KVL to the loop:
10 = 2Ia + Ia + 2Ia 10 V 2Ia
 Ia = 2 A

2-50
Example 2-32 (2)

(2) Next, consider I due to the 3 A source (= Ib), and remember


that the dependent source 2I (now 2Ib) remains operative.
Ib 2  3+Ib 1 
Apply KVL to the loop:
2Ib + (3 + Ib) + 2Ib = 0 3A 2Ib
 Ib = –0.6 A
Hence, the answer is
I = Ia + Ib = 2 – 0.6 = 1.4 A
Checking:
1.4 A 2  7.2 V 1 
4.4 A
10 V 3A 2I=2.8 V

2-51
Superposition not applicable to Power
Power is a square function of voltage and current (P  V2, I2),
and as it is not a linear function of V and I, it does not obey
superposition.

Example 2-33: Find the power absorbed by the 3  resistor for


Vs = 8 V and Vs = 16 V.
1 Vo
Io
VS 3

Soln.:
(1) For Vs = 8 V, Io = 2 A, and P3 = 223 = 12 W
(2) For Vs = 16 V, Io = 4 A, and P3 = 423 = 48 W
Note that Vs increases by 2 times, but the power is increased by 4
times.
2-52
Chapter 2: Resistive Networks and DC Analysis
2.1 Circuit Terminology
2.2 Circuit Laws
2.2.1 Kirchhoff's Current Law
2.2.2 Kirchhoff's Voltage Law
2.3 Resistive Network
2.3.1 Resistors in Series and in Parallel
2.3.2 Voltage and Current Dividers
2.4 Circuit Analysis
2.4.1 Nodal Analysis
2.4.2 Loop and Mesh Analysis
2.4.3 Superposition
2.5 Maximum Power Transfer & High-Voltage Transmission
2.6 Equivalence and Source Transformation
2.6.1 Thevenin's and Norton's Theorems
2.6.2 General Proof
2-53
2.5 Maximum Power Transfer (1)

Let us consider a voltage source Vs with source resistance Rs (=


output resistance of Vs) driving a load RL:
Rs
Io
+
Vs RL Vo

The power dissipated in (or delivered to) RL is

RL Vs
PL  VoIo  Vs 
R s  RL R s  RL
RL
 V2
2 s
(R s  R L)

2-54
Maximum Power Transfer (2)

To obtain the maximum power dissipated in RL, differentiate PL


w.r.t. (with respect to) RL and set the result to zero:

dPL (R  R ) 2
 R L  2  (R s  R L)
0  Vs 2 s L
0
dR L (R s  R L) 4

gives
R s 2  2R sR L  R L 2  2R sR L  2R L 2  0
 RL  R s

The maximum power PL(max) that can be obtained from a source


Vs is when the load resistance RL is matched to the source
resistance Rs (RL = Rs), and

PL(max) Rs 2 1 Vs 2
 V 
2 s
(R s  R s) 4 Rs

2-55
High-Voltage Transmission
Let us consider a different objective: to deliver a given amount of
power from the power plant to the substation while minimizing
the power loss in the long-distance transmission line.
RLine RLine RLine
IL
Power Long Distance Transmission Line +
RLoad
Plant Vs RLine RLine RLine
VL Substation

The power delivered to RLoad is


𝑃 𝑉𝐼 Given

The power loss in the transmission line is


𝑃 1
𝑃 𝐼 𝑅 𝑅 ∝
𝑉 𝑉
High voltage  lower transmission loss. The highest transmission
voltage now exceeds 1 MV, with PLoad rated over 10 GW in China.
https://en.wikipedia.org/wiki/Ultra-high-voltage_electricity_transmission_in_China 2-56
Chapter 2: Resistive Networks and DC Analysis
2.1 Circuit Terminology
2.2 Circuit Laws
2.2.1 Kirchhoff's Current Law
2.2.2 Kirchhoff's Voltage Law
2.3 Resistive Network
2.3.1 Resistors in Series and in Parallel
2.3.2 Voltage and Current Dividers
2.4 Circuit Analysis
2.4.1 Nodal Analysis
2.4.2 Loop and Mesh Analysis
2.4.3 Superposition
2.5 Maximum Power Transfer & High-Voltage Transmission
2.6 Equivalence and Source Transformation
2.6.1 Thevenin's and Norton's Theorems
2.6.2 General Proof
2-57
2.6 Equivalence
Two resistive 1-port networks are equivalent if and only if they
have the same current-voltage (I-V) characteristics across their
respective terminal-pairs for ALL loads (including sources).
iA iB
+ +
Network A VA Network B VB
– –
Load L Load L

If IA = IB and VA = VB for all load L, then network A and Network


B are equivalent.
Hence, a complex network (Network A) can be replaced by a
simple equivalent network (Network B), and the analysis can be
simplified.

Power supply

2-58
Example 2-34

Example 2-34: Is Network A equivalent to Network B?

2 Io 6 Io
+ +

4V R=2  Vo 8V R=2  Vo

– –
Network A Network B

Soln.:
For R = 2 , the load voltage and load current for both
Network A and Network B are Vo = 2 V and Io = 1 A. However,
for R = 6 , Network A gives: Vo =3V
and Io = 0.5 A

but Network B gives: Vo =4V


and Io = 0.67 A

Therefore, Network A is not equivalent to Network B. 2-59


2.6.1 Thevenin's Theorem

Thevenin's Theorem:
A linear circuit with a terminal-pair (N) can be replaced by a
series combination of an ideal voltage source Voc and a
resistor Req, where Voc is the open-circuit voltage of N and Req
is the equivalent resistance looking into N with all
independent sources set to zero. All dependent sources
should remain operative.
A
A
Network Req
N Voc

B 1-port
B
Thevenin's equivalent
circuit of N

1. Voc is also known as Thevenin's equivalent source.


2. Req is Thevenin’s equivalent resistance, or the output
resistance of N. 2-60
Computing Voc and Req

Figuratively, we have a complicated circuit C that can be divided


into two parts, a linear network N and a load L.
A
Circuit  Network Load
C N L
B
Linear and non-linear Linear 1-port Linear and non-linear
components components components

Thevenin's theorem states that:


A
+
Network
Voc Voc
N

B

A
N with
sources=0 (Dependent sources
Req remain operative)
B Req
2-61
Example 2-35

Example 2-35: Is Network A equivalent to Network B?


2 Io 4 Io
+ +

4V R Vo 8V 4 R Vo

– –
Network A Network B

Soln.: Construct Thevenin's equivalent circuit of Network B:


4 4

4
8V 4 Voc   8  4V 4 Req =4||4=2Ω
44

Now, Network B is modeled as Voc = 4 V in series with Req = 2 ,


and is the same as Network A; hence, they are equivalent.
2-62
Example 2-35 (cont.)
An alternative way to demonstrate equivalence is to consider the
load with R = 0  and R = ∞ .
2 Io=2 A 4 Io=2 A
R=0
+ +
4V Vo=0 V 8V 4 Vo=0 V
A – B –

R=∞ 2 Io=0 A 4 Io=0 A

+ +
4V Vo=4 V 8V 4 Vo=4 V
A – B –

Io R=0 
Both give the same Io-Vo 2A
plot for all R:
R=∞ 
Vo
0 4V
2-63
Example 2-36

Example 2-36: Find Voc and Req of the following circuit.


3 4 A 3 4 A

36 V 6A

Req
B B

36 V0  shorted
Soln.: 6 A0  open
3 4 gives Req = 7 
6A 0A +
36 V 6A Voc 7
 A

18 V
Voc = 36 – 63 + 04 = 18 V
B

2-64
Example 2-37

Example 2-37: Is Network A equivalent to Network B?

8V 2 8V

Network A Network B

Soln.: For Thevenin's equivalent circuit of Network A, clearly, Voc


= 8 V and Req = 0 . Hence, Network A is equivalent to Network
B.
shorted 2

Req=0 

Note that any resistors in parallel with an ideal voltage source can
be neglected from calculating other circuit variables.
2-65
Example 2-38
Example 2-38: Find the output voltage Vo when RL changes from
1 to 3 k.

+ + +
Network A Voc=4 V Network A 1 k Vo=1 V Network A 3 k Vo=? V
– – –

Soln.:
Req Req 3 k

+ + +
Voc Voc=4 V 4V 1 k Vo=1 V 4V 3 k Vo=2 V
– – –

Given Clearly, Ans:


Voc = 4 V Req = 3 k Vo = 2 V

2-66
Norton's Theorem
Norton's Theorem:
A linear circuit with a terminal-pair (N) can be replaced by a
parallel combination of an ideal current source Isc and a
resistor Req, where Isc is the short-circuit current of N and Req
is the equivalent resistance looking into N with all
independent sources set to zero. All dependent sources
should remain operative.
A
A
Network Isc Req
N
B 1-port
B
Norton's equivalent
circuit of N
Points to note:
(1) The equivalent resistance Req is the same for both Thevenin's
and Norton's equivalent circuits.
(2) It is easy to show that Voc = IscReq.
2-67
Computing Isc and Req

Figuratively, we have a complicated circuit C that can be divided


into two parts, a linear network N and a load L.
A
Circuit  Network Load
C N L
B
Linear and non-linear Linear 1-port Linear and non-linear
components components components

Norton's theorem states that:


A
Network Isc (Note the direction
Isc
N of Isc)
B

A
N with
Req (Dependent sources
sources=0
remain operative)
B Req
2-68
Example 2-39

Example 2-39: Find Isc and Req of the circuit in Example 2-36.

3 4 A 36  VC V
KCL at VC: 6 C
3 4
36 V 6A  144  4VC  72  3VC
72
B  VC  V
7
V 18
 Isc  C  A
4 7
Soln.:
3  VC 4 
Recall that Req = 7 , Norton’s
equivalent is therefore
36 V 6A Isc
A

18
A 7
7

B 2-69
Example 2-40

Example 2-40: Is Network A equivalent to Network B?

2
8A 8A

Network A Network B

Soln.: For Norton's equivalent circuit of Network A, clearly, Isc = 8


A and Req = ∞ . Hence, Network A is equivalent to Network B.

2
open

Req=∞ 

Note that any resistors in series with an ideal current source can
be neglected from calculating other circuit variables.
2-70
Example 2-41

Example 2-41: Both Vs1 and Is2 are unknown. If R = 0 , then IR


= 4 A. Find IR when R = 4 .
A A
2
4 IR 2  Is2 IR
4 R
Vs1 R Is2
Vs1
B B

Soln.: Let R be the load, and find Norton's equivalent circuit of the
remaining circuit first.

A A A
4 2 4 2 IR
Vs1 Isc Is2 4A 4 4
Req

B B B
For R = 0 , IR = 4 A = Isc. Req = 4  For R = 4 , IR = 2 A.
2-71
Transformation Between
Thevenin’s and Norton’s Equivalent Circuits
A linear network can be described by either its Thevenin's or
Norton's equivalent circuit. The validity of one will prove the
other. They can also be transformed (source transformation) into
one another.
From Thevenin's equivalent, find Norton’s equivalent:
A
Req Req Voc Req
Isc =
Voc Voc Req Req

B short

From Norton's equivalent, find Thevenin’s equivalent:


A

Voc =Isc Req


Isc Req Isc Req Req Req

B open
2-72
Equivalent for External Components Only
Source transformation can ONLY be employed to compute
voltages and currents EXTERNAL TO Thevenin's or Norton's
equivalent circuits.
Example 2-42: Demonstrate that source transformation can be
used to compute Io but not I3.

I3 Io Perform source transformation:


9A 3 6
?? 3 
Io
27 V 6
Soln.: From current division,
we have Clearly,
I3 = 6 A Io = 3 A
Io = 3 A and I3 is not the same as before.

2-73
Example 2-43 (1)
Example 2-43: Use source transformation to solve for Va.

Va 4

2A 4 4V

Soln.: One way is to obtain the Thevenin's equivalent circuit of


2 A||4 :

I 4 Va 4
84
I   0.5A
8V 4V 44
Va  8  4  0.5  6V

2-74
Example 2-43 (2)
Example 2-43: Use source transformation to solve for Va.

Va 4

2A 4 4V

Soln.: A simpler way is to obtain the Norton's equivalent circuit


of 4 V + 4  on the right:

Va
Va = (2 A + 1 A)(4 ||4 )
2A 4 4 1A =3A×2
=6V

2-75
Example 2-44

Example 2-44: Use source transformation to solve for I.

8
20  5A
I
40 V 30  12 

Soln.: Obtain Norton's equivalent for 40 V + 20  and


Thevenin's equivalent for 5A||8  first, and then
Thevenin's equivalent for 2 A||20 ||30 :

8 40 V 12  8 40 V
16V
I I  0.5A
32
2A 12  24 V 12 
20  30 

2-76
Example 2-45 (1)

Example 2-45: Thevenin's equivalent circuit


(a) Find the open circuit voltage Voc at the terminal pair a-b.
(b) Show that the Thevenin's resistance Req at a-b is 2 k.
(c) Find the short circuit current Isc at the terminal-pair a-b.
(d) If the load is changed from 1 k to 2 k, find the new Io.

12 V

4 mA 1 k 1 k
RL=1 k Io
b a
1 k – Vo +
6V 2 k 2 mA

2-77
Example 2-45 (2)

Soln.: (a) A formal solution involves writing KCL equations to


solve. However, good observations may help to solve this
problem faster. Here, make use of the currents of the
current sources to find voltage drops, and work out the
total voltage drop from Va to Vb.
12 V

Note that 6 mA
+ –
Voc = Va – Vb 4 mA 6V 1 k 1 k 2V
– +
and Va = Vb + 6 V +12 V + 2 V
b a
1 k – Voc +
Hence,
6V 2 k 2 mA
Voc = 20 V

2-78
Example 2-45 (3)
(b) For computing Req, set all sources to zero (voltage sources
shorted and current sources open).

1 k 1 k 1 k
a

b a Req
1 k b
2 k Req 1 k
1 k||2 k

Clearly, Req = 2 k.


(c) Isc = Voc/Req = 20 V/2 k = 10 mA.
(d) For RL = 2 k,
Io = Voc/(Req + RL) = 20 V/(2 k + 2 k) = 5 mA.

2-79
Example 2-46 (1)

Example 2-46: Find Thevenin's equivalent circuit at a-b


(equivalent circuit with dependent source).

I 2 a b

10 V 3A 2I

Soln.: (1) To find Voc at a-b, note that


I = –3 A I=–3 A 2  a b
Va = 10 – (–3)2 = 16 V
10 V 3A 2I
Vb = 2(–3) = –6 V
Voc = Va – Vb = 22 V

2-80
Example 2-46 (2)

(2) To find Req is a little bit tricky (but can be done directly). We
may find Isc first, and Req = Voc/Isc.

Now, the KVL equation relating Va is


I 2 a Isc b
Va = Vb = 10 – 2I = 2I
 I = 2.5 A 10 V 3A 2I

Then, the KCL equation at Va is


I + 3 = Isc
 Isc = 5.5 A
 Req = Voc/Isc = 22 V/5.5 A = 4 

2-81
Example 2-46 (3)

(3) To find Req of a network with one or more dependent sources.

A IT
(i) We may apply a test voltage VT
Network
across A-B. Find the current IT with
flows into the network at node A. VT
dependent Req
Then, Req is given by Req = VT/IT. sources
B

(ii) Alternatively, we may apply a test A


current IT flows into node A. Find Network
with
the voltage VT across terminals A- VT IT
dependent Req
B. Again, Req is given by Req = sources
VT/IT. B

VT and IT can be set to 1 V and 1 A to


simplify the calculation.

2-82
Example 2-46 (4)

Now, apply 1 A across node a-b.


2 1A
I a b
Obviously, I = –1 A
2I
Then, from the KVL equation at
the outer loop

2I + Vab + 2I = 0
 Vab = –4I = 4 V
 Req = Vab/1 A = 4 V/1 A = 4 

2-83
2.6.2 General Proof of Thevenin's Theorem
Consider a resistive linear network having M independent voltage
sources, N independent current sources, and a number of
dependent voltage and current sources.
Single out a port of the network and connect an external current
source to it.

A
Vm In Ri Vj Ik
Iext

Linear Network B
Req

Then by superposition, we can find VAB by summing the


contributions of the independent sources taken one at a time
including Iext. All dependent sources must remain operative:

𝑉 𝐴 𝑉 𝐵 𝐼 𝐼 𝑅

2-84
General Proof of Thevenin's Theorem (Cont.)

𝑉 𝐴 𝑉 𝐵 𝐼 𝐼 𝑅

Notice that the first two terms constitute the open-circuit voltage,
because this is the voltage when Iext is set to zero. Req is the
equivalent resistance looking into the port. So, the I-V
characteristic of the Linear Network is now reduced to
𝑉 𝑉 𝐼 𝑅
But this is identical to the I-V characteristic of its Thevenin’s
circuit shown on the right. Req
A
A
Linear
Network Iext Voc Iext

B
Req B

This is true for all values of Iext and VAB. Hence the two circuits
2-85
are equivalent.

You might also like