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AET305 Dec 2023

ktu s5 aei computer architecture and embedded systems question paper december 2023

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133 views2 pages

AET305 Dec 2023

ktu s5 aei computer architecture and embedded systems question paper december 2023

Uploaded by

tve22ae062
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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C 1100AET305122104 Pages: 2

Reg No.:_______________ Name:__________________________


APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
Fifth Semester B.Tech Degree Regular and Supplementary Examination December 2023 (2019 Scheme)

COURSE CODE: AET 305


COURSE NAME: COMPUTER ARCHITECTURE AND EMBEDDED SYSTEMS
MAX. MARKS: 100 DURATION: 3 HOURS
PART A
(Answer all questions; each question carries 3 marks) Marks

1 Describe the steps that the processor has to perform to execute an instruction? 3
2 Draw IEEE standard floating-point number format with double precision? 3
3 Explain the relevance of ORG, END and EQU assembler directives? 3
4 Demonstrate the bit pattern for 8051 flag register (PSW)? 3
5 Explain TMOD Special Function Register? 3
6 Assuming that R = 6K and I ref = 3mA, identify Vout for the binary input 3
11001000
7 Describe the use of NULL pointer in embedded C programming? 3
8 Discuss the relevance of using re-entrant function and mention any two 3
conditions for a function to be called as re-entrant function?
9 Explain the various queues maintained by OS in association with CPU 3
scheduling?
10 List out six functional requirements needed for choosing an RTOS? 3
PART B
(Answer one full question from each module, each question carries 14 marks)
Module -1
11 a) With a neat diagram explain the operation of hardwired control. Also mention the 9
advantages and disadvantages of the same.
b) Differentiate Von Neuman architecture and Harvard architecture? 5
12 a) Explain single bus organization of the data path inside a processor with the help 9
of a schematic diagram?
b) Define the rules governing the Arithmetic operations of floating-point numbers? 5
Module -2
13 a) Explain in detail about the storage registers in 8051 microcontrollers? 9
b) Write an Assembly Language Program to first configure port 1 as an input port 5

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1100AET305122104

by writing 1s to it, then data is received from that port and saved in R7 and R5.
14 a) Draw the pin configuration of 8051 microcontroller with proper explanation? 7
b) Write an Assembly Language Program to find the sum of the values 79H, F5H, 7
E2H and put the sum in registers R0 (low byte) and R5 (high byte).?
Module -3
15 Draw a block diagram to interface seven segment LED display with 8051 and 14
write an assembly language program for the same ?
16 a) Write an Assembly Language Program to send data to the DAC to generate a 5
stair-step ramp ?
b) Calculate the count to be loaded into timer register to generate a square wave of 9
2KHz frequency on P1.0. And also write a program for the same using Timer 1
Mode 0. Assume crystal frequency is 11.0592 MHz ?
Module -4
17 a) Describe the uses of function calls in embedded C programming? 7
b) Based on Complexity & Performance, deterministic behaviour and triggering, 7
explain how embedded systems can be classified?
18 a) Compare Embedded System with General Computing System? 7
b) State the advantages of using high level language for embedded programming 7
with detailed explanation?
Module -5
19 a) Differentiate process and threads? 7
b) Three processes with process IDs P1, P2, P3 with estimated completion time 10, 7
5, 7 milliseconds and priorities 0, 3, 2 (0- highest priority, 3 lowest priority)
respectively enters the ready queue together. Calculate the waiting time and Turn
Around Time (TAT) for each process and the Average waiting time and Turn
Around Time (Assuming there is no I/O waiting for the processes) in priority-
based scheduling algorithm.
20 a) Explain context switching in the aspect of multitasking? 7
b) Three processes with process IDs P1, P2, P3 with estimated completion time 6, 4, 7
2 milliseconds respectively, enters the ready queue together in the order P1, P2,
P3. Calculate the waiting time and Turn Around Time (TAT) for each process
and the Average waiting time and Turn Around Time (Assuming there is no I/O
waiting for the processes) in RR algorithm with Time slice= 2ms.

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