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ST-Reference Designs Data Brief-Rev6-Feb2023

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0% found this document useful (0 votes)
343 views19 pages

ST-Reference Designs Data Brief-Rev6-Feb2023

Uploaded by

Lucas Barros
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 19

STDES-WL5xxxxx

Reference designs for STM32WL5x and STM32WLEx


microcontrollers
Data brief

Features
Includes ST state-of-the-art patented
technology

Reference designs
• Fully open hardware platforms
• Suitable for rapid prototyping of end nodes
based on LoRaWAN®, Sigfox™, WM-Bus,
and many other proprietary protocols

STM32WL5x or STM32WLEx
microcontroller
• Multi-protocol LPWAN dual-core 32-bit
Arm® Cortex® -M4/M0+ at 48 MHz
• Ultra-low power
• RF transceiver (150 MHz to 960 MHz
frequency range) supporting LoRa®, (G)FSK, Designs with different references show different layouts.
(G)MSK, and BPSK modulations Picture is not contractual.

• Up to 256-Kbyte flash memory and 64-Kbyte


SRAM
Power
• 1.8 V to 3.6 V through external sources
Oscillators
• 32.768 kHz LSE crystal
Debug/programming
• 32 MHz HSE (on-board TCXO or crystal XO) • Through JTAG/serial-wire debug port to
connect an external ST-LINK
Connectors
Software
• 2x HE10-20
• Comprehensive free software libraries and
• SMA antenna examples available with the STM32CubeWL
• 2-point UART MCU Package usable with adapted BSP

Table 1. Device summary


Reference Part numbers

STDES-WL5I4IHH, STDES-WL5I4IHL, STDES-WL5I4ILH, STDES-WL5I4SBB,


STDES-WL5U2IHH, STDES-WL5U2IHL, STDES-WL5U2ILH, STDES-WL5U2SBB,
STDES-WL5xxxxx
STDES-WL5U4DHB, STDES-WL5U4DLB, STDES-WL5U4IHH, STDES-WL5U4IHL,
STDES-WL5U4ILH, STDES-WL5U4SBB, STDES-WL5U4SHW

February 2023 DB4597 Rev 6 1/19


For further information contact your local STMicroelectronics sales office. www.st.com
Contents STDES-WL5xxxxx

Contents

1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 General information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

4 STM32WL5x and STM32WLEx reference designs and codification . . . 5

5 Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

6 Hardware layout and configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7


6.1 Schematics and BOM (bill of material) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6.2 HSE 32 MHz XO or TCXO selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6.3 IPD (integrated passive device) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6.4 Solder bridges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

7 Firmware programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

8 AT_Slave and UART pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

9 Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2/19 DB4597 Rev 6


STDES-WL5xxxxx List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1


Table 2. STM32WL5x and STM32WLEx reference designs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. RF switch per reference board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. HSE XO/TCXO reference board implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Solder bridge configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Conventions for solder bridges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 7. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

DB4597 Rev 6 3/19


3
Description STDES-WL5xxxxx

1 Description

The main objective of the STM32WL5x and STM32WLEx reference designs is to


recommend a layout and associated BOM for dedicated applications (these boards are not
for sale).
Performance has been assessed and FCC and CE certification checks have been done by
an independent company.
These reference designs can be manufactured from files that can be downloaded from the
www.st.com website. A complete application can be prototyped thanks to the access to all
GPIOs.
Sensitive layout parts can be extracted and pasted in any user board design with the same
PCB characteristics and feature set.
The STM32WL5x and STM32WLEx reference designs are provided with the STM32WL
comprehensive software HAL library. The STM32CubeWL MCU Package contains many
software examples developed with the STM32WL Nucleo-64 board (NUCLEO-WL55JC).
These examples can be easily adapted for STM32WL5x and STM32WLEx reference
designs. A dedicated delivery is provided for radio AT_Slave firmware that is fully
compatible with the selected STM32WL5x or STM32WLEx reference board.
The firmware source code corresponding to the selected reference design is available on
www.st.com. This associated firmware is distributed under license BSD-3-Clause
(https://opensource.org/licenses/BSD-3-Clause).
Using the reference designs to design the user application helps to get the right
RF performance and to pass certification.

2 General information

These reference designs are based on Arm®(a) Cortex®-M STM32WL5x and STM32WLEx
microcontrollers.

a. Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

4/19 DB4597 Rev 6


STDES-WL5xxxxx Main features

3 Main features

• STM32WL5x and STM32WLEx MCUs


– Frequency range: 150 MHz to 960 MHz
– Modulation: LoRa®, (G)FSK, (G)MSK and BPSK
– RX sensitivity: -123 dBm for 2-FSK (at 1.2 Kbit/s), 148 dBm for LoRa®
(at 10.4 kHz, spreading factor 12)
– Transmitter high output power, programmable up to +22 dBm
– Transmitter low output power, programmable up to +15 dBm
• 2 and 4-layer PCBs supported
• Various STM32WL packages supported
• Various frequency ranges supported

4 STM32WL5x and STM32WLEx reference designs and


codification

Table 2. STM32WL5x and STM32WLEx reference designs


Number
Board MCU Optimized BOM RF
Web reference of SMD or IPD
reference package target switch
layers

STDES-WL5I4SBB MB1842 UFBGA 4 SMD [864:928 MHz]/15 dBm Yes


STDES-WL5I4SBB MB1842 UFBGA 4 SMD [864:928 MHz]/22 dBm Yes
STDES-WL5I4SBB MB1842 UFBGA 4 SMD [470:530 MHz]/17 dBm Yes
STDES-WL5U4SBB MB1720 UFQFPN 4 SMD [864:928 MHz]/15 dBm Yes
STDES-WL5U4SBB MB1720 UFQFPN 4 SMD [864:928 MHz]/22 dBm Yes
STDES-WL5U4SBB MB1720 UFQFPN 4 SMD [433 MHz]/15 dBm Yes
STDES-WL5U4SBB MB1720 UFQFPN 4 SMD [470:530 MHz]/17 dBm Yes
STDES-WL5U4SHW MB1792 UFQFPN 4 SMD [168-172 MHz]/22 dBm Yes
STDES-WL5U2SBB MB1791 UFQFPN 2 SMD [864:928 MHz]/15 dBm Yes
STDES-WL5U2SBB MB1791 UFQFPN 2 SMD [864:928 MHz]/22 dBm Yes
STDES-WL5U2SBB MB1791 UFQFPN 2 SMD [470:530 MHz]/17 dBm Yes
STDES-WL5U4DLB MB1789-LP UFQFPN 4 SMD [864:928 MHz]/15 dBm No
STDES-WL5U4DLB MB1789-LP UFQFPN 4 SMD [433 MHz]/15 dBm No
STDES-WL5U4DHB MB1789-HP UFQFPN 4 SMD [864:928 MHz]/22 dBm No
STDES-WL5U4DHB MB1789-HP UFQFPN 4 SMD [470:530 MHz]/17 dBm No
IPD
STDES-WL5I4ILH MB1849-LP UFBGA 4 [864:928 MHz]/15 dBm Yes
BALFHB-WL-04D3

DB4597 Rev 6 5/19


18
STM32WL5x and STM32WLEx reference designs and codification STDES-WL5xxxxx

Table 2. STM32WL5x and STM32WLEx reference designs (continued)


Number
Board MCU Optimized BOM RF
Web reference of SMD or IPD
reference package target switch
layers

IPD
STDES-WL5I4IHH MB1849-HP UFBGA 4 [915 MHz]/22 dBm Yes
BALFHB-WL-01D3
IPD
STDES-WL5I4IHL MB1849-HP UFBGA 4 [490 MHz]/17 dBm Yes
BALFLB-WL-07D3
IPD
STDES-WL5U4ILH MB1848-LP UFQFPN 4 [864:928 MHz]/15 dBm Yes
BALFHB-WL-05D3
IPD
STDES-WL5U4IHH MB1848-HP UFQFPN 4 [915 MHz]/22 dBm Yes
BALFHB-WL-02D3
IPD
STDES-WL5U4IHL MB1848-HP UFQFPN 4 [490 MHz]/17 dBm Yes
BALFLB-WL-08D3
IPD
STDES-WL5U2ILH MB1874-LP UFQFPN 2 [864:928 MHz]/15 dBm Yes
BALFHB-WL-06D3
IPD
STDES-WL5U2IHH MB1874-HP UFQFPN 2 [915 MHz]/22 dBm Yes
BALFHB-WL-03D3
IPD
STDES-WL5U2IHL MB1874-HP UFQFPN 2 [490 MHz]/17 dBm Yes
BALFLB-WL-09D3

Figure 1. STM32WL5x and STM32WLEx reference designs codification


STDES- WL5 I 4 S B B

Device family
STDES- = ST reference design

Wireless products
WL5 = Long-range wireless STM32WL5x/Ex microcontrollers

STM32WL package
I = UFBGA
U = UFQFPN

Number of layers
2 = two layers
4 = four layers

Antenna matching and Tx/Rx path connection to antenna


I = IPD with RF switch controlled by the MCU
S = SMD with RF switch controlled by the MCU
D = SMD with direct tie

Power mode
B = both high and low power
H = high power
L = low power

Frequency band
B = both L and H
H = 868 to 915 MHz
L = 433 MHz or [470 to 520] MHz
W = 169 MHz WMBUS frequency
MSv71101V2

6/19 DB4597 Rev 6


STDES-WL5xxxxx Software

5 Software

STM32CubeWL examples can be used with BSP library adaptation. The software source
code corresponding to the selected reference design is available on www.st.com.
This associated software is distributed under license BSD-3-Clause
(https://opensource.org/licenses/BSD-3-Clause).

BSP adaptation
The BSP adaptation versus the STM32WL Nucleo board NUCLEO-WL55JC concerns the
RF switch control as the available GPIOs depend on the board.

Table 3. RF switch per reference board(1)


Reference board SW_CTRL2 SW_CTRL3

MB1720 PC13 PA11


MB1791, MB1848-LP/HP, MB1874-LP/HP PA9 PA0
MB1792 PC13 PA9
MB1842, MB1849-LP/HP PC4 PC3
1. No RF switch on the MB1789 board.

Other optional configurations associated with hardware board solder bridges exist. Make
sure to use the firmware configuration associated with the hardware board configuration
(see Section 6.4).

6 Hardware layout and configuration

6.1 Schematics and BOM (bill of material)


A zip file including the following items is available for download:
• board schematic
• board Gerber file
• BOMs for selected frequencies and output power

6.2 HSE 32 MHz XO or TCXO selection


The reference boards for UFQFPN packages are designed to be populated either for a
XTAL or for a TCXO. The reference boards for UFBGA packages are designed only for the
TCXO solution (XOUT not connected).
The XO can anyway be implemented with the UFBGA, and the final frequency drift can be
improved by means of a serial capacitor.

DB4597 Rev 6 7/19


18
Hardware layout and configuration STDES-WL5xxxxx

Possible implementations are shown in the table below.

Table 4. HSE XO/TCXO reference board implementation(1)


Reference board XO + serial TCXO

MB1720 X -
MB1791 X X
MB1792 X X
MB1842 - X
MB1789 X X
MB1848-LP/HP X X
MB1849-LP/HP - X
MB1874-LP/HP X X
1. X: implementation possible.

Note: The XO solution, with a serial capacitor on Xin pin, can also be implemented on a board with
the UFBGA package.
The figure below shows the two possible implementations on the reference board MB1848.

Figure 2. XO/TCXO configuration example on reference board MB1848


XO configuration with serial capacitor Cs TCXO configuration
NDK NX2016SA-32M-EXS00A-CS06465 NDK NT2016SF-32M-END5875A

10 nF ferrite

Ÿ Ÿ
XO Ÿ TCXO
Ÿ 10
pF
Ÿ
Ÿ Ÿ
Cs

2 1 4 3
Pin 1
XO TCXO
position
3 4 1 2
DT71062V1

Note: The solution presented in Figure 2 is patented. It must not be implemented in association
with another product from another company without STMicroelectronics agreement.

6.3 IPD (integrated passive device)


STMicroelectronics develops integrated passive device (IPD) companion chips for
optimized matching, filtering, and balun. The IPD is an all-in-one very compact solution
covering each package and each of the main use cases (22 dBm at 915 MHz, 14 dBm at
868 MHz, 17 dBm at 490 MHz).
IPD-based reference boards give a better overall performance than equivalent SMD
solutions and facilitate the board design.

8/19 DB4597 Rev 6


6.4 Solder bridges

STDES-WL5xxxxx
The reference designs can be configured versus the application needs.
Note: VDDPA must be connected to VDDRF only in the high output power configuration. If the associated solder bridge is wrongly
configured, it can be destructive for the STM32WL device.

Table 5. Solder bridge configurations


Solder Board reference Solder
Description
bridge bridge
MB1720 MB1842 MB1791 MB1792 MB1789 MB1848 MB1874 MB1849
LSE provided by external LSE
ON
LSE 32.768 kHz CLK X2(1)
SB1/SB2 SB1/SB2 - - - - - SB1/SB2
control LSE not provided by external LSE
OFF
32.768 kHz CLK X2
VDD RF switch supplied by VDD
ON
(general VDD)
SB3 SB3 SB3 SB3 - SB3 SB3 SB3
DB4597 Rev 6

VDD RF switch NOT supplied by


OFF
VDD (general VDD)(1)
VDD RF switch supplied by MCU
ON
VDD RF (STM32WL I/O)(1)
SB4 SB4 SB4 SB4 - SB4 SB4 SB4
switch VDD RF switch NOT supplied by
OFF
MCU (STM32WL I/O)
VDD RF switch supplied by

Hardware layout and configuration


ON
external signal
SB5 SB5 SB5 SB5 - - - -
VDD RF switch NOT supplied by
OFF
external signal(1)
CTRL RF switch controlled by
ON
MCU (STM32WL I/O)(1)
SB6 SB6 SB6 SB6 - SB6 SB6 SB6
CTRL RF switch NOT controlled
CTRL OFF
by MCU (STM32WL I/O)
RF
switch CTRL RF switch controlled by
ON
external signal(1)
SB9 SB9 SB9 SB9 - SB9 SB9 SB9
CTRL RF switch NOT controlled
OFF
by external signal
9/19
Table 5. Solder bridge configurations (continued)
10/19

Hardware layout and configuration


Solder Board reference Solder
Description
bridge bridge
MB1720 MB1842 MB1791 MB1792 MB1789 MB1848 MB1874 MB1849
VDDPA supplied by VDDRF (high
ON
output power configuration)
SB7 - SB7 SB7 - - - - VDDPA not supplied by VDDRF
OFF (high output power
configuration)(1)
VDDPA supplied by VDDRF1V55
ON (low output power
VDDPA configuration)(1)
SB8 - SB8 SB8 - - - -
supply
VDDPA not supplied by
OFF
VDDRF1V55
VDDPA supplied by VDDRF1V55
ON (2-1) (low output power
DB4597 Rev 6

- SB7 - - - - - - configuration)(1)
VDDPA supplied by VDDRF (high
ON (2-3)
output power configuration)
ON(2-1) RF: high output power
SB10 SB10 - SB10 - - - -
RF ON (2-3) RF: low output power(1)
output ON (2-1) RF: high output power
- - SB1 - - - - -
ON (2-3) RF: low output power(1)
BOOT0 connected to pull-down
ON
resistor(1)
BOOT0 SB11 SB8 SB11 SB11 SB11 SB11 SB11 SB8
BOOT0 not connected to pull-
OFF
down resistor

STDES-WL5xxxxx
Table 5. Solder bridge configurations (continued)

STDES-WL5xxxxx
Solder Board reference Solder
Description
bridge bridge
MB1720 MB1842 MB1791 MB1792 MB1789 MB1848 MB1874 MB1849
ON HSE external input connected
SB12 - - - - - - - HSE external input not
OFF
connected(1)
ON HSE XO input connected(1)
SB13 - - SB13 - - - - HSE XO/TCXO input not
HSE OFF
connected
XO/
TCXO(2) ON HSE XO output connected(1)
SB14 - - SB14 - - - -
OFF HSE output not connected
HSE XO/TCXO input
ON
connected(1)
- - SB13 - SB13 SB13 SB13 SB13
HSE XO/TCXO input not
DB4597 Rev 6

OFF
connected
HSE XO output connected (XO
ON
mode)(1)
- - SB15 - SB15 SB15 SB15 SB15
HSE output not connected (TCXO
OFF
mode)
HSE HSE TCXO supplied (TCXO
XO/ ON
mode)(1)

Hardware layout and configuration


TCXO - - SB14 - SB14 SB14 SB14 SB14
HSE TCXO not supplied (XO
OFF
mode, except MB1842)
ON HSE TCXO input connected(1)
- SB14 - - - - - -
OFF Not supported
1. Default low output power configuration.
2. Other modifications must be done in the BOM. See schematic notes.
11/19
Firmware programming STDES-WL5xxxxx

7 Firmware programming

To download firmware, it is enough to connect a serial-wire debug port from an external


probe. For example, the STLINK-V3SET can be used to easily perform the connection.
SWDIO is linked to PA13 and SWCLK to PA14.
The figures below show the JTAG and power-supply connections on the reference boards
(top view).

Figure 3. MB1842 - JTAG and power supply connections


SWCLK SWDIO
UART_TX
UART_RX
PA14
PA3
PB6
PB5
PB3
PA15
GND
VDDRF1V55
PC13
PB7
PA12
PA10
PA13
PB12
PB1
PB2
PC1
FE_CTRL2
MB1842: UFBGA73 - 4 layers - SMD RF switch

FE_CTRL3
VDDRF

NRST
PA11

PB10
GND

GND

GND
VDD
PA5
PA4
PB4
PB8
PA1
PA2
PA7
PA6
PA0

PA8

PA9

VDD
GND DT71050V1

Figure 4. MB1720 - JTAG and power supply connections


SWCLK SWDIO
UART_TX
UART_RX
PA4
PA3
PB6
PB5
PB3
PA15
PA9
PA0
PA14
PB7
PA12
PA10
PA13
PB12
GND
PB2
PB0
GND

MB1720: UFQFPN48 - 4 layers - SMD RF switch


VDDRF1V55
FE_CTRL2
FE_CTRL3

VDDRF
NRST
GND

GND

GND

GND

GND
VDD
PA5
PA8
PB4
PB8
PA1
PA2
PA7
PA6

NC

VDD
GND DT71051V1

12/19 DB4597 Rev 6


STDES-WL5xxxxx Firmware programming

Figure 5. MB1789 - JTAG and power supply connections


SWCLK SWDIO

GND
UART_TX
UART_RX
PA15
PA14
PA13
PA12
PA11
PA10
PB12
PB2
PB0
PC13
NC
GND
PB0
GND
NC
VDDRF
GND
MB1789: UFQFPN48 - 4 layers - SMD direct tie

NRST

GND
VDD
PB3
PB4
PB5
PB6
PB7
PB8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9

NC
VDD
GND DT71052V1

Figure 6. MB1791/MB1792 - JTAG and power supply connections


SWCLK SWDIO
GND
UART_TX
UART_RX
PA15
PA14
PA13
PA12
PA11
PA10
PB12
PB2
PB0
PC13
FE_CTRL2
GND
SB10
GND
SB12
VDDRF
GND

MB1791: UFQFPN48 - 2 layers - SMD RF switch


MB1792: UFQFPN48 - 4 layers - SMD 169M RF switch
FE_CTRL3
NRST

GND
VDD
PB3
PB4
PB5
PB6
PB7
PB8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9

VDD
GND DT71053V1

DB4597 Rev 6 13/19


18
Firmware programming STDES-WL5xxxxx

Figure 7. MB1848/MB1874-LP/HP - JTAG and power supply connections


SWCLK SWDIO

GND
UART_TX
UART_RX
PA15
PA14
PA13
PA12
PA11
PA10
PB12
PB2
PB0
PC13
FE_CTRL2
GND
GND
GND
GND
VDDRF
GND
MB1848-LP/HP: UFQFPN48 - 4 layers - IPD RF switch
MB1874-LP/HP: UFQFPN48 - 2 layers - IPD RF switch

NRST
GND

GND
VDD
PB3
PB4
PB5
PB6
PB7
PB8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
VDD
GND DT71054V1

Figure 8. MB1849-LP/HP - JTAG and power supply connections


SWCLK SWDIO
UART_TX
UART_RX
PA14
PA3
PB6
PB5
PB3
PA15
GND
VDDRF1V55
PC13
PB7
PA12
PA10
PA13
PB12
PB1
PB2
PC1
FE_CTRL2

MB1849-LP/HP: UFBGA73 - 4 layers - IPD RF switch


FE_CTRL3
VDDRF

NRST
PA11

PB10
GND

GND

GND
VDD
PA5
PA4
PB4
PB8
PA1
PA2
PA7
PA6
PA0

PA8

PA9

VDD
GND DT71055V1

14/19 DB4597 Rev 6


STDES-WL5xxxxx AT_Slave and UART pins

8 AT_Slave and UART pins

To test the RF performance using the AT_Slave firmware, a UART must be connected.
AT_Slave uses LPUART1.
The following pins must be used:
• PA3 is connected to LPUART1_RX.
• PA2 is connected to LPUART1_TX.
For more informations about the AT commands, refer to the application note
LoRaWAN® AT commands for STM32CubeWL (AN5481).
The figures below show the UART and power supply connections on the reference boards
(top view).

Figure 9. MB1842 - UART and power supply connections


UART_RX_ATslave
UART_TX
UART_RX
PA14
PA3
PB6
PB5
PB3
PA15
GND
VDDRF1V55
PC13
PB7
PA12
PA10
PA13
PB12
PB1
PB2
PC1
FE_CTRL2

MB1842: UFBGA73 - 4 layers - SMD RF switch


FE_CTRL3
VDDRF

NRST
PA11

PB10
GND

GND

GND
VDD
PA5
PA4
PB4
PB8
PA1
PA2
PA7
PA6
PA0

PA8

PA9

VDD
UART_TX_ATslave GND DT71056V1

Figure 10. MB1720 - UART and power supply connections


UART_RX_ATslave
UART_TX
UART_RX
PA4
PA3
PB6
PB5
PB3
PA15
PA9
PA0
PA14
PB7
PA12
PA10
PA13
PB12
GND
PB2
PB0
GND

MB1720: UFQFPN48 - 4 layers - SMD RF switch


VDDRF1V55
FE_CTRL2
FE_CTRL3

VDDRF
NRST
GND

GND

GND

GND

GND
VDD
PA5
PA8
PB4
PB8
PA1
PA2
PA7
PA6

NC

VDD
UART_TX_ATslave GND DT71057V1

DB4597 Rev 6 15/19


18
AT_Slave and UART pins STDES-WL5xxxxx

Figure 11. MB1789 - UART and power supply connections

GND VDD

GND
UART_TX
UART_RX
PA15
PA14
PA13
PA12
PA11
PA10
PB12
PB2
PB0
PC13
NC
GND
PB0
GND
NC
VDDRF
GND
MB1789: UFQFPN48 - 4 layers - SMD direct tie

NRST

GND
VDD
PB3
PB4
PB5
PB6
PB7
PB8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9

NC
UART_TX_ATslave UART_RX_ATslave
DT71058V1

Figure 12. MB1791/MB1792 - UART and power supply connections

GND VDD
GND
UART_TX
UART_RX
PA15
PA14
PA13
PA12
PA11
PA10
PB12
PB2
PB0
PC13
FE_CTRL2
GND
SB10
GND
SB12
VDDRF
GND

MB1791: UFQFPN48 - 2 layers - SMD RF switch


MB1792: UFQFPN48 - 4 layers - SMD 169M RF switch
FE_CTRL3
NRST

GND
VDD
PB3
PB4
PB5
PB6
PB7
PB8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9

UART_TX_ATslave UART_RX_ATslave
DT71059V1

16/19 DB4597 Rev 6


STDES-WL5xxxxx Conventions

Figure 13. MB1848/MB1874-LP/HP - UART and power supply connections

GND VDD

GND
UART_TX
UART_RX
PA15
PA14
PA13
PA12
PA11
PA10
PB12
PB2
PB0
PC13
FE_CTRL2
GND
GND
GND
GND
VDDRF
GND
MB1848-LP/HP: UFQFPN48 - 4 layers - IPD RF switch
MB1874-LP/HP: UFQFPN48 - 2 layers - IPD RF switch

NRST
GND

GND
VDD
PB3
PB4
PB5
PB6
PB7
PB8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
UART_TX_ATslave UART_RX_ATslave
DT71060V1

Figure 14. MB1849-LP/HP - UART and power supply connections


UART_RX_ATslave
UART_TX
UART_RX
PA14
PA3
PB6
PB5
PB3
PA15
GND
VDDRF1V55
PC13
PB7
PA12
PA10
PA13
PB12
PB1
PB2
PC1
FE_CTRL2

MB1849-LP/HP: UFBGA73 - 4 layers - IPD RF switch


FE_CTRL3
VDDRF

NRST
PA11

PB10
GND

GND

GND
VDD
PA5
PA4
PB4
PB8
PA1
PA2
PA7
PA6
PA0

PA8

PA9

VDD
UART_TX_ATslave GND DT71061V1

9 Conventions

Table 6. Conventions for solder bridges


Configuration Description

Solder bridge SBx ON SBx connections closed by 0 Ω resistor


Solder bridge SBx OFF SBx connections left open

DB4597 Rev 6 17/19


18
Revision history STDES-WL5xxxxx

10 Revision history

Table 7. Document revision history


Date Revision Changes

8-Dec-2021 1 Initial release.


Updated:
– Table 1: Device summary
– New Section 2: General information and Section 3: Main features
– Section 4: STM32WL reference designs and codification
20-Apr-2022 2
– Table 3: RF switch per reference board
– Table 4: Solder bridge configurations
– New Section 7: Firmware programming
– New Section 8: AT_Slave and UART pins
Updated the product references in:
– Document title and headers
– Features and Description
11-May-2022 3 – Table 1: Device summary
– Table 2: STM32WL5x and STM32WLEx reference designs
– Figure 1: STM32WL5x and STM32WLEx reference designs
codification
Expanded the document scope to the reference designs STDES-
WL5I4ILH, STDES-WL5I4IHH, STDES-WL5I4IHL, STDES-WL5U4ILH,
STDES-WL5U4IHH, STDES-WL5U4IHL, STDES-WL5U2ILH, STDES-
WL5U2IHH, and STDES-WL5U2IHL.
Updated:
– Table 1: Device summary
– Table 2: STM32WL5x and STM32WLEx reference designs
14-Oct-2022 4 – Table 3: RF switch per reference board
– Table 5: Solder bridge configurations
– Figure 3, Figure 4, Figure 5, Figure 6, Figure 9, Figure 10, Figure 11,
and Figure 12
Added:
– Section 6.2: HSE 32 MHz XO or TCXO selection
– Section 6.3: IPD (integrated passive device)
– Figure 7, Figure 8, Figure 13, and Figure 14
Updated the STDES-WL5U4ILH optimized BOM target in Table 2:
26-Oct-2022 5
STM32WL5x and STM32WLEx reference designs.
18-Feb-2023 6 Updated the cover picture.

18/19 DB4597 Rev 6


STDES-WL5xxxxx

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DB4597 Rev 6 19/19


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