ST-Reference Designs Data Brief-Rev6-Feb2023
ST-Reference Designs Data Brief-Rev6-Feb2023
Features
Includes ST state-of-the-art patented
technology
Reference designs
• Fully open hardware platforms
• Suitable for rapid prototyping of end nodes
based on LoRaWAN®, Sigfox™, WM-Bus,
and many other proprietary protocols
STM32WL5x or STM32WLEx
microcontroller
• Multi-protocol LPWAN dual-core 32-bit
Arm® Cortex® -M4/M0+ at 48 MHz
• Ultra-low power
• RF transceiver (150 MHz to 960 MHz
frequency range) supporting LoRa®, (G)FSK, Designs with different references show different layouts.
(G)MSK, and BPSK modulations Picture is not contractual.
Contents
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 General information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
5 Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7 Firmware programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
9 Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
List of tables
1 Description
2 General information
These reference designs are based on Arm®(a) Cortex®-M STM32WL5x and STM32WLEx
microcontrollers.
a. Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.
3 Main features
IPD
STDES-WL5I4IHH MB1849-HP UFBGA 4 [915 MHz]/22 dBm Yes
BALFHB-WL-01D3
IPD
STDES-WL5I4IHL MB1849-HP UFBGA 4 [490 MHz]/17 dBm Yes
BALFLB-WL-07D3
IPD
STDES-WL5U4ILH MB1848-LP UFQFPN 4 [864:928 MHz]/15 dBm Yes
BALFHB-WL-05D3
IPD
STDES-WL5U4IHH MB1848-HP UFQFPN 4 [915 MHz]/22 dBm Yes
BALFHB-WL-02D3
IPD
STDES-WL5U4IHL MB1848-HP UFQFPN 4 [490 MHz]/17 dBm Yes
BALFLB-WL-08D3
IPD
STDES-WL5U2ILH MB1874-LP UFQFPN 2 [864:928 MHz]/15 dBm Yes
BALFHB-WL-06D3
IPD
STDES-WL5U2IHH MB1874-HP UFQFPN 2 [915 MHz]/22 dBm Yes
BALFHB-WL-03D3
IPD
STDES-WL5U2IHL MB1874-HP UFQFPN 2 [490 MHz]/17 dBm Yes
BALFLB-WL-09D3
Device family
STDES- = ST reference design
Wireless products
WL5 = Long-range wireless STM32WL5x/Ex microcontrollers
STM32WL package
I = UFBGA
U = UFQFPN
Number of layers
2 = two layers
4 = four layers
Power mode
B = both high and low power
H = high power
L = low power
Frequency band
B = both L and H
H = 868 to 915 MHz
L = 433 MHz or [470 to 520] MHz
W = 169 MHz WMBUS frequency
MSv71101V2
5 Software
STM32CubeWL examples can be used with BSP library adaptation. The software source
code corresponding to the selected reference design is available on www.st.com.
This associated software is distributed under license BSD-3-Clause
(https://opensource.org/licenses/BSD-3-Clause).
BSP adaptation
The BSP adaptation versus the STM32WL Nucleo board NUCLEO-WL55JC concerns the
RF switch control as the available GPIOs depend on the board.
Other optional configurations associated with hardware board solder bridges exist. Make
sure to use the firmware configuration associated with the hardware board configuration
(see Section 6.4).
MB1720 X -
MB1791 X X
MB1792 X X
MB1842 - X
MB1789 X X
MB1848-LP/HP X X
MB1849-LP/HP - X
MB1874-LP/HP X X
1. X: implementation possible.
Note: The XO solution, with a serial capacitor on Xin pin, can also be implemented on a board with
the UFBGA package.
The figure below shows the two possible implementations on the reference board MB1848.
10 nF ferrite
XO TCXO
10
pF
Cs
2 1 4 3
Pin 1
XO TCXO
position
3 4 1 2
DT71062V1
Note: The solution presented in Figure 2 is patented. It must not be implemented in association
with another product from another company without STMicroelectronics agreement.
STDES-WL5xxxxx
The reference designs can be configured versus the application needs.
Note: VDDPA must be connected to VDDRF only in the high output power configuration. If the associated solder bridge is wrongly
configured, it can be destructive for the STM32WL device.
- SB7 - - - - - - configuration)(1)
VDDPA supplied by VDDRF (high
ON (2-3)
output power configuration)
ON(2-1) RF: high output power
SB10 SB10 - SB10 - - - -
RF ON (2-3) RF: low output power(1)
output ON (2-1) RF: high output power
- - SB1 - - - - -
ON (2-3) RF: low output power(1)
BOOT0 connected to pull-down
ON
resistor(1)
BOOT0 SB11 SB8 SB11 SB11 SB11 SB11 SB11 SB8
BOOT0 not connected to pull-
OFF
down resistor
STDES-WL5xxxxx
Table 5. Solder bridge configurations (continued)
STDES-WL5xxxxx
Solder Board reference Solder
Description
bridge bridge
MB1720 MB1842 MB1791 MB1792 MB1789 MB1848 MB1874 MB1849
ON HSE external input connected
SB12 - - - - - - - HSE external input not
OFF
connected(1)
ON HSE XO input connected(1)
SB13 - - SB13 - - - - HSE XO/TCXO input not
HSE OFF
connected
XO/
TCXO(2) ON HSE XO output connected(1)
SB14 - - SB14 - - - -
OFF HSE output not connected
HSE XO/TCXO input
ON
connected(1)
- - SB13 - SB13 SB13 SB13 SB13
HSE XO/TCXO input not
DB4597 Rev 6
OFF
connected
HSE XO output connected (XO
ON
mode)(1)
- - SB15 - SB15 SB15 SB15 SB15
HSE output not connected (TCXO
OFF
mode)
HSE HSE TCXO supplied (TCXO
XO/ ON
mode)(1)
7 Firmware programming
FE_CTRL3
VDDRF
NRST
PA11
PB10
GND
GND
GND
VDD
PA5
PA4
PB4
PB8
PA1
PA2
PA7
PA6
PA0
PA8
PA9
VDD
GND DT71050V1
VDDRF
NRST
GND
GND
GND
GND
GND
VDD
PA5
PA8
PB4
PB8
PA1
PA2
PA7
PA6
NC
VDD
GND DT71051V1
GND
UART_TX
UART_RX
PA15
PA14
PA13
PA12
PA11
PA10
PB12
PB2
PB0
PC13
NC
GND
PB0
GND
NC
VDDRF
GND
MB1789: UFQFPN48 - 4 layers - SMD direct tie
NRST
GND
VDD
PB3
PB4
PB5
PB6
PB7
PB8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
NC
VDD
GND DT71052V1
GND
VDD
PB3
PB4
PB5
PB6
PB7
PB8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
VDD
GND DT71053V1
GND
UART_TX
UART_RX
PA15
PA14
PA13
PA12
PA11
PA10
PB12
PB2
PB0
PC13
FE_CTRL2
GND
GND
GND
GND
VDDRF
GND
MB1848-LP/HP: UFQFPN48 - 4 layers - IPD RF switch
MB1874-LP/HP: UFQFPN48 - 2 layers - IPD RF switch
NRST
GND
GND
VDD
PB3
PB4
PB5
PB6
PB7
PB8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
VDD
GND DT71054V1
NRST
PA11
PB10
GND
GND
GND
VDD
PA5
PA4
PB4
PB8
PA1
PA2
PA7
PA6
PA0
PA8
PA9
VDD
GND DT71055V1
To test the RF performance using the AT_Slave firmware, a UART must be connected.
AT_Slave uses LPUART1.
The following pins must be used:
• PA3 is connected to LPUART1_RX.
• PA2 is connected to LPUART1_TX.
For more informations about the AT commands, refer to the application note
LoRaWAN® AT commands for STM32CubeWL (AN5481).
The figures below show the UART and power supply connections on the reference boards
(top view).
NRST
PA11
PB10
GND
GND
GND
VDD
PA5
PA4
PB4
PB8
PA1
PA2
PA7
PA6
PA0
PA8
PA9
VDD
UART_TX_ATslave GND DT71056V1
VDDRF
NRST
GND
GND
GND
GND
GND
VDD
PA5
PA8
PB4
PB8
PA1
PA2
PA7
PA6
NC
VDD
UART_TX_ATslave GND DT71057V1
GND VDD
GND
UART_TX
UART_RX
PA15
PA14
PA13
PA12
PA11
PA10
PB12
PB2
PB0
PC13
NC
GND
PB0
GND
NC
VDDRF
GND
MB1789: UFQFPN48 - 4 layers - SMD direct tie
NRST
GND
VDD
PB3
PB4
PB5
PB6
PB7
PB8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
NC
UART_TX_ATslave UART_RX_ATslave
DT71058V1
GND VDD
GND
UART_TX
UART_RX
PA15
PA14
PA13
PA12
PA11
PA10
PB12
PB2
PB0
PC13
FE_CTRL2
GND
SB10
GND
SB12
VDDRF
GND
GND
VDD
PB3
PB4
PB5
PB6
PB7
PB8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
UART_TX_ATslave UART_RX_ATslave
DT71059V1
GND VDD
GND
UART_TX
UART_RX
PA15
PA14
PA13
PA12
PA11
PA10
PB12
PB2
PB0
PC13
FE_CTRL2
GND
GND
GND
GND
VDDRF
GND
MB1848-LP/HP: UFQFPN48 - 4 layers - IPD RF switch
MB1874-LP/HP: UFQFPN48 - 2 layers - IPD RF switch
NRST
GND
GND
VDD
PB3
PB4
PB5
PB6
PB7
PB8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
UART_TX_ATslave UART_RX_ATslave
DT71060V1
NRST
PA11
PB10
GND
GND
GND
VDD
PA5
PA4
PB4
PB8
PA1
PA2
PA7
PA6
PA0
PA8
PA9
VDD
UART_TX_ATslave GND DT71061V1
9 Conventions
10 Revision history
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