EEPC-301: MICROPROCESSORS AND

INTERFACING

Dr. Asha Sharma (Ph.D., IIT Kanpur) Oct-23

▪ Microprocessor is a programmable, clock-driven, register-based electronic device that
reads instructions from a storage device (memory), takes the data from input unit (input
device) and process the data according to the instructions and provides the result to the
output unit (output device).

Fig. Basic Architecture

▪ Although the microprocessor is very powerful and can carry out many functions. In order
for it to be useful, it has to be built into a system, such as a microcomputer, along with
other peripherals such as memory and input output units.
▪ The technique of connecting these peripherals to the microprocessor is called
interfacing.
Dr. Asha Sharma (Ph.D., IIT Kanpur) Oct-23 2
▪ This means that interfacing technique should include some sort of a scheme to select the
peripheral device that is required to communicate with the microprocessor while at the
same time isolating all other peripherals, even though all the peripherals stay connected to
the microprocessor all the time.

MEMORY MAP:
▪ Memory map is a graphical representation of the total available memory in a
microprocessor system and how it is used.
▪ It is not always that a microprocessor system requires the entire amount of memory that it
possibly can have.
▪ Many practical systems require only a fraction of the maximum memory size of the
microprocessor.
▪ However, since a microprocessor is a universal device meant to be used in a wide range
of applications, the manufacturers provide as large a memory addressing capability as
possible within their design constraints

Dr. Asha Sharma (Ph.D., IIT Kanpur) Oct-23 3

 ▪ The 8085 microprocessor has 16 address lines which give a maximum possible memory
size of 64 K bytes. Let us assume that we have a microcomputer built using the 8085
which has 2 K bytes of ROM and 256 bytes of RAM.
▪ Figure shows the memory map of the scheme.

0000 0000 0000 0000

0000 0111 1111 1111

07FF

0010 0000 0000 0000

0000 0000 1111 1111

20FF

Figure: Memory map of a 8085-based microcomputer

▪ Note that all memory addresses are expressed as hexadecimal numbers. The maximum
possible size of 64 K has the address range from 0000H to FFFFH. The 2 K ROM
occupies the address range 0000 to 07FFH. 256 bytes of RAM occupy the address
space from 2000 to 20FFH.
Dr. Asha Sharma (Ph.D., IIT Kanpur) Oct-23 4
MEMORY INTERFACE DESIGN
Designing a memory interface for a microprocessor consists of the following steps:
▪ We first decide the size of the memory required and the address range it should
occupy (memory map).
▪ We then choose the type of the memory device to be used based on cost and other
conditions such as speed, availability etc.
▪ Based on this information, we now know how many chips of the chosen device are
needed to give the required memory size.
▪ Then, we design the circuitry that will enable the memory to communicate with the µP
whenever the µP initiates either a read or a write cycle, and disables it at other times.
If the memory consists of more than one chip, only the appropriate chip or chips
should be enabled.
▪ Occasionally, the design has to be modified to take into account the timing
considerations, i.e., the memory should respond to the CPU neither too quickly nor
too late.

Dr. Asha Sharma (Ph.D., IIT Kanpur) Oct-23 5

MEMORY ADDRESS DECODING
▪ Memory address decoding circuit utilizes the address lines of the microprocessor to
generate the signals that enable the appropriate memory chips as required. The chip
select function of the memory device is used for this purpose.
▪ The decoding circuit may use either a decoder or gates or a combination of both.

EXAMPLE:
▪ Let us assume that we want to design a memory circuit of size 2 K-bytes of RAM to be
interfaced to an 8085 microprocessor.
▪ Let us choose the address for this memory from 0000H to 07FFH.
▪ Let us assume that we have a single memory chip of size 2 K-bytes at our disposal. To
address 2 K-bytes, we need 11 address lines. Of the 16 address lines A0 to A15 of the
8085, we will use the lines A0 to A10 for this purpose. This will give all the address
combinations from 000H to 7FFH and we will be able to access any of the locations in
the 2 K-byte RAM.

Dr. Asha Sharma (Ph.D., IIT Kanpur) Oct-23 6

▪ Contd…….

▪ However, we should not leave the five higher address lines A11 to AI5 unused.
▪ These lines should all be 0s in order to uniquely define the address range 0000H to
07FFH.
▪ For any other combination of values on these lines, other address ranges in the overall
64 K memory may be selected.
▪ The operation of utilising these higher address lines to uniquely enable only the required
memory address and exclude other addresses is called memory decoding and the
circuit which does this is called the memory decoding circuit

Dr. Asha Sharma (Ph.D., IIT Kanpur) Oct-23 7

▪ Contd…
▪ Figure shows the memory decoding circuit for the example discussed in the previous two slides.
Notice that t goes low (and thus enables the memory) only when the lines A11 to A15 are all 0s.

Dr. Asha Sharma (Ph.D., IIT Kanpur) Nov-23 8

▪ Contd…..
▪ That is, this circuit will respond only to addresses 0000H to 07FFH and to no other combinations.

▪ is the output enable signal and the memory can be read from only when this is active low.
▪ When and of the 8085 are both low, it indicates a memory read cycle and the OR gate
output is low which enables
▪ Similarly, for a memory write cycle and are low and the corresponding OR gate output
goe s low which enables the memory write operation.

Dr. Asha Sharma (Ph.D., IIT Kanpur) Nov-23 9

▪ Question (Home-Work)
Design a memory circuit to interface a 4 K-byte RAM to an 8085 microprocessor with starting
address 7000H.

▪ Question (ASSIGNMENT)
Design a memory system of size 8 K-bytes to interface with the 8085 microprocessor. Start with the
address 0000H. Assume that you have to use four pieces of 2 K-bytes RAM.

Dr. Asha Sharma (Ph.D., IIT Kanpur) Nov-23 10