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Lect 8,9 Differential Amplifiers

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22 views24 pages

Lect 8,9 Differential Amplifiers

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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Electronic Circuits II

Lecture 8,9: Differential Amplifiers

Woo-Young Choi
Dept. of Electrical and Electronic Engineering
Yonsei University
Lect. 8,9: Differential Amplifiers
(Razavi 10.3)
Symmetric (M1 and M2 are identical)
MOS Differential Pair
Input: VG1, VG2
Output: VD1 - VD2

If Vin1 = Vin2,
Vout1 = Vout2 = VDD – 1/2 ISS RD

Vout = Vout1 - Vout2 = 0

If Vin1 > Vin2, Vout1 < Vout2


If Vin1 < Vin2, Vout1 > Vout2

Relationship between Vout and (Vin1 - Vin2 )?


Vout = f(Vin1 - Vin2 )
 Differential amplifier if f(Vin1 - Vin2 ) is linear

Electronic Circuits 2 (20/1) 2 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

- Why differential pair?

- Any noises simultaneously affecting


both inputs can be cancelled out

 Larger SNR

- Often used in analog IC design

Op-amp
Vout = f(Vin1 - Vin2 )

What is f(Vin1 - Vin2 )?

Electronic Circuits 2 (20/1) 3 W.-Y. Choi


Lect. 8,9: Differential Amplifiers
Large Signal Analysis
From Razavi pp. 499-500
(Ignoring channel-length modulation)

Vout = f(Vin1 - Vin2 )

When is DVin,max reached?

Electronic Circuits 2 (20/1) 4 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

Vout = f(Vin1 - Vin2 ) Vout = Vout1 - Vout2 = (VDD – ID1RD) - (VDD – ID2RD)

= - RD ( ID1 – ID2)

Linear around Vin1=Vin2

Differential amplifier for small DVin


Amplifier gain?

Electronic Circuits 2 (20/1) 5 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

For easier analysis, express two inputs as:


Differential amplifier
DVin DVin
Vin1  VCM  , Vin 2  VCM 
2 2

Vin1  Vin 2
VCM  , DVin  Vin1  Vin 2
2
Average Difference

Common Mode Differential Mode


Amplifier gain?

 Superposition

Electronic Circuits 2 (20/1) 6 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

Differential Mode
DVin DVin
Vin1  VCM  , Vin 2  VCM 
2 2

Differential mode small-signal circuit


(Without rO)

Circuit configuration is anti-symmetric

Voltage in the middle must be zero

Electronic Circuits 2 (20/1) 7 W.-Y. Choi


Lect. 8,9: Differential Amplifiers
Differential Mode
DVin DVin
Vin1  VCM  , Vin 2  VCM 
2 2

DVout1 = - DVout2

Need to consider only half the circuit

DVout / DVin = - gm RD DVout1 = - gm DVin/2 RD


 CS Amplifier DVout2 = gm DVin/2 RD
With rO?
DVout = - gm DVin RD
DVout / DVin = - gm RD || rO

Electronic Circuits 2 (20/1) 8 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

DVin DVin
Vin1  VCM  , Vin 2  VCM 
2 2 Common Mode

Vout1 = Vout2 = VDD - ISS/2 RD Vout = 0

No CM gain

Electronic Circuits 2 (20/1) 9 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

DVin DVin Common Mode Vout = 0


Vin1  VCM  , Vin 2  VCM 
2 2
VCM,max ?
VDS  VGS  VTH
I
(VDD  RD )  (VCM  VGS )  VGS  VTH
2
I
VDD  RD  VTH  VCM
2
I
VCM ,max  VDD  RD  VTH
2

VCM,min?
With too small VCM, current source does not work

 Input CM range

Electronic Circuits 2 (20/1) 10 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

Common Mode
DVin DVin
Vin1  VCM  , Vin 2  VCM 
2 2 Vout1 = Vout2 = VDD - IDRD Vout = 0

Vout1, Vout2 always fixed?

open

L and R symmetric
Current source has finite resistance

Electronic Circuits 2 (20/1) 11 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

Common Mode
DVin DVin
Vin1  VCM  , Vin 2  VCM 
2 2 Vout1 = Vout2 = VDD - IDRD Vout = 0

Is CM output always fixed?

CS with degeneration (Lecture 4)

DVout1 = DVout2
open
RD
RD Av  
 DVCM 1
1  RS
 2 RSS gm
gm

Vout = 0
Need to consider
only half the circuit

Electronic Circuits 2 (20/1) 12 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

(Summary) DVin DVin


Vin1  VCM  , Vin 2  VCM 
2 2

Differential Mode
DVout = - gm RD DVin CS

ADM   gm RD
Common Mode
RD
DVout1 = DVout2  DVCM CS with
1 degeneration
 2 RSS
gm
Vout = 0

ACM  0

Electronic Circuits 2 (20/1) 13 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

Differential pair is based on the symmetry

Anything that breaks the symmetry affects its performance

Electronic Circuits 2 (20/1) 14 W.-Y. Choi


Lect. 8,9: Differential Amplifiers
DVin DVin
Vin1  VCM  , Vin 2  VCM 
2 2 Differential Mode
DVout = 1/2 gm RD DVin
Single-ended Output
g R
ADM  m D
2

Common Mode
RD
DVout =  1 DVCM
 2 RSS
gm
RD
ACM  
2 RSS
CMRR (Common-Mode Rejection Ratio)

ADM
~ gm RSS
ACM

Electronic Circuits 2 (20/1) 15 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

Mismatch in components

Assume DRD << RD

+ DRD

CM
R RD  DRD
DVout 1 ~  D  DVCM DVout 2 ~   DVCM
2 Rss 2 Rss
DRD
DVout 1  DVout 2 ~  DVCM
2 Rss
DRD
ACM ~
2 Rss

Electronic Circuits 2 (20/1) 16 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

Mismatch in components Assume DRD << RD

DM

++DR
DRDD

Assume anti-symmetric

DVin DVin
DVout 1 ~  gm RD DVout 2 ~  gm ( RD  DRD )(  )
2 2
DVin
~ gm RD
2
DVout  DVout 1  DVout 2 ~  gm RD DVin

ADM ~  gm RD No influence

Electronic Circuits 2 (20/1) 17 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

Mismatch in components
Assume DRD << RD

DRD
+ DRD ACM ~ ADM ~  gm RD
2 Rss

Vin1 Vin2
CMRR (Common-Mode Rejection Ratio)

ADM gm RD (2 Rss ) R
~  2 gm Rss D
ACM DRD DRD

Electronic Circuits 2 (20/1) 18 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

Active-loaded differential amplifier


No resistors

 Better matching, smaller size

But has to be single-ended

Common mode
Equal currents in L and R
 VSG3

Vout = VDD-VSG3

Electronic Circuits 2 (20/1) 19 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

Differential Mode

Guess the half-circuit analysis is still valid

DVout g ( r || r )
 mN ON OP
DVin 2

Is this correct?

Electronic Circuits 2 (20/1) 20 W.-Y. Choi


Lect. 8,9: Differential Amplifiers
Small-signal circuit
Differential mode

With complicated analysis (Razavi 10.6.2)


1
rOP [1  g mP (  rOP )]
DVout g mP
 g mN rON
DVin 2rON  2rOP
DVout gmN ( rON || rOP )
 ? 2rOP
DVin 2 ~ g mN rON  g mN (rON  rOP )
2rON  2rOP

Roughly factor of 2 difference

Electronic Circuits 2 (20/1) 21 W.-Y. Choi


Lect. 8,9: Differential Amplifiers

Why factor of 2 difference?

With half-circuit analysis,


the current mirror action is not considered

Current mirror doubles short-circuit transconductance


g mN
Gm :    g mN
2
AV  Gm Rout Rout  rON  rOP

g mN (rON  rOP )
 g mN ( rON  rOP )
2

Electronic Circuits 2 (20/1) 22 W.-Y. Choi


Lect. 8,9: Differential Amplifiers
Homework: (Due 4/6 10am)

Determine voltage gain, Vout / (Vin1-Vin2), for each of following differential amplifiers.
Assume circuits are left-right symmetric and all the current sources are ideal.
Consider rO for each transistor. For (c), make the approximation as was done in the
lecture.

(a) (b) (c)

Electronic Circuits 2 (20/1) 23 W.-Y. Choi


Lect. 8,9: Differential Amplifiers
Lect. 1: Introduction
Lect. 2: MOSFET large-signal characteristics
Lect. 3: MOSFET small-signal characteristics
Lect. 4: CS amplifier
Lect. 5: SF CG amplifiers
Lect. 6: Cascode amplifer
Lect. 7: Bias circuits and current mirrors
Lect. 8,9: Differential amplifier
Class on 4/6 will be done through zoom in real-time (13:00 ~ 13:50)
ID and Pass word will be posted in YSCEC
Attendance will be checked
Real-time Q/A in Korean
If necessary, review quiz
(Problems posted through zoom and you submit the screen shot of your answer
through YSCEC. Results counted as homework of 4/6 lecture.)

Electronic Circuits 2 (20/1) 24 W.-Y. Choi

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