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Coa Bcs352 Lab-7

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27 views2 pages

Coa Bcs352 Lab-7

Uploaded by

paramjeetsingh16346
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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[Approved by AICTE, Govt. of India & Affiliated to Dr.

APJ
GL BAJAJ
Institute of Technology & Management
Abdul Kalam Technical University, Lucknow, U.P., India]
Department of Computer Sc. & Engineering (AI)
Greater Noida

Experiment No.:7

Object: -Design of an 8-bit ARITHMETIC LOGIC UNIT

Software Used: Logisim

Theory:
Design of ALU: An 8-bit arithmetic logic unit (ALU) is a combinational circuit which operates on two
8-bit input buses based on selection inputs. The ALU performs common arithmetic (addition and
subtraction) and logic (AND, INV, XOR, and OR) functions. These operations are common to all
computer systems and thus are an essential part of computer architecture.
A simple block diagram of a 4-bit ALU for operations AND ,OR ,XOR and Add is shown here :

The 4-bit ALU block is combined using 4 1-bit ALU blocks.


Design Issues:
The circuit functionality of a 1-bit ALU is shown here, depending upon the control signal S 1 and S0 the
circuit operates as follows:
for Control signal S1 = 0, S0 = 0, the output is A AND B,
for Control signal S1 = 0, S0 = 1, the output is A OR B,
for Control signal S1 = 1, S0 = 0, the output is A XOR B,
for Control signal S1 = 1, S0 = 1, the output is A Add B.

Using a similar approach, the 8-bit ALU block is combined using 8 1-bit ALU block.
for Control signal S2 = 0, S1 = 0 & S0 = 0, the output is A AND B,
for Control signal S2 = 0, S1 = 0 & S0 = 1, the output is A OR B,
for Control signal S2 = 0, S1 = 1 & S0 = 0, the output is A XOR B,
for Control signal S2 = 0, S1 = 1 & S0 = 1, the output is A NOR B,
for Control signal S2 = 1, S1 = 0 & S0 = 0, the output is A NAND B,
for Control signal S2 = 1, S1 = 0 & S0 = 1, the output is A ADD B,
for Control signal S2 = 1, S1 = 1 & S0 = 0, the output is A SUB B,
for Control signal S2 = 1, S1 = 1 & S0 = 1, the output is A XNOR B,
[Approved by AICTE, Govt. of India & Affiliated to Dr. APJ
GL BAJAJ
Institute of Technology & Management
Abdul Kalam Technical University, Lucknow, U.P., India]
Department of Computer Sc. & Engineering (AI)
Greater Noida

OUTPUT:

RESULT: An 8-bit ARITHMETIC LOGIC UNIT is designed/implemented, and its outputs are
verified.

VIVA QUESTIONS
1. ALU is the place where the actual executions of instructions take place during the processing
operation (T/F).
2. Which of the following is not a bitwise operator?
a) |
b) ^
c) .
d) <<
3. The sign magnitude representation of -1 is __________/
4. The ALU gives the output of the operations, and the output is stored in the ________.
5. The bitwise complement of 0 is ___________.

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