NAGPUR INSTITUTE OF TECHNOLOGY, NAGPUR

DEPARTMENT OF COMPUTER SCI. & ENGINEERING

ODD SESSION: 2024-2025
------------------------------------------------------------------------------------------------------------------------
Unit wise University Question Bank
Semester/ Branch: - III-SEM -CSE Subject code: - BECSE304T
Subject Name: Computer Architecture & Digital System

Unit No: 1

Que. No Questions

1 Explain Single bus structure. Discuss it advantages & disadvantages.

2 State different basic & universal gates in detail.

3 Explain Boolean expression with its types.

4 Describe about Demorgan’s law.

5 Tell about minimization of combinational circuit using Karnaugh map (2, 3, 4 inputs)

6 Design 16:1 MUX using 2IC’s of 8:1(74151) and 2:1(7432) multiplexer detail.

Design 8:3 encoder & 3:8 decoder with truth table. Describe 3(Encoder input) and
7
3(Decoder output) line is High.

8 Explain & Implement 1:8Demux with 0, 2, 5 output High in detail.

Minimize the following function using K-map

9 F (A,B,C,D) = A’B’C’D’ + A’B’CD’ + A’BC’D’ + A’BCD + AB’CD’ + AB’C’D +

ABC’D + ABCD.

10 What are the different addressing instruction of bus structure in detail.

11 Tell the detail about different addressing mode.

Minimize the following function using K-map

12
F (A,B,C,D) = A’B’C + ABC +AB’C + A’BC.
Minimize the following function using K-map
13
F (A, B, C, D) = ∑ m (5, 7, 15) + d (13).
Minimize the following function using K-map
14
F (A, B, C, D) = π M (1, 3, 4, 9, 11, 6, 7, 15, 12). d (13, 14, 15).

15 Draw & explain multiple bus structure, discuss its advantages and disadvantages in detail
 Define and draw NAND Gate, NOR Gate with their Truth table and Logic symbol. Why
16
they are known as Universal Logic Gate. W-22
Reduce the expression using k - map f =  (0,1,3,5,7,8,9,10,12,13) and implement the real
17
minimal expression in universal logic. W-22
Implement the following logic function using an 8 1MUX;F (A,B,C,D) = m
18
(1,3,4,11,12,13,14,15). W-22
Obtain –4 to –16 decoder using 3 - to - 8 decode rs with suitable logic diagram and
19
function table. W-22
Explain the working of-
20
i) Encoder ii) Decoder With the help of neat diagram S-23
State & Explain Demorgan’s law for multiplication & addition use suitable data to prove
21
that LHS and RHS are equal. S-23

Unit No: 2
Que. No Questions

1 Draw & explain Single bus structure in detail.

2 Draw & explain Functional units.

3 Detail with diagram of Von Neumann Architecture.

4 Explain with diagram Basic operational concepts.

5 State the different addressing mode.

6 Explain about Two address instructions of bus structure in detail.

7 What are the different addressing instructions of bus structure in detail?

8 Explain about Zero address instructions of bus structure.

9 Tell the detail about different addressing mode.

10 Explain about Three address instructions of bus structure in detail.

11 What do you mean by Subroutine?

12 Draw & explain Multiple bus structure in detail.

 13 What do you mean by Subroutine with parameter passing?

14 Explain about One address instructions of bus structure in detail.

15 Draw & explain Functional units in basic structure of computers.

16 Explain Von Neuman Architecture in detail. W-22

17 What is addressing mode? Explain any six addressing modes. W-22

18 What are subroutines? Explain the execution sequence of nested subroutines. W-22

19 Explain Direct & Indirect addressing mode with example. S-23

What do you mean by Instruction format?

Explain in detail the following.
20
i) Zero Address instruction. ii) One Address instruction
iii) Two Address instruction iv) Three Address instruction. S-23 (2+8 =10M)

Unit No: 3

Que. No Questions

1 Write a note on Hardwired control unit.

2 Write a note on Microprogramming control unit.

3 Write a note on Micro instruction format.

4 Draw & explain Bus architecture in detail.

5 Explain Execution of a complete instruction.

6 Explain Sequencing of control signals.

Write a note on:

7 a) Hardwired control unit.

b) Microprogramming control unit.
c) Micro instruction format.

8 How you execute instruction tell in detail.

9 Explain in detail about Instruction format.

 10 Explain in tabular form of Micro instruction.

11 Explain Hardwired control unit with neat & clean diagram.

12 What do you mean by Instruction format?

13 How you execute instruction in computer organization.

14 Explain in tabular form of Micro instruction in detail.

15 Explain Sequencing of control signals.

Write down the control sequence for fetching a word from memory using single bus organization
16
W-22
Explain the difference between hardwired control unit and microprogrammed control unit with
17
neat diagram. Illustrate the concept hardwired control associated with a control memory. W-22
Give the complete instruction sequence of i) Addition of two number e.g. (A=B+C) ii)
18
Multiplication of Two numbers (e.g. A= B*C) S-23

UNIT NO. 4

Que No. Questions

1 What do you mean by Fast Adder? Draw & explain in detail.

2
Explain in detail about Booth’s algorithm with ‘one example’.

3 Convert following Decimal number into binary, octal, hexadecimal number 19.35.
4 Perform a binary division by given number,
a) 33/6
b) 25/5
c) 78/4.
5 Explain hardware for Integer division, divide 17/3 using restoring & non-
restoring method.
6 Solve the following multiplication by using booth’s algorithm “- 47*3”.

7 Give Double precision IEEE floating point format.

8 Give Single precision IEEE floating point format.

 9 Explain about Array multiplier in detail.

10 Explain in detail Integer division using restoring method.

11 Convert binary to Decimal 110010011.

12 Explain in detail Integer division using non-restoring method.

13 Convert binary to Hexadecimal 110010011.

14 Solve the following multiplication by using booth’s algorithm “13*7”.

15 Explain about Binary Subtractions with given example 33-15.

16 Multiply (−13  + 27 ) using Bit - pair coding (fast multiplication) method. W-22

17 Divide 31 by 8 using Restoring Division method. W-22

18 Represent 1 1 and 16 32 − in IEEE single and Double Precision format. W-22

19 Multiply (+13  +6 ) using Booth’s algorithm. W-22

20 What do you mean by Integer division? Solve the following using Restoring
Division. 7  3. S-23
21 What is Bit pair recording? Explain. S-23

22 Explain Guard bit. S-23

UNIT NO. 5

Que No Questions
1 Difference between IO mapped I/O & memory mapped I/O device.

2 Explain about Guard bit & Rounding in detail.

3 Write a short note on Vectored Interrupt.

4 Difference between Synchronous & Asynchronous data transfer.

5 What do you mean by Interrupt? Explain in detail.

6
Explain in detail Address space & memory space.
7 Write a short note on Interrupt handling mechanism.

8 Tell detail in Memory hierarchy.

9 Write a short note on Cache memory.

10 Write on Auxiliary memory.

11 Write a short note on Various technologies used in memory.

12 Tell Cache optimization in detail.

13 Write a short note on Associative memory.

14 Write a short note on Page table.

15 Difference between Address space & memory space.

16 What is virtual memory/ Describe address translation scheme in virtual memory. W-22

17 Design 4m 32  memory using 512K 8 static memory chip. W-22

18 Explain any four.

i) Page table. ii) Associative memory. iii) Synchronous data transfer. iv) Interrupts

handling mechanism. v) Memory Interleaving.

19 What is Memory hierarchy? Explain the Role of main memory and advantages of

cache memory in detail with diagram. S-23

Prepared by Approved by
Dept. Head
(Prof. Nikita Dhanvijay) (Dr. Shrikant Zade)