Practice Assignment No-4 Digital Logic Design Fall 2024

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School of Electrical Engineering and Computer Science

National University of Sciences & Technology (NUST)


Practice Assignment No-4
Subject: Digital Logic Design Course: BEE-15AB
Teacher: Engr. Arshad Nazir Issue: 13 Oct 2024

✓ This is a non-graded assignment prepared to enhance problem-solving skills of


students from chapter3 of the textbook.
✓ The students are advised to attempt it any time of their convenience.
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Problem No-1 Design a code converter that should convert a Hexadecimal digit to 7-bit
ASCII code. List truth table, write minterm list equations for each output
variable, simplify each output function using K-maps and draw the logic
diagram using minimum number of AND, OR, and NOT gates. Assume
that only normal inputs are available from the source. If AND/OR gates
have a propagation delay of 10 ns, and propagation delay of NOT gates
be 5ns. What is the total propagation delay time in the converter?

Problem No-2 A BCD to seven-segment decoder is a combinational circuit that converts


a decimal digit in BCD to an appropriate code for the selection of
segments in a display indicator used for displaying the decimal digit in a
familiar form. The seven outputs of the decoder (a, b, c, d, e, f, g) select
the corresponding segments in the display, as shown in figure P4-9(a) of
your textbook and reproduced below. The numeric display chosen to
represent the decimal digit is shown in figure P4-9(b). Design the BCD to
seven-segment decoder using a minimum number of gates. The six
invalid combinations result in a blank display.

Problem No-3 Braille is a system which allows a blind person to read alphanumeric by
feeling a pattern of raised dots. Design a circuit that converts BCD to
Braille. The table shows the correspondence between BCD and Braille.
Realize this circuit with two-level NAND gates having a maximum
fan-in of four. Use minimum number of gates in design.

Problem No-4 Design a 4-bit Arithmetic Logic Unit (ALU) to perform the following
functions

Use 2-to-1 multiplexers, binary adders, and gates as


needed. Assume that A and B are both 4-bit numbers. Draw the
logic circuit.

Problem No-5 A computer can execute instructions to perform shift operations on the
contents of a general-purpose shift register. A logic shifter is a
combinational circuit capable of rotating the given 4-bit data to the left by
n positions, where 0≤n≤3.

Design a combinational logic shifter with 4-bit input and 4-bit output as
follows:

__ Shift Count Output

OE S0 S1

1 × × High impedance output lines

0 0 0 No Shift
0 1
0 Left Shift once
1 0
0 Left Shift twice
1 1
0 Left Shift three times

Where x means don’t care conditions, List truth table.


Draw logic diagram of 4×4 shifter register using multiplexers and tri-state
buffers.
Problem No-6 Implement the following Boolean function with 4:1 multiplexer and
external gates: -
F(A,B,C,D)=∑(1,3,4,11,12,13,14,15)

Connect inputs A and B to the selection lines. The input requirements


for the four data lines will be a function of the variables C and D.
The values of these variables are obtained by expressing F as a function
of C and D for each of the four cases when AB=00, 01,10and 11. These
functions must be implemented with external gates.

Problem No-7 Design a “disk spinning” animation circuit for a CD player. The input to the
circuit will be a 3-bit binary number A1, A2, A3 provided by another circuit. It
will count from 0 to 7 in binary, and then it will repeat. The animation will
appear on the top four lights of the LED display of Figure P7, i.e on X1, X2,
X7, and X6, going clockwise. The animation should consist of a blank spot
on a disk spinning around once, beginning with X1. Then, the entire disk
should blink on and off twice.

Figure P7 Disk Spinning Animation Circuit

Design the circuit using only 2, 3, and 4-input NOR gates and inverters.
Try to minimize the number of gates required. Any solution which uses 11
or fewer gates (not counting the inverters for the inputs) is acceptable.

Problem No-8 Design a combinational circuit with three inputs, x, y, and z, and three
outputs, A, B, and C. When the binary input is 0, 1, 2, or 3, the binary
output is one greater than the input. When the binary input is 4, 5, 6, or 7,
the binary output is two less than the input.
Problem No-9 Realize the logic circuit shown in Figure P9 with an 8:1 multiplexer
constructed from two 4:1 multiplexer with enable input E, an inverter, and
one OR gate. Use minimum number external logic gates.

Figure P9: Logic Circuit

Problem No-10 Design a circuit which displays the letters A through J on a seven-
segment indicator. The circuit has four inputs W, X, Y, and Z which
represent the last 4 bits of the ASCII code to be displayed. For example, if
WXYZ=0001, “A” will be displayed. The letters should be displayed in the
following form:

Design your circuit using only 2, 3, and 4-input NOR gates and inverters.
Any solution with 22 or fewer gates and inverters (not counting the four
inverters for the inputs) is acceptable.
Problem No-11 Design a commercial Octal-to-binary priority encoder with inputs D0, D1,
D2…, D7 and outputs x, y, z. Provide an output V to indicate that at least
one of the inputs is present. The input with the lowest subscript number
has the highest priority.

Specify the truth table, derive algebraic expressions for each output
function and draw the logic diagram of the encoder circuit using AND,
OR, and NOT gates.

Problem No-12 Implement the following functions using decoders and any size OR gates
you may need

F(P,Q,R)= (PQ+R)´ using a 3:8 decoder


F(P,Q,R,S,T)=(P+Q)S+(R+T)S´ using two 2:4 decoders
f(a,b,c,d)=Ʃm(0,3,5,7,11,12,13,15) using a 4:16 decoder
Problem No-13 In a certain chemical – processing plant, a liquid chemical is used in a
manufacturing process. The chemical is stored in three different tanks. A
level sensor in each tank produces a HIGH voltage when the level of
chemical in the tank drops below a specified point.

Design a circuit that monitors the chemical level and indicate when the
level in any two of the tanks drops below the specified point.

Draw the circuit using NAND – AND two-level implementation.

Problem No-14 In a simple copy machine, a stop signal s is to be generated to stop the
machine operation and energizing an indicator light whenever either of
the following conditions exist: (1) There is no paper in the paper feeder
tray or (2) the two micro switches in the paper path are activated,
indicating a jam in the paper path.

The presence of paper in the feeder tray is indicated by a HIGH at logic


signal P. Each of the micro switches produces a logic signal (Q & R) that
goes HIGH whenever a paper is passing over the switch to activate it.
Design the logic circuit to produce a HIGH at output signals for the stated
condition and implement it using two-input NAND gates only.

Figure Problem 14: A Combinational Circuit

Problem No-15 Professor Ali computes grades as follows: He uses only the first digit
(that is, 9 for averages between 90 and 99). He never has an average of
100. He gives a P (pass) to anyone with an average of 60 or above and
an F to anyone with an average below 60. That first digit is coded in 8421
code (that is, straight binary, 5 as 0101, for example); these are inputs w,
x, y, and z.

Give the truth table of the problem. Implement the circuit using decoder
and logic
Problem No-16 The system is a speed warning device. It receives, on two lines, an
indication of the speed limit on the highway. There are three possible
values 45, 55, or 65 MPH. It receives from the automobile, on two other
lines, an indication of speed of the vehicle. There are four possible values
under 45, between 46 and 55, between 56 and 65, and over 65 MPH. It
produces two outputs. The first f indicates whether the car is going above
the speed limit. The second g indicates that the car is driving at
“dangerous speed” – defined as either over 65 MPH or more than 10
MPH above the speed limit. Show how each of the inputs and outputs are
coded (in terms of binary values) and complete the truth table for the
system. Design the system using appropriate size of multiplexers.

Problem No-17 A combinational circuit is depicted below,

A F
Combinational
B
circuit
C

X Y
The system truth table is
X Y F

0 0 C

0 1 A Plus D

1 0 B Plus C

1 1 D

Implement the circuit using following components only


Two 2 X 1 MUX
One Half Adder
One gate of each type (As required)
Problem No-18 Design a priority encoder with four active high inputs 0, 1, 2 and 3 and
three active high outputs A and B indicating the number of the highest
priority device requesting service, and N indicating no active requests.
Input 0 is the highest priority (and 3 the lowest). Give the truth table and
Boolean expression for the outputs as a function of inputs.
Problem No-19 Design a Gray code converter to drive a seven-segment indicator. The
four inputs to the converter circuit (A, B, C, and D) represent a decimal
digit coded using the Gray code. Assume that only input combinations
representing the digits 0 through 9 can occur as inputs, so that the six
unused combinations are don’t care terms.

Implement your design with Two-Level NAND-NAND form. Try to


minimize the number of gates and inverter as required. The variables A,
B, C and D will be available from the toggle switches.

Problem No-20 A simple security system for two doors consists of a card reader and a
keypad.

A person may open a door if he or she has a card containing the


corresponding code and enters an authorized keypad code for that card.
The outputs from the card reader are as follows:
A B

No card inserted 0 0

Valid code for door1 0 1

Valid code for door2 1 1

Invalid card code 1 0

To unlock a door, a person must hold down the proper keys on the
keypad and, then, insert the card in the reader. The authorized keypad
codes for door1 are 3-bit odd numbers whereas authorized keypad codes
for door2 are the 3-bit even numbers. If the card has an invalid code or if
the wrong keypad code is entered, the alarm will ring when the card is
inserted. If the correct keypad code is entered, the corresponding door
will be unlocked when the card is inserted.

Design the logic circuit for this simple security system. Your circuit inputs
will consist of a card code AB, and a keypad code CDE. The circuit will
have three outputs XYZ (if X or Y=1, door1 or 2 will be opened; if Z=1, the
alarm will sound). Implement the output function X with a 5:32 decoder
constructed from four 3:8 decoders using NAND gates with enable input
E, one 2:4 decoder , and an external logic gate.

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“Good Luck”

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