COMPUTER ORGANISATION communication pathway to the CPU.

This leads to a limited rate of data transfer (throughput)

between the CPU and memory, a situation known as the Von Neumann bottleneck. The Von

INTRODUCTION Neumann bottleneck arises from the fact that CPU speed and memory size have grown at a
much more rapid rate than the throughput between them. Thus, although memory may hold
A modern computer can be defined as a machine that can accept instructions and perform
a lot of data that needs to be processed, and the CPU may be using only a fraction of its
computations based on those instructions. A computer takes data as input from the user and
computational power, the limited data access speed prevents the computer from doing its work
processes this data under the control of a set of instructions called program, and gives the result
any faster.
as output and can save the data for future use. The machine part of the computer consists of
physical components called the hardware, while the program part consists of intangible
Another architecture that is used to design computers is the Harvard architecture. The Harvard
components called the software. This combination of hardware and software forms the computer
computer architecture stores program instructions and data in separate memories. The
system.
programs memory and data memory have different communication pathways to the CPU.
Computer organization refers to the physical organization of the hardware components of a
computer system, and to the characteristics of these components. It includes the high-level aspects
of a computer’s design, such as the memory system, the memory interconnect, and the design of Instruction Memory
the internal processor or CPU.

1. BASIC STRUCTURE OF COMPUTERS ALU

Most of today’s computer designs are based on concepts developed by the Hungarian born Input Unit Output Unit
mathematician John Von Neumann, referred to as the Von Neumann architecture. In its strictest Control Unit
definition, the term Von Neumann computer refers to a specific type of computer architecture
in which instructions and data are stored together in a common memory. It is a stored-program
computer model based on the following three concepts: Data Memory
• Data and instructions are stored in a single read-write memory.
• The contents of this memory are addressable by location, without regard to the type of data Block diagram of Harvard Computer
contained there.
• Execution occurs in a sequential fashion (unless explicitly modified) from one instruction to
1.1. THE PROCESSING UNIT
the next.
The Central Processing Unit (CPU), also called processor, is the part of the computer that
controls the operation of the computer and performs its data processing functions by
First implemented in the Electronic Discrete Variable Automatic Computer (EDVAC), the Von
interpreting and executing sequence of instructions representing programs. The CPU is
Neumann computer architecture became the prototype for all subsequent general-purpose
often referred to as the brain of the computer. Modern CPUs are microprocessors,
computers. A Von Neumann computer consists of five major units: input unit, arithmetic/logic
meaning that they are contained on a single integrated circuit (IC) chip. An integrated
unit, control unit, memory unit and output unit.
circuit is semiconductor material on which thousands or millions of tiny electronic
components (transistors, resistors, capacitors, and diodes) are connected together as a
The Arithmetic/Logic Unit
circuit. This technology of creating an integrated circuit by combining thousands or
(ALU), and the Control ALU
millions of transistors on a single chip is known as very large scale integration (VLSI).
Unit (CU) operate Input Unit Output Unit Besides the ALU and the Control unit which are the main components of the CPU, other
together to form the
Control Unit CPU components include Registers, Cache memory, and buses.
Central Processing Unit
(CPU). Instructions and
Arithmetic/Logic Unit
data are stored in the Memory Unit
same memory unit and The Arithmetic/Logic Unit (ALU) is responsible for performing arithmetic and logical
share a common operations. These are essential operations that need to be done on almost any data that
Block diagram of a Von Neumann Computer

1
is being processed by the CPU. Arithmetic operations include addition, subtraction, So, while the PC holds the address of an instruction, the IR holds an actual
multiplication and division while logical operations include comparisons. Bitwise logical instruction.
operations (AND, NOT, OR etc.) and shift operations are also performed the ALU to
manipulate individual bits. • Accumulator
The accumulator (AC) holds results of computations performed by the ALU. When
Control Unit the ALU executes an instruction, it stores the result in the accumulator either for
The Control Unit is responsible for coordinating and controlling all the operations of the reuse by the ALU or before it is sent to a destination register.
computer. It does this by issuing timing and control signals to the other units, instructing
them on how to respond to a program’s instructions. By locating and retrieving program • Memory Address Register
instructions from memory, interpreting them and ensuring that they are executed in The memory address register (MAR) holds the memory address where data is to be
proper sequence, the control unit acts like supervisor seeing that things are done the read (fetched) or written (stored). To fetch an instruction from memory for
way they ought to. execution, the address of the instruction is moved from the PC into the MAR. Once
the address is in the MAR, the instruction in that memory location is copied into the
Registers IR. Also, if the CPU needs any data from memory, the memory address of that data
Registers are storage locations within the CPU that hold instructions and data that the is loaded into the MAR. Once it is loaded, the required data is copied from that
processor is working on. All arithmetic and logic operations take place within registers. location into the memory data register.
Each register typically holds a word of data, often 32 or 64 bits, depending on the word
size of the computer. The word size refers to the maximum number of bits that the • Memory Data Register
processor can manipulate at the same time. Since the CPU uses registers for the The memory data register (MDR) holds data that has been read in from memory or
processing of data, the number of registers in a CPU and the size of each register, affect data produced by the ALU and waiting to be written to memory. When the result of
the power and speed of the CPU. a computation performed by the ALU is to be sent to memory, it is moved from the
The register set differs from one computer architecture to another, and is usually a accumulator into the memory data register. Also, any data read from memory is
combination of general-purpose registers and special-purpose registers. General- held in the MDR before it is moved into the ALU for processing. Another name for
purpose registers are used for any purpose according to the needs of the program being the memory address register is memory buffer register (MBR).
executed. Special-purpose registers on the other hand are dedicated to specific tasks or
functions and have special names. Examples of special-purpose registers are the • Status Register
instruction register, program counter, accumulator, status register, memory data register, The status register holds information about the state of the processor. Status
and memory address register. register bits are called flag bits or flags and each flag has a unique purpose. For
example, there are flag bits for negative, zero, overflow, and carry.
• Program Counter - Negative (N): Set to 1 if the result is negative; otherwise, cleared to 0
The program counter (PC) holds the memory location (address) of the next - Zero (Z): Set to 1 if the result is 0; otherwise, cleared to 0
instruction to be executed. When a program is loaded into the computer’s memory - Carry (C): Set to 1 if a carry-out results from the operation; otherwise, cleared to
for execution, the memory address of the first instruction is loaded into the program 0
counter. When that instruction is being executed, the PC is loaded with the address - Overflow (V): Set to 1 if arithmetic overflow occurs; otherwise set to 0
of the instruction that will be executed next. This way the PC always keeps track of
the next instruction to be executed. Buses
A bus is an electronic path along which data travels from one computer component to
• Instruction Register another. It consists of a set of parallel lines that interconnects computer components
The instruction register (IR) holds the instruction that is currently being executed by together, allowing the exchange of data between them. There are buses located within
the processor. When the instruction whose address is in the PC is fetched into the the CPU to move data between CPU components and there are also buses etched onto
CPU for execution, it is stored in the instruction register while it is being executed.

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the motherboard to connect the CPU to memory and to peripheral devices. Depending (220) and giga stands for one billion (230). Thus, a CPU with a clock speed of 2.3GHz can
on their functions buses can be grouped into data bus, address bus and control bus. perform 2,300,000,000 (i.e. 2.3 x 230) cycles in one second. The faster the clock speed, the
more the instructions the processor can execute per second.
• Data Bus A computer will normally have a maximum clock speed set by default, but it is possible
The data bus is a bidirectional path for moving data and instructions between to change this speed in the computer BIOS. Some people increase a CPU clock speed to
system components. Data that is to be processed is carried along the data bus into try to make their computer run faster – this is called overclocking. There are limits to how
the CPU. After processing, the results of computations are also carried from the fast a CPU can run and its circuitry cannot always keep up with an overclocked speed. If
CPU to main memory along the data bus. The width of the data bus is a key factor the clock tells the CPU to execute instructions too quickly, the processing will not be
in determining overall system performance. For example, if the data bus is 8 bits completed before the next instruction is carried out. If the CPU cannot keep up with the
wide, and each instruction is 16 bits, then the processor must access the main pace of the clock, the data is corrupted. CPUs can also overheat if they are forced to work
memory twice just to fetch an instruction. Thus, increasing the size of this bus allows faster than they were designed to work.
more data to be transferred in one go, reducing the number of fetches required to
obtain a complete instruction or data from memory. This increases CPU CPU Cycle
performance as it leads to faster execution of instructions. A program consists of a number of instructions that are executed by the processor when
the program is running. For these instructions to be executed, the program must first be
• Address Bus loaded into the computer’s main memory as well as the data on which the instructions
The address bus is a unidirectional bus that carries address information from the will act – the stored program concept. Once the program and necessary data are in main
CPU to system components. The CPU uses the address bus to send the address of memory, the CPU executes the instructions one after the other in the order specified by
the memory location data is to be written to or read from. Also, when the CPU reads the program. To execute each instruction, the CPU fetches it from memory, decodes it,
data from or writes to a port, it sends the port address out on the address bus. The and executes it. This process of fetching, decoding and executing an instruction is called
width of the address bus determines the maximum possible memory capacity of the the CPU cycle, instruction cycle or fetch-execute cycle.
system. In other words, the size of the address bus determines the address space of
a computer. A computer with a 32-bit address bus can address a maximum of 232 • Fetch Phase
(4GB) memory locations. During the fetch phase, the following activities take place:
o Load content of PC into MAR MAR←[PC]
• Control Bus o Increment PC PC ← [PC]+1,
The control bus is a bidirectional bus that transmits command, timing and specific o Send “Read” signal to memory. MDR ← [Memory]addressed
status information between system components. The data and address buses are o Load content of MDR into IR IR←[MDR]
shared by all the components of the system. To ensure that access and use of these
buses by different components of the system does not lead to conflict, control • Decode Phase
signals must be provided. These signals are provided along the control bus. Typical During the decode phase, the following activities take place:
control bus signals include: memory write, memory read, I/O read, I/O write, bus o Identify “Op-code” of instruction in IR
request, bus grant, transfer ACK, interrupt request, interrupt ACK, Clock and reset. o Identify “Operands” associated with instruction
o Evaluate address [EA] for instructions that require memory access
Processor Speed o Obtain source operands [OP] needed to perform operation
Every processor has a timer or clock that generates regular pulses that synchronize the o Generate signals to activate the circuitry to carryout instruction
operations of the processor, ensuring that all processes and instructions are carried out
and completed at the right time. Each pulse or tick of the clock is called clock cycle and • Execute Phase
the pace of the system clock is known as clock speed or clock rate. Processor speed refers During the execute phase, the following activities take place:
to the number of clock cycles per second that the CPU runs at. Generally, processor speeds o Perform operation using operands
are expressed in megahertz (MHz) or gigahertz (GHz) where mega stands for one million o Do nothing for LOAD and STORE instructions

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1.2. THE STORAGE UNIT Static RAM (SRAM): SRAM is a type of RAM that does not need constant refresh. It
The storage unit consists of computer components that can hold program instructions is made of transistors (on/off switches) that retain their charge over time. It uses 6
and data for use in the computer. A storage device is made of two parts: the storage transistors per bit. SRAM is faster but more expensive than DRAM. Also, SRAM
medium and the drive. The storage medium is the surface or substrate that holds actual consumes more power than DRAM. Due to their cost and high power consumption,
data while the drive is the mechanism that reads from or writes data onto the medium. SRAM is not used as main memory as their size beyond a point will not be
Computer storage is classified basically into two: primary storage and secondary storage. affordable. Rather it is used to build cache memory.

Primary Storage Physically, main memory comes on small little green printed circuit-boards called
Primary storage is computer storage used for holding programs and data that the CPU memory sticks or memory modules. The computer’s motherboard provides slots to
is currently working on. It also called immediate access storage as it can be directly hold 2, 4 maybe 8 memory modules depending on the design. Each memory
accessed by the CPU. Main memory, cache memory and ROM are examples of primary module is itself comprised of several memory chips. Memory modules are grouped
memory. into SIMM and DIMM.

• Random Access Memory Single Inline Memory Module: SIMM has a 30-pin or 72-pin edge connector for
Random Access Memory (RAM), also called main memory, is the computer’s connecting to the motherboard. The 30-pin SIMM transfers 8 bits while the 72-pin
working space. It is the temporary storage space into which a computer loads the SIMM transfers 32 bits of data at a time. SIMM is the oldest type and won’t be seen
operating system, user programs and data when it is running. Programs and related in personal computers again.
data must be loaded into main memory prior to execution by the CPU. Although
slower than register memory, the contents of any location in RAM can still be “read” Dual Inline Memory Module: DIMM has a 168-pin edge connector and supports 64-
or “written” very quickly. The time to read or write is referred to as the access time bits data transfers. DIMMs are typically used in computer configurations that
and is constant for all RAM locations. As a result, any of the data in RAM can be support a 64-bit or wider memory bus.
accessed just as fast as any of the other data – reason why it is called random access A SODIMM (Small Outlet
Memory chips DIMM) is a smaller DIMM that
memory. Everything held in RAM is lost whenever power is switched off. Such
memory that loses its content in the absence of current is said to be volatile. was specifically designed for
The amount of RAM in a computer can have a profound effect on the computer's laptop computers. A 72-pin
performance. When the RAM is full, the operating system will ‘swap out’ some of the SODIMM supports 32-bits data
data to a file on the hard disk drive known as virtual memory. This constant transfers while a 144-pin
swapping of data slows down the speed at which applications can run. With more SODIMM supports 64-bits data
DIMM transfers.
RAM, more of the program instructions and data can be loaded and there is less
need to keep swapping data in and out to the swap file on the hard disk drive. Also, MicroDIMMs are DIMM modules used in subnotebook computers. They have 144
an increase in RAM will improve the multitasking capabilities of the computer as the pins and provide a 64-bits data path.
instructions of several programs will be able to be stored in RAM at the same time.
The principal difference between SIMM and DIMM is that pins on opposite sides of
There are two types of RAM: dynamic RAM and static RAM. a SIMM are "tied together" to form one electrical contact while on a DIMM,
opposing pins remain electrically isolated to form two separate contacts.
Dynamic RAM (DRAM): DRAM is a type of RAM that must be refreshed every few
milliseconds to prevent data loss. This is because DRAM is made of micro capacitors Each memory chip is a matrix of tiny cells, each of which can hold one bit of data.
that slowly leak their charge over time. It uses 1 transistor and 1 capacitor per bit. The size or capacity of each chip is often described in terms of “length x width”
Refreshing takes time and increases the latency of DRAM. Latency refers to the time where the length indicates the depth of the chip (in locations) and the width
taken from a memory access request to the time the data is output. Main memory indicates the width of the chip in bits. A 4M x 8 (read as 4 megabits by 8) chip is a
is DRAM. chip with 4 million locations, each of which is 8 bits wide and a 4K x 32 chip is one
with 4 thousand locations, each of 32 bits wide.
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Exercise 1: A RAM chip has a capacity of 32K x 16. - Level 3 (L3) cache resides on the motherboard.
a. How many memory addresses does this RAM have?
b. How many address lines will be needed for this RAM? • Read Only Memory
Solution: Read Only Memory (ROM) is a kind of computer memory whose contents can only
a. RAM has 32K memory addresses be read by the computer. Data found in ROM is written by the manufacturer and
32K = 32 x 1,024 = 32,768 memory addresses cannot be modified by the user. Small programs called firmware are often stored in
ROM chips on hardware devices (like a BIOS chip), and they contain instructions the
b. 32K = 25 x 210 = 215 computer can use in performing some of the most basic operations required to
To address 32K memory locations we require 15 lines operate hardware devices. An example is the “boot” or start-up program which is
run when the computer is switched on. ROM is non-volatile meaning that its content
Exercise 2: A computer memory is composed of 16 chips, each of size 4K x 8. is preserved even without power. There are four types of ROM.
a. How many memory locations are there in this memory?
b. How many address bits are needed to address this memory? Mask ROM: MROM is ROM programmed with its data when the chip is fabricated.
In the real sense, MROM is never programmed. The data is hardcoded into the
Solution: chip itself when the chip is manufactured.
a. Each chip has 4K memory locations
There are 16 chips Programmable ROM: PROM (pronounced “p-rom”) is a type of ROM that can be
16 x 4K = 16 x 4 x 1,024 = 65,536 memory locations programmed once but not reprogrammed. This is because PROM chips are
manufactured with a series of fuses. The chip is programmed by burning fuses
b. To address 65,536 memory locations were need: which is an irreversible process. The open fuses are read as 1’s while the burned
16 x 4 x 1,024 = 2 x 2 x 2 = 2
4 2 10 16
fuses are read as 0’s. PROM is a way of allowing a user to tailor a microcode
16 address bits program using a special machine called PROM programmer or PROM burner. A
user can therefore buy a blank PROM and use a PROM programmer to program
• Cache Memory it with their stuff.
Cache memory is a small amount of fast memory that acts as buffer between the
CPU and main memory. It holds frequently requested data and instructions so that Erasable Programmable ROM: EPROM is a type of programmable ROM that can
they are immediately available to the CPU when needed. Cache memory is faster be erased and reprogrammed. EPROMS use floating-gate transistors and can be
than main memory (RAM). This means that the CPU can access cache memory more erased by strong ultraviolet light and new data burnt into it. To do this the chip
quickly than it can access RAM. Therefore, retrieving frequently requested data and has to be removed from the computer or device using it, and put back after the
instructions from RAM and storing them into cache memory, speeds up memory changes have been made.
accesses thereby increasing the performance of the computer.
Cache is static RAM and is usually organized in levels: Level 1 cache, Level 2 and Electrically Erasable Programmable ROM: EEPROM is a type of programmable
Level 3 cache. The lower the number, the closer to the CPU’s ALU and CU the ROM whose content can be erased electrically. In this case, the chip need not be
cache resides. The lower the number also means the memory type is faster, and removed from the computer. It is programmable through a process known as
the quicker the data can be accessed. The amount of cache is also smaller in the flashing. Commonly, the system BIOS and other similar devices are forms of
lower faster levels, and higher in the farther levels. EEPROM. The information that is stored in EEPROM is called firmware.
- Level 1 (L1) cache also known as primary or internal cache is built into the CPU Flash memory is a specific type of EEPROM that can only be erased in blocks; it
chip. It resides within the processor itself. cannot be erased one byte at a time. In this regard it resembles a disk that is
- Level 2 (L2) cache also known as secondary or external cache resides external to
divided into sectors. The number of erase/write cycles to a block is typically
the CPU. Early computers had L2 cache on the motherboard, but today’s
several hundred thousand before the block can no longer be written.
processors have L2 cache on the same chip as the processor, but separated from
the inner workings of the processor.

5
Secondary Storage Magnetic Tape: A magnetic tape consists of a magnetically
Secondary storage is computer storage used to hold programs and data for future use coated stripe on which data is stored. Data is stored on the
or backup purposes. Secondary storage is not directly accessible by the CPU as programs magnetic tape in chronological order or sequentially. This
and data from secondary storage must be transferred to main memory for processing. means that any piece of data is always stored in the next
The computer usually uses its input/output channels to access secondary storage and available space on the tape. To access data, the tape drive has to move through
transfers the desired data using intermediate area in primary storage. Secondary storage all the preceding data before it can access the desired data. This
is also called mass storage, backup storage or external storage. Depending on the type mode of access is known as sequential access. Less susceptible
of medium, secondary storage can be classified into magnetic storage, optical storage to environment, tapes are suitable for long-term storage and
and solid state storage. backup.

• Magnetic Storage • Optical Storage

Magnetic storage devices store data as electromagnetic charges on the magnetic Optical storage devices store data as microscopic light and dark spots on the disc
surfaces of their storage media. Examples are floppy disks, hard disks and magnetic surface. Data is stored in the form of indentations and bumps on the reflective
tape. surface of an optical disc. The indentations are called pits, and the bumps are called
lands. A laser is used to burn pits in certain places of the continuous spiral track of
Floppy Disk: A floppy disk consists of a round flexible plastic disk coated with a the disc and where a pit is formed is read as a 1 and a land is read as a 0. Examples
magnetic substance and protected by a plastic cover lined with a soft material of optical storage devices are compact discs, digital versatile discs and Blu-ray discs.
that wipes the disk clean as it spins. The disk is made of
two recordable surfaces which are divided into a number Compact Disc: A CD is a round disc coated with a metallic surface on which data
of concentric circles called tracks. Each track is in turn can be stored and accessed via laser technology. A CD can store 650MB to 700MB
divided into a number of smaller units called sectors. A of data. Different variations of CD exist: CD-ROM, CD-R and CD-RW.
sector is the basic unit of storage on the disk and has a
capacity of 512 bytes. CD-ROM stands for compact disc read only memory. CD-ROMs can only be read
but not recorded on by the user’s computer.
CD-R stands for compact disc recordable. It is a type of CD that can be recorded
by the user. Once the user records on the CD, the content is set and cannot be
changed. CD-R can be read by CD-ROM drives but to write on them, you need a
CD-R drive.

CD-RW stands for compact disc rewritable. It is a type of CD that can be recorded,
erased and reused by the user. CD-RW cannot be read by CD-ROM and CD-R
Hard Disk Drive: A hard disk drive (HDD) consists of
drives. CD-RW drives are required to read and write on them.
several metallic platters (hard disks) which store data.
Each platter or disk has two recordable sides, each
Digital Video Disc: A DVD is similar to a CD in size and thickness but has a higher
divided into a number of tracks. Tracks on a platter are
storage capacity than the CD. DVDs use a laser beam of wavelength shorter than
numbered 0 from the outside and usually go up to 1,023.
used by CDs. This allows for smaller indentations and increased storage capacity.
Each track is divided into sectors. Sectors are grouped
Just like the CD, different variations of the DVD exist: DVD-ROM, DVD-R and
together to form clusters. A cluster is the smallest logical
DVD-RW. A DVD can store up to 17GB of data. Common DVD storage capacities
amount of disk space that can be allocated to hold a file. A cylinder is a sum set
are:
of all the tracks on all the platters that have the same track value.
DVD-5: Single-sided, single-layer,
Storage capacity: 4.7GB.
DVD-9: Single-sided, double-layer,
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 Storage capacity: 8.5GB. Megabyte Terabyte
DVD-10: Double-sided, single-layer, Byte (B) Kilobyte (KB) Gigabyte (GB)
(MB) (TB)
Storage capacity: 9.4GB.
1KB = 1,024 1MB = 1,024 1GB = 1,024 1TB = 1,024
DVD-18: Double-sided, double layer, 1B = 8 bits
bytes kilobytes megabytes gigabytes
Storage capacity: 17.1GB.
1KB = 210 1MB = 220 1GB = 230 1TB = 240
bytes bytes bytes bytes
• Solid-State Storage
The term solid-state essentially means no moving parts. Solid-state drives (SSD)
have no moving parts (no reels, no spinning disks). They store data using a type of Example 1: A floppy disk has two recordable sides, 18 tracks and 80 sectors per track.

memory called flash memory. SSDs provide better performance (higher access If each sector stores 512 bytes of data, what is the capacity of the disk in kilobytes

speeds) and reliability over HDDs. Examples of solid state devices are USB flash and megabytes?

drives, memory cards, secure digital cards and external hard drives.
Number of sides = 2
Number of tracks = 18
USB Flash Drive: A flash drive is a small, keychain-sized flash memory device with Number of sectors per track = 80
a USB interface, treated by the computer as if it were a disk drive. A flash drive is Total number of sectors = 2 x 18 x 80 = 2880
also called thumb drive, jump drive or memory stick.
Size of sector = 512 bytes
USB flash drives have practically replaced diskettes
Size of disk = 2880 x 512 = 1,474,560 bytes
(floppies) as a handy way to transport data. They can be Size of disk in KB = 1,474,560/210 = 1440KB
carried in one’s pocket and plugged into any computer Size of disk in MB = 1,474,560/220 = 1.41MB
for immediate access.
Example 2: A double layer DVD can store 8.5GB of data. How many CDs of storage
Secure Digital Card: A secure digital (SD) card is a type of flash- capacity 700MB are required to store information in a full DVD?
memory card that incorporates a cryptographic security system to
prevent copyright violations, often used in digital music players Size of DVD = 8.5GB = 8.5 x 210 = 8704MB
and digital cameras. Size of CD = 700MB

CDs needed = 8704/700 =12.4

Characteristics of Storage Media Answer: 13 CDs needed
Two most important characteristics of storage media are capacity and access speed. (12 filled CDs and 1 partially-filled CD)
Other characteristics include access method, and volatility.
• Access Speed
• Storage Capacity Access time or access speed is the time needed to read or write data to a storage
Data is stored in the computer as a sequence of bits. A bit is a binary digit which device’s medium. Access time is usually measured in milliseconds and is used as a
could be 0 or 1. In itself a bit is of little use, so bits are used in groups to make them performance measure for hard disks and CD drives. Units of time are summarized
more useful. A group of 8 bits makes a byte which is used to represent a single as follows:
character in the computer. The capacity of a storage device is the maximum amount
of data that can be stored on the device’s medium. It is expressed in terms of the Millisecond Microsecond Nanosecond Picosecond Femtosecond
number of bytes of data the device can hold. Units of storage are summarized as (ms) (µs) (ns) (ps) (fs)
follows:
1s = 1,000 ms 1ms = 1,000 µs 1 µs =1,000 ns 1ns = 1,000 ps 1ps = 1,000 fs

1s = 103 ms 1s = 106 µs 1s = 109 ns 1s = 1012 ps 1s =1015 fs

7
 stored on the medium, the device does not need to
Example 1: Convert 2.5 seconds to milliseconds go through all preceding data. It is also called direct
access. Examples of direct access devices are RAM,
1s = 1000 ms ROM, CDs, DVDs and magnetic disks.
2.5s = X
X = 2.5 x 1000 = 2500
Memory Hierarchy
Answer: 2.5s = 2500ms Modern computers
manage memory by Registers
Storage capacity
Example 2: Convert 5 microseconds into seconds organizing it into a Cache memory
decreases, access speed
hierarchy in which increases, and cost per
Main memory
106 µs = 1s large but slower byte increases, as we
5 µs = X memories feed data move from bottom to Secondary storage
X = 5/106 = 0.000005 top.
into smaller but faster
Memory hierarchy
memories for faster
Answer: 5µs = 0.000005s
processing of data. This organization of computer memory is known as memory
hierarchy. At the top of the hierarchy are the CPU registers followed by cache memory.
Example 3: Convert 0.04 millisecond to nanoseconds
The next level in the hierarchy is made up of main memory, which is followed by magnetic
disk.
1 ms = 106 ns
0.04ms = Yns
Y = 0.04 x 106 = 40,000 1.3. THE INPUT/OUTPUT UNIT
Computers can only interact with the world using input and output devices. Input devices
Answer: 0.04ms = 40,000ns receive data for the computer and output devices send information from the computer.
Computers only work with digital data. Any input that a computer receives must be
• Access Method digitized. Input devices therefore accept real-world data and convert them into digital
An access method is the technique used to retrieve information from or store form for use by the computer.
information to a storage medium. Storage media can be accessed in two ways:
sequentially or randomly. Input Devices
An input device is hardware that allows the computer user to enter data and commands
Sequential Access: An access method in which data is read in serial order, one into the computer. Examples of input devices are keyboard, mouse, scanner, joystick,
after the other in the order it was stored. The time to access a particular piece of light pen, touchpad, trackball and microphone.
data depends on the data’s location or on which data
was last accessed. Any new data is stored in the next • Keyboard
available space on the medium. To read any data A keyboard is a device used for entering text based data into the computer. It is the
stored on the medium, the device has to start from the standard input device attached to computers. A keyboard typically contains buttons
beginning going through each data until the required or keys for individual letters, numbers, symbols (special characters), as well as keys
data is found. An example of sequential access medium for specific functions. When a key is pressed, a code representing each character is
is magnetic tape. sent to the computer to tell it which character to display.
The way keys are arranged on the keyboard is known as the layout of the keyboard.
Random Access: It is an access method in which data is read in any order There are different keyboard layouts but the best known are QWERTY mainly used
regardless of its location on the medium. Any location in storage can be accessed by English speakers, and AZERTY used by French speakers. The name QWERTY or
AZERTY comes from the first six lettered keys on the top row of the letter keys – Q-
at any moment in approximately the same amount of time. To read any data
W-E-R-T-Y.

8
 • Mouse surface of the tube, which is coated with a material that glows when irradiated. Each
A mouse is a handheld device used to manipulate objects on a computer screen. electron beam moves from left to right, top to bottom, one horizontal scan line at
When moved across a flat surface, the mouse controls the movement of a cursor or a time. To keep the screen image from flickering, the electron beam refreshes the
pointer on the computer screen. Most mouse designs have two buttons – a left screen 30 times or more per second. The clarity of the image is determined by the
button and a right button. number of pixels on the screen.
A mouse can be used to do a variety of tasks like select things, open things and The screen of a monitor is made of tiny dots that are individually painted to form
move things. an image on the screen. Each of these dots is called a pixel – short for picture
o To select things, move your cursor over the item, click once with the left button element. Monitor resolution refers to the number of pixels on the screen of a monitor.
and let go. This known as a click. It is expressed in terms of the number of pixels on the horizontal axis and the
o To open things click twice on the left button in quick succession – think ‘knock, number of pixels in the vertical axis. A variety of different resolutions are available
knock’ on a door. This is known as a double-click. A double click can be used to including VGA and SVGA. VGA is 640 x 480. This means that there are 640 pixels in
open a folder, a file or a program. each row across the screen and 480 pixels in each column. SVGA is 800 x 600. The
o To move things, you need to ‘drag and drop’. First select the item with the left size of a pixel is known as dot pitch. The smaller the dot pitch, the higher the number
mouse button and keep the button pressed down. Then move the mouse and of dots the screen has. Displays with lots of pixels are called high resolution while
the item on screen will move with the cursor. This is a drag. When you have the those with fewer pixels are called low resolution. The higher the resolution, the
cursor and item in the position you want, release the left mouse button. The item clearer and sharper the image will be.
will now be dropped where the cursor is positioned on the screen. The refresh rate of a monitor refers to the number of times an image is redrawn on
o Pressing the right mouse button displays a list of computer commands to choose the screen per second. This number is measured in hertz (Hz). A typical rate for a
from. This is known as a right-click. CRT monitor is 60, 75 or 80 Hz, but some monitors support a much higher rate. A
higher refresh rate reduces screen flicker and eyestrain. You can alter the refresh
• Scanner rate for CRT by changing the settings in the monitor's control panel. This should be
A scanner is a device that is used to convert physical documents like text documents set to the maximum refresh rate possible.
and photographs into digital data that can be stored and manipulated on a
computer. These physical documents are said to be in hardcopy format. When • Printer
converted into digital data, they are said to be in softcopy format. A scanner A printer is a device that is used to produce computer output (text and images) on
therefore converts hardcopy information into softcopy. Common scanner devices paper. This kind of output is called hardcopy output.
are the flatbed scanner, optical mark reader, optical character reader and barcode Based on the technology used, printers can be classified into impact and non-impact
reader. printers. Impact printers have mechanical contact between the printing head and
the paper while non-impact printers have no mechanical contact between the
Output Devices printing head and the paper. Daisy wheel, dot matrix and line printers are examples
Output devices are used to communicate the results of computations to the user in a of impact printers while laser printers, ink jet printers and thermal printers are
form they can understand. Input devices take data into the computer for processing while examples of non-impact printers.
output devices bring information out of the computer. Examples of output devices are Printed images are made up of tiny dots of color (pixels), and the more dots that
monitors, printers, speakers, plotters and projectors. can be squeezed into a square inch, the sharper the resulting image will be. Printer
resolution is measured in dots per inch, or dpi, and ranges from about 125 dpi for
• Monitor low-quality dot-matrix printers to about 600 dpi for some laser and ink-jet printers.

A monitor is a device that displays computer output on a screen. This type of output
Input/output Devices
is known as softcopy output. The monitor is the most common output device.
Another name for monitor is visual display unit (VDU). Monitors are characterized Some devices act as both input and output devices. They allow data and commands to
by the technology they use, their resolution, their refresh rate and their size. be entered into the computer and at the same time convey information out of the
By the technology used monitors are of two main types: cathode ray tube (CRT) computer. These devices are referred to as input/output devices. The touchscreen and
monitors and liquid crystal display (LCD) monitors. electronic whiteboard are good examples of such devices.
A CRT display is built around a vacuum tube containing one or more electron guns
whose electron beams rapidly sweep horizontally across the inside of the front
9
 • Touchscreen
A touchscreen is a display device that is sensitive to the touch of a finger or stylus. 2.1. INSTRUCTION FORMATS
It allows the user to interact with the computer by touching areas on the screen. A Every machine instruction is made up of two parts: Opcode and operand. The Opcode
touchscreen works as both an input device and an output device because it allows (operation code) denotes the basic machine operation like ADD, STORE or XOR. The
you to view the options available to you on the screen (output) and you can use operand (one or more) provides the data which the instruction manipulates. For example,
your finger to touch the option that you have chosen (input). Touchscreens are easy
to use and are found on smartphones, tablets, some laptop computers and some ADD A, #10 //ADD is the opcode; A and #10 are operands
cashpoints (ATM) at banks. STORE R1, $0E //STORE is the opcode; R1 and $0E are operands

o To select an object on the screen, touch it. The number of operands in an instruction format depends on the internal organization
o To select an object and the actions associated with it, touch and hold.
of a CPU. The three most common CPU organizations are accumulator, stack, and
o To move (or drag) an object, touch and hold the object, and then slide your finger
general purpose register (GPR) architectures. General purpose register organization is
across the screen
subdivided into three: register-memory, load/store and memory-memory organizations.
o To scroll quickly between views or through lists, quickly brush surface with
fingertip. This is known as a flick.
o To zoom in or scale down, touch surface with two fingers and bring them closer Accumulator Architecture
together. This is known as a pinch. In this architecture, one of the operands is implicitly the accumulator register and need
o To zoom out or scale up, touch surface with two fingers and move them apart. not be specified in the instruction. This results to 1-address or 1-operand instructions.
This is known as a spread. Examples:

• Interactive Whiteboard LOAD X /AC  M[X]

Copy the value contained in the memory location X to the accumulator register.
An interactive whiteboard is an electronic screen linked to a computer, that is used
in a classroom to show information and that can be written on by touching it with
ADD A /AC  [AC] + M[A]
a finger or special pen. Items displayed on the screen can be dragged, clicked and
Add value in memory location A to the value in the accumulator register and store the
copied and the lecturer can handwrite notes, which can be transformed into text result in the accumulator.
and saved.
STORE Y /Y  [AC]
Store the content of the accumulator into the memory location Y
2. INSTRUCTION SET ARCHITECTURE
Every CPU has a predefined collection of instructions which defines the primitive operations Consider the following high-level language statement that instructs the computer to add
that it can perform. This set of operations is the machine’s instruction set and determines the the values of two variables A and B, and to assign the sum to variable C.
computer’s capability. The instruction set architecture (ISA) of a processor is the combination
C  A + B
of the instruction set and all the resources needed for their execution, such as the registers, the
addressing modes and the memory. The ISA gives each processor its uniqueness and The code sequence for this statement in the accumulator architecture is given as follows:
determines the programmer’s point of view of what the processor can do.
Different ISAs differ in the number of operations, data types, and addressing modes they LOAD A /AC  M[A]
specify. ISAs that include fewer operations and addressing modes are often called RISC ADD B /AC  [AC] + M[B]
(Reduced Instruction Set Computer) ISAs. Those with a large repertoire of operations and STORE C /C  [AC]
addressing modes are often called CISC (Complex Instruction Set Computer) ISAs. The most
commonly found ISA is the IA-32 – ISA more often known by its colloquial name, x86 – Stack Architecture
introduced by Intel Corporation in 1979. Other ISAs that are in use today are IA-64, MIPS, Alpha, In stack architecture, operands are implicit. They are at the top of a stack (TOS).
PowerPC, SPARC, and PA-RISC. Instructions read their operands from, and write their results to the stack which is a last-
in first-out list – a list in which items are removed in reverse order from the order in which

10
they were stored. A binary operation POP is used to retrieve operands from the stack
and the binary operation PUSH is used to insert the result of the operation into the stack. MUL A, R1, R2 /A  [R1] * [R2]
Stack architecture uses 0-address and 1-address instruction formats. Examples: Multiply R1 and R2 and store their product in memory location A.

PUSH A /TOS  M[A] Code sequence for C  A + B in register-memory architecture is given as:
Insert content of memory location A to the top of stack.
LOAD R1, A /R1  M[A]
POP C /C  [TOS] ADD R2, R1, B /R2  [R1] + M[B]
Retrieve value at the top of the stack and store it in memory location C. STORE R2, C /C  [R2]

ADD /TOS  [TOS] + NEXT Load/Store Architecture

Retrieve the two values at the top of the stack, add them and return their sum into the This is a type of general purpose register architecture that allows only LOAD and STORE
stack. instructions to access memory. All other instructions use registers. A Load/Store
architecture has instructions to do either ALU operations or to access memory but not
The code sequence for C  A + B in stack architecture is given as follows: both. It is also referred to as register-register architecture. It allows 2-address and 3-
address instruction formats.
PUSH A /TOS  M[A] The code sequence for C  A + B in load/store architecture is given as follows:
PUSH B /TOS  M[B]
ADD /TOS  [TOS] + NEXT LOAD R1, A /R1  M[A]
POP C /C  [TOS] LOAD R2, B /R2  M[B]
ADD R3, R1, R2 /R3  [R1] + [R2]
The code sequence for the statement E  (A + B) * (C – D) in stack architecture is given STORE R3, C /C  [R3]
as follows:
2.2. ADDRESSING MODES
A machine instruction specifies to the CPU what to do, where the data is located, and
PUSH A /TOS  M[A]
where the output data (if any) will be kept. Operands can be specified in different ways
PUSH B /TOS  M[B]
in an instruction. The way an operand is specified in an instruction is known as an
ADD /TOS  (A + B)
PUSH C /TOS  M[C] addressing mode. An addressing mode therefore indicates to the processor how to
PUSH D /TOS  M[D] locate the operands associated with an instruction. Five basic addressing modes are
SUB /TOS  (C – D) register addressing, immediate addressing, direct addressing, indirect addressing and
MUL /TOS  (C – D) * (A + C) indexed addressing.
POP E /E  [TOS]
Register Addressing
ADD, SUB and MUL are zero-address/0-address instructions. Their operands are In register addressing mode, the operand is the content of a processor register; the name
specified implicitly. No need specifying them in the instruction. of the register is given in the instruction. The e effective address (EA) of the operand is
the register and not the content of the register. For example:
Memory-Register Architecture
ADD R1, R2, R3
This is a type of general purpose register architecture in which operands are either
memory operands or register operands. Here, operands are explicit and any instruction
The above instruction uses three registers to hold all operands. Registers R2 and R3, hold
can access memory. This architecture allows 2-address and 3-address instruction formats.
the two source operands while register R1 holds the result of the computation. The
Example:
content of R2 and R3 are added and the result is stored in R1.
ADD R1, R2 /R1  [R1] + [R2]
Add R1 and R2 and store result in R1.

11
Immediate Addressing The contents of the register are not changed in the process of generating the effective
In immediate addressing mode, the operand is given explicitly in the instruction. In other address.
words, the value to be manipulated by the instruction is immediately part of it. There is For example,
no need for any additional information. For example:
LOAD R1, 12(R2)
ADD R2, R3, #10
This instruction loads into register R1 the operand that is found in the memory address
This instruction adds the number 10 to the content of register R3 and stores the result in obtained by adding 12 to the content of the register R2. This means that the content of
register R2. The operand 10 has been addressed immediately. The # symbol is used here R2 is a memory address.
to indicate immediate addressing.
2.3. RISC AND CISC MACHINES
Direct Addressing One of the most important characteristics that distinguish different computers is the
In direct addressing mode, also called absolute addressing mode, the operand is in a nature of their instructions. There are two fundamentally different approaches in the
memory location; the address of this location is given explicitly in the instruction. The design of instruction sets for modern computers. One popular approach is based on the
effective address of the operand is given in the instruction. For example: premise that higher performance can be achieved if each instruction occupies exactly
one word in memory, and all operands needed to execute a given arithmetic or logic
LOAD R2, $0FF operation specified by an instruction are already in processor registers. The restriction
that each instruction must fit into a single word reduces the complexity and the number
The above instruction loads the content of the memory location 0FF into register R2. The of different types of instructions that may be included in the instruction set of a computer.
operand 0FF has been addressed directly. The $ is used here to indicate absolute Such computers are called Reduced Instruction Set Computers (RISC).
addressing. An alternative to the RISC approach is to make use of more complex instructions which
Indirect Addressing may span more than one word of memory, and which may specify more complicated
In indirect addressing mode, the operand is in a memory location; the address of the operations. This approach was prevalent prior to the introduction of the RISC approach
memory location is in a register that is specified in the instruction. Here, the effective in the 1970s. Although the use of complex instructions was not originally identified by
address of the operand is the content of a register that is specified in the instruction. For any particular label, computers based on this idea have been subsequently called
example: Complex Instruction Set Computers (CISC).

ADD R2, R2, #R3

Reduced Instruction Set Computers

This instruction adds the contents of the memory location held in register R3 to the RISC is a CPU design with a small number of basic and simple machine language
content of register R2 and the result of the operation is held in register R2. instructions, from which more complex instructions can be composed. RISC instructions
are hardwired. That is, they are built into the chip with hardware rather than
Indexed Addressing programming. Hardware implementation of instructions is much faster and uses less
In indexed addressing mode, also known as displacement addressing mode, the effective silicon than a microcode implementation.
address of the operand is generated by adding a constant value to the contents of a Two key characteristics of RISC instruction sets are:
register. For convenience, we will refer to the register used in this mode as the index • Each instruction fits in a single word
register. We will indicate the Index mode symbolically as • A load/store architecture is used, in which
- Memory operands are accessed using only Load and Store operations
X(Ri) - All operands involved in arithmetic or logic operations must either be in processor
registers, or one of the operands may be given explicitly within the instruction
where X denotes a constant signed integer value contained in the instruction and Ri is word.
the name of the register involved. The effective address of the operand is given by Other RISC style characteristics are:
• Simple addressing modes
EA = X + [Ri]

12
 • Fewer instructions in the instruction set, as a consequence of simple addressing At the time of their initial development, CISC machines used available technologies to
modes optimize computer performance. Advantages of CISC processors are:
• Simple instructions which are conducive to fast execution by the processing unit • Cost: Microprogramming is as easy as assembly language to implement, and much
using techniques such as pipelining. less expensive than hardwiring a control unit.
• Programs that tend to be larger in size, because more, but simpler instructions are • Compatibility: The ease of microcoding new instructions allowed designers to
needed to perform complex tasks make CISC machines upwardly compatible: a new computer could run the same
programs as earlier computers because the new computer would contain a superset
Implementing a processor with a simplified instruction set design provides several of the instructions of the earlier computers.
advantages over implementing a comparable CISC design: • Efficient use of memory: As each instruction became more capable, fewer
• Higher performance: Since a simplified instruction set allows for a pipeline instructions could be used to implement a given task. This made more efficient use
processing, RISC processors often achieve 2 to 4 times the performance of CISC of the relatively slow main memory.
processors using comparable semiconductor technology and the same clock rates. • Compiler simplicity: Because microprogram instruction sets can be written to match
• Lower per-chip cost: Because the instruction set of a RISC processor is so simple, it the constructs of high-level languages, the compiler does not have to be as
uses up much less chip space; extra functions, such as memory management units complicated.
or floating point arithmetic units, can also be placed on the same chip. Smaller chips
allow a semiconductor manufacturer to place more parts on a single silicon wafer, 2.4. PARALLELISM
which can lower the per-chip cost dramatically. The performance of computers can be increased by making them perform a number of
• Shorter design cycle: Since RISC processors are simpler than corresponding CISC operations in parallel. This is known as parallelism. Parallelism can be achieved through
processors, they can be designed more quickly, and can take advantage of other parallel processing and pipelining.
technological developments sooner than corresponding CISC designs, leading to
greater leaps in performance between generations.
Parallel processing
Parallel processing is the use of multiple (independent) processors simultaneously to
Complex Instruction Set Computers
execute a single program or task. The problem is divided into portions so that multiple
CISC is a CPU design with a large number of different and complex instructions. In CISC
processors work on their assigned portion of the problem at the same time. Parallel
processors, the control unit contains a number of micro-electronic circuitry to generate
processing requires special software that recognizes how to divide the problem and then
a set of control signals and each micro-circuitry is activated by a microcode. Complex
bring the results back together again.
instructions are first decoded and the corresponding microcode routine dispatched to
Some personal computers implement parallel processing with multiprocessors while
the execution unit.
others have multicore processors.
One key difference between CISC and RISC is that CISC instruction sets are not
constrained to the load/store architecture, in which arithmetic and logic operations can
• Multicore Processors
be performed only on operands that are in processor registers. Another key difference is
A CPU can contain one or more processing units. Each unit is called a core. A core
that instructions do not necessarily have to fit into a single word. Some instructions may
contains an ALU, control unit and registers. It is common for computers to have two
occupy a single word, but others may span multiple words – variable length instructions.
(dual), four (quad) or even more cores. CPUs with multiple cores have more power
CISC style characteristics are:
to run multiple programs at the same time.
• More complex instructions, where an instruction may span multiple words
However, doubling the number of cores will not simply double a computer’s speed.
• More complex addressing modes
CPU cores have to communicate with each other through channels and this uses up
• Many instructions that implement complex tasks
some of the extra speed.
• Arithmetic and logic operations that can be performed on memory operands as well
as operands in processor registers
• Multiprocessors
• Transfers from one memory location to another by using a single Move instruction
• Programs that tend to be smaller in size, because fewer, but more complex Computer systems may contain many processors, each possibly containing multiple
instructions are needed to perform complex tasks cores. Such systems are called multiprocessors. These systems either execute a
number of different application tasks in parallel, or they execute subtasks of a single
large task in parallel. All processors usually have access to all of the memory in such

13
 systems, and the term shared-memory multiprocessor is often used to make this Instruction 3 is being executed
clear. The high performance of these systems comes with much higher complexity
and cost, arising from the use of multiple processors and memory units, along with Cycle 6: Instruction 1 is completed
more complex interconnection networks. Instruction 2 is completed
Instruction 3’s results are being written back to register or memory
Pipeline processing
The simplest way to execute a sequence of instructions in a processor is to complete all Cycle 7: Instruction 1 is completed
steps of the current instruction before starting the steps of the next instruction. If we Instruction 2 is completed
overlap the execution of the steps of successive instructions, total execution time will be Instruction 3 is completed
reduced. For example, the next instruction could be fetched from memory at the same
time that an arithmetic (execute) operation is being performed on the register operands
of the current instruction. This form of parallelism is called pipeline processing. Pipeline 3. DATA REPRESENTATION
processing (pipelining) is an implementation technique whereby multiple instructions are Computers use tiny electric currents flowing through circuits for data processing and storage.
overlapped in execution. The electronic circuits of the computer are made up of billions of transistors. A transistor is a
Below is an example of a four-stage pipeline with three instructions. The stages are: tiny switch which may be open allowing electric current to flow or close, preventing the flow of
IF: instruction fetch ID: instruction decode electric current. When a switch is open it is said to be in the state ON and when it is close, it is
EX: execute WB: write back said to be in the state OFF. A transistor is said to be bi-stable as it can have only one of two
possible states – ON or OFF.
For computers to process real-world data, we need a way of representing the data in terms of
transistors (on/off switches). This representation is done using the binary number system. Binary
Instruction 1 IF ID EX WB is used because it has two digits 0 and 1, making it a natural fit to the two states of a switch,
with 0 for OFF and 1 for ON. Using the binary number system means that every data
Instruction 2 IF ID EX WB
manipulated by a computer is a sequence of zeros and ones. Text, numbers, graphics and
Instruction 3 IF ID EX WB
sound are represented in the computer using different types of numeric codes or data
representation schemes which are based upon the binary number system. The computer
Clock cycle 1 2 3 4 5 6 interprets different sequences of zeros and ones as different types of data depending on the
data representation scheme that is used.
Cycle 1: Instruction 1 is being fetched from memory. Other number systems like octal and hexadecimal are widely used in computer science and
Instructions 2 and 3 have not entered the pipeline yet there are specific areas where a certain number system is easier to use and offers advantages
over another. For example, binary is used for data representation and hexadecimal for
Cycle 2: Instruction 1 is being decoded addressing memory. The study of number systems is important from the viewpoint of
Instruction 2 is being fetched understanding how data are represented before they can be processed by any digital system
Instruction 3 has not entered the pipeline yet including a digital computer.

Cycle 3: Instruction 1 is being executed 3.1. NUMBER SYSTEMS

Instruction 2 is being decoded A number system is a set of digits and rules used to represent numbers. Different
Instruction 3 is being fetched characteristics that define a number system include the number of independent digits
used in the system, the place values of the different digits constituting a number and the
Cycle 4: Instruction 1’s results are being written back to register or memory maximum number that can be written with a given number of digits. Among the three
Instruction 2 is being executed characteristic parameters, the most fundamental is the number of independent digits or
Instruction 3 is being decoded symbols used in the number system. It is known as the radix or base of the number
system and the digits always begin with 0 and continue through one less than the base
Cycle 5: Instruction 1 is completed of that system. If the base of a system is represented by “b”, then the largest digit in that
Instruction 2’s results are being written back to register or memory system is “b–1”.
14
At the lowest level in the computer, only binary (base 2) numbers can be understood. As The binary number system is used in digital computers because:
humans we are much more familiar with the decimal system and think of numbers in • It has only two digits 0 and 1, making it a natural fit to the two sates of a switch
terms of base 10. So in order to understand how the computer processes data, we must • Binary devices are easy and simple to build
be comfortable with both binary and decimal numbers. • Binary signals are unambiguous, which gives them noise immunity
• Flawless copies can be made of binary data

Decimal System
Octal System
The decimal system consists of 10 digits 0, 1, 2, 3, 4, 5, 6, 7, 8, and 9. Hence, the base or
The octal number system is a base 8 system. It uses the digits 0 to 7 to represent any
radix of this system is 10. It is the most familiar number system used in day-to-day life. In
quantity. Place values in octal are powers of 8: 1, 8, 64, 512, and so on.
this system, any number (integer or fraction) of any magnitude can be represented by
the use of these 10 digits only.
Digit 2 3 7
In a decimal number with 2 or more digits, the value each digit represents depends on 82 81 80
Place value
its position in the number called place value. Place values in base 10 are powers of ten; (64) (8) (1)
10 , 10 , 10 , 10 , and so on. The weight of any digit in a decimal number is obtained by
0 1 2 3 Name Sixty-fours Eights Ones
multiplying the digit with its place value. Digit’s weight 128 24 7
In the number 29810,
• the digit 8 has a place value of 100, thus having a weight of 8 or 8 ones (8 x 100) Since it is base 8 and 8 = 23, every 3-bit group of binary can be represented by one octal
• the digit 9 has a place value of 101, and a weight of 90 or 9 tens (9 x 101) number. This means an octal number is 1/3 the length of the corresponding binary number.
• the digit 2 has a place value of 102 and a weight of 200 or 2 hundreds (2 x 100).
Hexadecimal System
The hexadecimal system has a base of 16. It uses the digits 0 to 9 and the letters A to F,
Digit 2 9 8 where A=10, B=11, C=12, D=13, E=14, and F=15. Hexadecimal numbers can have the
102 101 100 subscript 16, but more often have a leading "0x" to indicate their type. For example 0x0000,
Place value
(100) (10) (1) 0x0B45 and 0xFFFF.
Name Hundreds Tens Ones
For the hexadecimal number 23D16, the place value and weight of each digit are shown
Digit’s weight 200 90 8
below.
Notice that place values here are powers of 10 (the base) starting from 0 and attributed
Digit 2 3 𝐷
from right to left. Each decimal place value is 10 times greater than the one to its
Place value 162 161 160
immediate right. That is, 102 is 10 times greater than 101 which is 10 times greater than (256) (16) (1)
100. Two hundred
Name and fifty- Sixteen Ones
sixes
Binary System
Digit’s weight 512 48 D (13)
The base of this number system is 2. Hence, it has 2 digits 0 and 1 called binary digits
(bits), which are used to represent any quantity. A binary number is a sequence of bits,
Since 16 = 24, every group of four bits can be represented by one hexadecimal digit. This
each of which can be 0 or 1. Place values in binary are powers of 2: 1, 2, 4, 8, … with each means that a hexadecimal number is 1/4 the length of the corresponding binary number,
place value being 2 times greater than the one to its immediate right. For the 4 bit making the hexadecimal system particularly useful for representing large numbers as fewer
number 11012, the place value and weight of each digit are: digits are required. Memory addresses and color codes are often shown in hex format

Digit 1 1 0 1 Summary table:

Place value 23 22 21 20
(8) (4) (2) (1)
Name Eights Fours Twos Ones
Digit’s weight 8 4 0 1

15
 Number system Base Digits 0.75 × 2 = 1.5
Binary 2 0, 1 0.5 × 2 = 1.0 [from top to bottom]

Octal 8 0, 1, 2, 3, 4, 5, 6, 7
Answer: 25.75 = 11001.112
Decimal 10 0, 1, 2, 3, 4, 5, 6, 7, 8, 9
0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
Hexadecimal 16 Example 3: Convert: 33.3310 to binary.
A, B, C, D, E, F

2 33 R
3.2. CONVERSION BETWEEN BASES 2 16 1
2 8 0
Decimal to Binary
2 4 0
To convert from decimal to binary we use the repeated division method. The general
2 2 0
technique of this method can be used to convert any decimal number to any other
number system. 2 1 0
• Divide the decimal number by two repeatedly, writing down the remainder at each 0 1
division, until the quotient is less than 2.
• Obtain the answer by writing up the remainders of the division in reverse order. 0.33 × 2 = 0.66
0.66 × 2 = 1.32
Example 1: Convert 21310 to base 2 0.32 × 2 = 0.64
0.64 × 2 = 1.28
0.28 × 2 = 0.56
0.56 × 2 = 1.12 (*)
2 213 Remainder
2 106 1
Answer: 33.3310 = 100001.0101012 (6dp)
2 53 0
2 26 1 Binary to Decimal
2 13 0 To convert a binary number to decimal, we proceed as follows:
• Multiply each digit in the binary number by its place value
2 6 1
• Add up all the weighted values.
2 3 0
2 1 1 Example 1: Convert 110102 to base 10
11010 = 1 × 24 + 1 × 23 + 0 × 22 + 1 × 21 + 0 × 20
0 1
= 1 × 16 + 1 × 8 + 0 × 4 + 1 × 2 + 0 × 1
= 16 + 8 + 0 + 2 + 0
Answer: 21310 = 110101012 = 26

Example 2: Convert 25.7510 to binary Answer: 110102 = 2610

2 25 R
Example 2: Convert 10011.1012 to base 10
2 12 1 1011.101 = 23 + 0 + 21 + 20 + 2-1 + 0 + 2-3
2 6 0 = 8 + 0 + 2 + 1 + 1/2 + 0 + 1/8
2 3 0 = 11 + 0.5 + 0 + 0.125
= 11.625
2 1 1
0 1 Answer: 1011.1012 = 11.62510

16
Binary to Octal Example 1: Convert 738 to binary
Theorem: If base R1 is the integer power of another base, R2 (i.e. R1 = R2d), then every
2 7 Rem 2 3 Rem
group of d digits in R2 is equivalent to 1 digit in base R1.
Since 8 = 23, every 3-bit group of binary can be represented by one octal number. This 2 3 1 2 1 1
means an octal number is 1/3 the length of the corresponding binary number. 2 1 1 0 1
To convert from binary to octal, 0 1
• Make groups of 3 bits starting from the least significant bit and move towards the 3 = 011
most significant bit. 7 = 111
Pad with
• Replace each group of bits by its octal representation. Use the following table: leading 0
Answer: 738 = 1110112

Binary Octal Binary Octal

Example 2: Convert 4508 to binary
000 0 100 4

001 1 101 5 2 4 R 2 5 R 2 0 R
2 2 0 2 2 1 0 0
010 2 110 6
2 1 0 2 1 0
011 3 111 7
0 1 0 1
0 = 0002
4 = 1002 5 = 1012
Example 1: Convert 1010112 to base 8.

1010112 = 101 011 Answer: 4528 = 1001010002

5 3
Binary to Hexadecimal
Answer: 1010112 = 538 Since 16 = 24, every group of four bits can be represented by one hexadecimal digit.
To convert from binary to hexadecimal
Example 2: Convert • Make groups of 4 bits starting from the least significant bit and move towards the
most significant bit.
110011102 = 011 001 110 • Replace each group of bits by its hexadecimal value representation. Use the table
3 1 6 below.

Answer: 110011102 = 3168 Hex Binary Hex Binary Hex Binary

0 0000 6 0110 C 1100
Octal to Binary 1 0001 7 0111 D 1101
To convert from octal to binary, replace every octal digit with its 3-bit binary equivalent. 2 0010 8 1000 E 1110
• Convert every octal digit to binary using repeated division by 2. 3 0011 9 1001 F 1111
• If the binary number obtained is less than 3 bits, pad with leading 0s to make it 3 4 0100 A 1010
bits. 5 0101 B 1011
• Replace each octal digit with its 3-bit binary equivalent obtained.

Example 1: Convert 101110011012 to hex

10111001101 = 0101 1100 1101

5 C D

17
 Answer: 101110011012 = 5CD16 3.3. BINARY ARITHMETIC
Addition
Example 2: Convert 110000101001002 to hex Rules for addition
1
11000010100100 = 0011 0000 1010 0100 0 0 1 1 1
3 0 A 4 + 0 + 1 + 0 + 1 + 1
0 1 1 1 0 1 1
Answer: 11000010100100 = 30A416
Example 1: 11012 + 1012
Hexadecimal to Binary
To convert from hexadecimal to binary,
• Convert every digit in the hexadecimal number to binary. (1) (1) (1)
• If the binary number obtained is less than 4 bits, pad with leading 0s to make it 4 1 1 0 1
bits. + 1 0 1
• Replace each octal digit with its 4-bit binary equivalent. 1 0 0 1 0

Example 1: Convert 6E916 to binary. Answer: 11012 + 1012 = 100102

We know that E = 14
2 6 R 2 14 R 2 9 R Example 2: 11112 + 10102
2 3 0 2 7 0 2 4 1
2 2 0 (1) (1) (1)
2 1 1 2 3 1
2 1 0 1 1 1 1
2 0 1 2 1 1
+ 1 0 1 0
0 1 0 1
1 1 0 0 1

6 = 01102 E = 11102 9 = 10012

Answer: 11112 + 10102 = 110012
Answer: 6E916 = 0110111010012
Subtraction
Example 2: Convert B17D16 to binary Rules for subtraction
(2)
2 11 R 2 1 R 2 7 R 2 13 R 0 1 1 0 Borrow
2 5 1 2 0 1 2 3 1 2 6 1 1 unit
- 0 - 0 - 1 - 1 worth 2
2 2 1 2 1 1 2 3 0 0 1 0 1
2 1 0 0 1 2 1 1
0 1 0 1 Example 1: 11012 - 1012
1 1 0 1
B = 10112 1 = 00012 7 = 01112 D = 11012
– 1 0 1
1 0 0 0
Answer: B17D16 = 10110001011111012
Answer: 11012 - 1012 = 10002

18
Example 2: 11012 - 10102 Example 2: 11112 × 10102
(2)
1 1 0 1 1 1 1 1
– 1 0 1 0 × 1 0 1 0
0 0 1 1 0 0 0 0
1 1 1 1
Answer: 11012 - 10102 = 112 0 0 0 0
+ 1 1 1 1
Example 3: 100112 – 11012 1 0 0 1 0 1 1 0

(1) (2) Answer: 11112 × 10102 = 100101102

1 0 0 1 1
– 1 1 0 1 Division
0 0 1 1 0 Rules for division are:

Answer: 100112 – 11012 = 1102 0 0 1 1

÷ 0 ÷ 1 ÷ 1 ÷ 0
Multiplication 0 0 1 -
Rules for multiplication
Example 1: 10102 ÷ 102
0 0 1 1 1 0 1
× 0 × 1 × 0 × 1 10 1 0 1 0
0 0 0 1 - 1 0
- - 1
Example 1: 11012 × 1012 0
1 0
1 1 0 1 1 0
× 1 0 1 0 0
1 1 0 1
0 0 0 0 Answer: 10102 ÷ 102 = 10102
+ 1 1 0 1
1 0 0 0 0 0 1 Example 2: 10112 ÷ 112
0 1 1

Answer: 11012 × 1012 = 10000012 11 1 0 1 1

0 0 1
1 0 1
0 1 1
1 0 1
1 1
1 0

Answer: 10112 ÷ 112 = 112 remainder 102

19
 Example 3: Sign bit is 1 ⇒ number is negative
1 0 1 Absolute value is 10010012 = 7310
101 1 1 0 0 1 Answer: 110010012 = −7310
1 0 1
1 0 Example 3: Convert 4710 to an 8-bit sign-magnitude binary number
0 0
Number is positive ⇒ sign bit is 0
1 0 1
Absolute value is: 4710 = 1100012
1 0 1
Pad to 8 bits: 4710 = 001100012
0 0 0

Answer: 4710 = 001100012

Answer: 110012 ÷ 1012 = 1012
Example 4: Convert −5810 to an 8-bit sign-magnitude binary number
3.4. REPRESENTATION OF NUMBERS
In mathematics, positive numbers (including zero) are represented as unsigned numbers. Number is negative ⇒ sign bit is 1
That is, we do not put the plus (+) sign in front of them to show that they are positive. Absolute value is: 5810 = 1100012
However, when dealing with negative numbers we do use a minus (–) sign in front of the Pad to 8 bits: 5810 = 001100012
number to show that the number is negative in value and different from a positive Since original number is negative, sign bit is set to 1
unsigned value. Computers represent signed integers using different representation
schemes such as sign-magnitude, one’s complement and two’s complement. Answer: −5810 = 101100012

Signed Integers The drawbacks of sign-magnitude representation are:

- There are two representations (00000000 and 10000000) for the number zero,
For signed binary numbers the most significant bit is used as the sign bit. If the sign bit
which could lead to inefficiency and confusion.
is 0, this means the number is positive. If the sign bit is 1, then the number is negative.
- Arithmetic is cumbersome making the design of electronic circuits for this scheme
The remaining bits in the number are used to represent the magnitude of the binary
difficult.
number in the usual unsigned binary format. Four representation schemes are available
for signed integers: sign-magnitude, one’s complement, two’s complement and excess-
• One’s Complement
n.
The one’s (or 1’s) complement of a binary number is defined as the value obtained
by inverting all the bits in the number (i.e. swapping 0s for 1s and vice versa). When
• Sign-magnitude representing signed integers in 1's complement, positive numbers remain
In sign-magnitude representation, the most significant bit is the sign bit with 0 for unchanged. Negative numbers however, are represented by taking one’s
positive and 1 for negative. The remaining (𝑛 − 1) bits represent the absolute value complement (inversion, or negation) of the unsigned positive number. Since positive
of the integer which is interpreted as "the magnitude of the (𝑛 − 1)-bit pattern". numbers always start with a 0, the complement will always start with a 1 to indicate
a negative number.
Example 1: Give the decimal equivalent of the sign-magnitude number 010000012 In 1’s complement, the range of numbers that can be represented on 𝑛 bits is −2𝑛−1
to 2𝑛−1 . If n=8, the range of numbers that can be represented is −28−1 to 2𝑛−1 i.e.
Sign bit is 0 ⇒ number is positive −128 to 128.
Absolute value is 10000012 = 6510
Example 1: Represent the number 2610 as an 8-bit 1’s complement number.
Answer: 010000012 = 6510
Number is positive
Example 2: Give the decimal equivalent of the sign-magnitude number 110010012 We convert 26 to binary: 2610 = 110102

20
 Pad to 8 bits: 2610 = 000110102
Answer: 111100102 = 1310
Answer: 2610 = 000110102
One of the advantages of one’s complement is in the addition and subtraction of
Example 2: Represent the number -2510 as an 8-bit 1’s complement number. two binary numbers. In one’s complement, subtraction is done using the addition
logic, A – B = A + (–B). That is, we obtain the one’s complement of the subtrahend
Number is negative and add it to the minuend. When adding, any carry from the MSB (referred to as
Convert magnitude 2510 to binary: 2510 = 110012 end-round carry) is added to the result.
Pad to 8 bits: 2510 = 000110012
Negate number by complementing: 000110012 = 111001102
Example 1: Add 1010100 and 10011 in 8-bit 1’s complement.
Add leading 0’s to make both numbers 8 bits.
Answer: −2510 = 111001102
(1)

Example 3: Represent the number -2510 as an 8-bit 1’s complement number. 0 1 0 1 0 1 0 0

+ 0 0 0 1 0 0 1 1
Number is negative 0 1 1 0 0 1 1 1
Convert magnitude 7210 to binary: 7210 = 10010002
Pad to 8 bits: 7210 = 010010002 Answer: 1010100 + 10011 = 1100111
Negate number by complementing: 010010002 = 101101112
Example 2: Add 1101010 and 10110001 in 8-bit 1’s complement
Answer: -7210 = 101101112
(1) (1) (1)
0 1 1 0 1 0 1 0
Example 4: Give the decimal equivalent of the 1’s complement number 001000012
+ 1 0 1 1 0 0 0 1
0 0 0 1 1 0 1 1
Sing bit = 0, number is positive
00100001 = 33 1
0 0 0 1 1 1 0 0
Answer: 001000012 = 3310 Carry is added to the result from the first addition

Example 5: What is decimal equivalent of the 1’s complement number 100000012? Answer: 1101010 + 10110001 = 11100

Sign bit = 1, number is negative Example 3: Subtract 37 from 51 in 8-bit 1’s complement.
Complement of 10000001 = 01111110 • Convert both numbers to binary, add leading 0’s to make 8 bits
01111110 = 126 51 = 110011 = 00110011
37 = 100101 = 00100101
Answer: 100000012 = -12610
• Complement 37 to obtain -37
Example 6: What is the denary equivalent of the 1’s complement binary -37 = 11011010

representation 11110010?
• Now, add binary representations of 51 and -37

Sign bit = 1, number is negative

Complement of 11110010 = 00001101
00001101 = 13

21
 (1) (1) (1) (1) (1) 0 0 0 1 1 0 0 1
0 0 1 1 0 0 1 1 ¬ 1 1 1 0 0 1 1 0
+ 1 1 0 1 1 0 1 0 + 1
0 0 0 0 1 1 0 1 1 1 1 0 0 1 1 1
1
0 0 0 0 1 1 1 0 Answer: -2410 = 111001112

Answer: 5110 – 3710 = 00011102 Example 3; Represent -10910 in 8-bit 2’s complement.

109 = 1101101 = 01101101

Example 4: Subtract 84 from 57 in 8-bit 1’s complement.
Complement and add 1 to complement
57 = 00111001 0 1 1 0 1 1 0 1
84 = 01010100 ¬ 1 0 0 1 0 0 1 0
-84 = 10101011 + 1
1 0 0 1 0 0 1 1
(1) (1) (1) (1)
0 0 1 1 1 0 0 1
Answer: -10910 = 100100112
+ 1 0 1 0 1 0 1 1
1 1 1 0 0 1 0 1
Example 4: What is the decimal equivalent of the 2’s complement binary
representation 01100000?
Answer: 5710 – 8410 = 111001012

Sign bit 0, number is positive

• Two’s Complement 01100000 = 96
The two’s (2’s) complement of a binary number can be defined as the number
obtained by adding one to the one’s complement of the number. In 2’s complement Answer: 011000002 = 9610
representation, positive numbers are exactly the same as with sign-magnitude and
1’s complement. A negative number, however, is represented by a number which Example 5: What is the denary equivalent of the the 2’s complement number
when added to its corresponding positive equivalent results in zero. 100100012?
In 2’s complement, the range of numbers that can be represented on 𝑛 bits is −2𝑛−1 Sign bit = 1, number negative
to 2𝑛−1 − 1. If n=8, the range of 2’s complement integers is −28−1 to 28−1 − 1 2’s complement of 10010001 = 01101110 + 1
(−128 to 127). = 01101111
01101111 = 11110
Example 1: Represent 2410 in 8-bit 2’s complement
24 = 11000 = 00011000 Answer: 100100012 = -11110

Answer: 2410 = 000110002 The main advantage of 2’s complement over 1’s complement is that there is no
double-zero problem and it is a lot easier to generate the two’s complement of a
Example 2: Represent -2410 in 8-bit 2’s complement. signed binary number. By inverting all the bits to the left of the rightmost 1 in the
positive number, we obtain the 2’s complement of the number. Therefore,
24 = 11000 = 00011000 arithmetic operations are relatively easier to perform when numbers are
Complement and add 1 to complement represented in two’s complement format. When adding in 2’s complement, any
carry from MSB is discarded.
22
Example 1: Add 111011012 and 111110012 in 8-bit 2’s complement 3.5. REPRESENTATION OF CHARACTERS
(1) (1) (1) (1) (1) (1) Characters are represented in the computer using a chosen character encoding scheme
1 1 1 0 1 1 0 1 or character set, which assigns numeric codes to characters, including letters of the
+ 1 1 1 1 1 0 0 1 alphabet, numbers, mathematical symbols, punctuation marks, and control characters.
1 1 1 0 0 1 1 0 The most common character sets are: ASCII, EBCDIC and Unicode for internationalization.

Answer: 111011012 + 111110012 = 111001102 ASCII

ASCII stands for American Standard Code for Information Interchange. It is the coding
Example 2: Add 011010102 and 001100012 in 8-bit 2’s complement scheme that is built into most minicomputers and all personal computers. ASCII has two
(1) (1) versions: standard ASCII and extended ASCII.

0 1 1 0 1 0 1 0 Standard ASCII is a 7-bit version of ASCII that represents each character as a unique
combination of 7 bits, making a total of 128 (27) characters assigned to codes between 0
+ 0 0 1 1 0 0 0 1
and 127. These characters include most found on a standard keyboard, including the
1 0 0 1 1 0 1 1
letters A–Z (uppercase and lowercase), numerals (0 through 9), punctuation marks, and
non-printable characters such as Escape, Enter, Backspace and Delete.
Answer: 011010102 + 001100012 = 100110112
Extended ASCII is an 8-bit version of ASCII. Using 8 bits allows 256 (28) unique
combinations. Therefore, the 8-bit version can represent up to 256 characters, twice as
Example 3: Subtract 35 from 57 using 8-bit 2’s complement.
many as the 7-bit version. The additional characters are assigned to codes between
57 = 00111001 decimal 128 and 255, and consist of characters such as accented letters, graphics symbols,
35 = 00100011 and other special symbols not included on the keyboard. The specific characters assigned
-35 = 11011100 + 1 = 11011101 to the extended ASCII codes vary between computers and between programs, fonts, or
(1*) (1) (1) (1) (1) (1) graphics characters, making for several different 8-bit versions of ASCII.
0 0 1 1 1 0 0 1
+ 1 1 0 1 1 1 0 1
0 0 0 1 0 1 1 0
(1* carry is discarded)
Answer: 5710 – 3510 = 000101102

Example 4: Subtract 7510 from 5910 using 8-bit 2’s complement

(1) (1) (1) (1) (1) (1)
0 0 1 1 1 0 1 1
+ 1 0 1 1 0 1 0 1
1 1 1 1 0 0 0 0

Answer: 5910 – 7510 = 111100002

ASCII charset

EBCDIC
EBCDIC stands for Extended Binary Coded Decimal Interchange Code. It is a binary code
for alphabetic and numeric characters that IBM developed for its larger operating
systems. In EBCDIC, each alphabetic or numeric character is represented with an 8-bit

23
 binary number making a total of 256 possible characters (letters of the alphabet, 4.1. BOOLEAN ALGEBRA
numerals, and special characters) are defined. The algebra of a number system basically describes how to perform arithmetic using the
EBCDIC is not used on the IBM PC and all subsequent "PC clones". These computer operators of the system, acting upon the system's variables which can take any of the
systems use ASCII as the primary character and symbol coding system. allowed values within that system. Boolean algebra describes the arithmetic of a two-
EBCDIC is widely considered to be an obsolete coding system, but is still used in some state system and is therefore the mathematical language of digital electronics. Just like
equipment, mainly in order to allow for continued use of software written many years
with ordinary algebra, the variables in Boolean algebra can be represented using symbols
ago that expects an EBCDIC communication environment.
like 𝑥, 𝑦 and 𝑧, which indicate the state either 0 or 1. Boolean algebra has only three
operators: AND, OR and NOT. The symbols representing these operators, their usage
Unicode
and how they are used verbally are shown in the table below.
Unlike ASCII and EBCDIC that are limited only to the Latin alphabet used with the English
language, Unicode is a universal international coding standard text-based data in any
Operator Symbol Usage Spoken as
ancient or modern language, including those with different alphabets such as Chinese,
AND • or ˄ 𝑥 • 𝑦 or 𝑥 ˄ 𝑦 𝑥 and 𝑦
Greek, Hebrew and Russian. is a 16-bit character encoding standard developed by the
OR + or ˅ 𝑥 + 𝑦 or 𝑥 ˅ 𝑦 𝑥 or 𝑦
Unicode Consortium between 1988 and 1991. By using 2 bytes to represent each
NOT ¯, ' or ¬ 𝑥̅ or ¬𝑥 not 𝑥; or 𝑥 bar
character, Unicode can represent up to 65,536 characters which enables almost all the
written languages of the world to be represented using a single character set. Unicode is
Note that whereas the AND and OR operators operate on two variables the NOT
backward compatible with the 7-bit ASCII, meaning that the first 128 characters of
operator works on a single variable. To better understand these operators, we need a
Unicode are the same as ASCII.
mechanism to allow us to examine their behaviors. A Boolean operator can be completely
Approximately 39,000 of the 65,536 possible Unicode character codes have been
described using a table that lists the inputs, all possible values for these inputs, and the
assigned to date, 21,000 of them being used for Chinese ideographs. The remaining
resulting values of the operation for all possible combinations of these inputs. This table
combinations are open for expansion. is called a truth table. A truth table shows the relationship, in tabular form, between the
input values and the results of a specific Boolean operator on the input variables.

4. DIGITAL ELECTRONICS 𝒙 ̅
𝒙
Most modern electronic devices such as hand-held calculators, microwave ovens with 0 1
programmable power levels and timers, mobile telephones and computers, depend on digital 1 0
Truth table for NOT
electronics. In fact, most electronics about the home and in the industry depend on digital
electronics to work. Digital electronics are electronics that use binary numbers of 0 and 1 to
𝒙 𝒚 𝒙∙𝒚 𝒙 𝒚 𝒙+𝒚
represent and manipulate information. As you speak into the phone, the digital electronic
0 0 0 0 0 0
circuits it contains convert your voice into a series of electronic pulses (or 0s and 1s). These are 0 1 0 0 1 1
transmitted and the receiving phone then converts the digital pulses back into your voice. When 1 0 0 1 0 1
a computer operator presses the key for letter ‘H’ on the keyboard, the circuits in the keyboard 1 1 1 1 1 1
convert this key press into a digital signal composed of 1s and 0s representing the letter H. The
Truth table for AND Truth table for OR
‘H’ in the form of 1s and 0s is sent to the computer’s memory for storage or display.
Digital electronic circuits are built from simple elements called “logic gates”, made from
electronic switches (transistors). They operate according to rules of logic set out in the 1850s Boolean Expressions
by an English mathematician called George Boole. For decades, Boole’s ideas had no apparent We now understand that Boolean algebra deals with binary variables and logical
practical use until applied by Claude Shannon to telephone switch design in the 1930s. Today, operations on these variables. Combining these two concepts, we can examine Boolean
it is called Boolean algebra and provides a convenient mathematical framework that serves as expressions composed of Boolean variables and multiple logic operators. For example,
the foundation of digital electronics and computer processing. the Boolean function F below is represented by a Boolean expression involving the two
Boolean variables A and B and the logical operators OR, NOT, and AND.

𝐹(𝑥, 𝑦) = 𝑥 + 𝑥̅ ∙ 𝑦

24
 Identity AND Form OR Form
The rules of precedence for Boolean operators give NOT top priority, followed by AND,
Identity Law 1∙𝑥 =𝑥 0+𝑥 = x
and then OR. For the function F above, we would negate 𝑥 first, then perform the AND
Null (or Dominance) Law 0∙𝑥 =0 1+𝑥 =1
of 𝑥̅ and 𝑦, and lastly OR this result with 𝑥.
A Boolean expression can also be represented using a truth table. To construct a truth Idempotent Law 𝑥∙𝑥 =𝑥 𝑥+𝑥 =𝑥
table for a given expression, we evaluate the expression for all possible combinations of Inverse Law 𝑥 ∙ 𝑥̅ = 0 𝑥 + 𝑥̅ = 1
values for the input variables. The number of possible combinations is always equal to Commutative Law 𝑥∙𝑦 = 𝑦∙𝑥 𝑥+𝑦 = 𝑦+𝑥
2𝑛 where 𝑛 is the number of input variables. Associative Law (𝑥 ∙ 𝑦) ∙ 𝑧 = 𝑥 ∙ (𝑦 ∙ 𝑧) (𝑥 + 𝑦) + 𝑧 = 𝑥 + (𝑦 + 𝑧)
Distributive Law 𝑥 + 𝑦 ∙ 𝑧 = (𝑥 + 𝑦)(𝑥 + 𝑧) 𝑥 ∙ (𝑦 + z) = 𝑥 ∙ 𝑦 + 𝑥 ∙ 𝑧
Example 1: Construct a truth table for the function 𝐹(𝑥, 𝑦) = 𝑥 + 𝑥̅ ∙ 𝑦.
Absorption Law 𝑥 ∙ (𝑥 + 𝑦) = 𝑥 𝑥+𝑥∙𝑦 =𝑥
We have 2 input variables 𝐴 and 𝐵 ⇒ we will have 22 = 4 different combinations
De Morgan’s Law 𝑥 ∙ y = 𝑥̅ + 𝑦̅
̅̅̅̅̅ ̅̅̅̅̅̅̅
x + y = 𝑥̅ ∙ 𝑦̅
Double Complement Law 𝑥̿ = 𝑥
𝒙 𝒚 ̅
𝒙 ̅∙𝒚
𝒙 ̅∙𝒚
𝑭 = 𝒙+𝒙
0 0 1 0 0
0 1 1 1 1 Example 1: Simplify the function 𝐹(𝑥, 𝑦, 𝑧) = 𝑥 ∙ 𝑦̅ + 𝑥 ∙ (𝑦
̅̅̅̅̅̅̅ ̅̅̅̅̅̅̅
+ 𝑧) + 𝑦 ∙ (𝑦 + 𝑧)
𝐹(𝑥, 𝑦, 𝑧) = 𝑥 ∙ 𝑦̅ + 𝑥 ∙ (𝑦 ̅̅̅̅̅̅̅ ̅̅̅̅̅̅̅
+ 𝑧) + 𝑦 ∙ (𝑦 + 𝑧)
1 0 0 0 1
1 1 0 0 1 = 𝑥 ∙ 𝑦̅ + 𝑥 ∙ 𝑦̅ ∙ 𝑧̅ + 𝑦 ∙ 𝑦̅ ∙ 𝑧̅ De Morgan
= 𝑥 ∙ 𝑦̅(1 + 𝑧̅) + 0 ∙ 𝑧̅ Distributive, Inverse
= 𝑥 ∙ 𝑦̅ + 0 Null
Example 2: Construct a truth table for the function 𝐹(𝑥, 𝑦, 𝑧) = 𝑥 + 𝑦 ∙ 𝑧 = 𝑥 ∙ 𝑦̅ Identity
3 input variables ⇒ 23 = 8 different combinations.
Example 2: Show that (x̅̅̅̅̅̅̅
+ y) = y̅ ∙ (x̅ + y)
𝒙 𝒚 𝒛 𝒚∙𝒛 𝑭=𝒙+𝒚∙𝒛 RHS : 𝑦̅ ∙ (x̅ + y) = 𝑦̅ ∙ x̅ + 𝑦̅ ∙ y Distributive
0 0 0 0 0 = y̅ ∙ x̅ + 0 Inverse
0 0 1 0 0 = x̅ ∙ 𝑦̅ Identity, Commutative
0 1 0 0 0 = ̅̅̅̅̅̅̅
𝑥+𝑦 De Morgan
0 1 1 1 1
1 0 0 0 1
𝑥 + 𝑦 Q.E.D
y̅ ∙ (x̅ + y) = ̅̅̅̅̅̅̅
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
4.2. DIGITAL CIRCUITS
Simplifying Boolean Expressions The logical operators AND, OR, and NOT that we have discussed have been represented
Sometimes a Boolean expression is not in its simplest form. Recall from algebra that an thus far in an abstract sense using truth tables and Boolean expressions. The actual
expression such as 3𝑥 2 + 6𝑥 is not in its simplest form; it can be reduced (represented physical components, or digital circuits, such as those that perform arithmetic operations
by fewer or simpler terms) to 𝑥 + 2𝑥. Boolean expressions can also be simplified, but
2 or make choices in a computer, are constructed from a number of primitive elements
we need new identities, or laws, that apply to Boolean algebra instead of regular algebra. called logic gates. These gates are the basic building blocks for digital design.
These identities, which apply to single Boolean variables as well as Boolean expressions,
are listed in the table below. Logic Gates
Formally, a logic gate is a small electronic device that computes various functions of two-
valued signals. More simply stated, a logic gate is an electronic switch that implements a
simple Boolean function. To physically implement each gate requires from one to six or
more transistors, depending on the technology being used. To summarize, the basic

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physical component of a computer is the transistor; the basic logic element is the gate. • NOT Gate
There are seven different logic gates: AND, OR, NOT, NAND, NOR, XOR and XNOR. A NOT gate is a logic gate that takes a single input and produces an output that is
the inverse of the input. This means that when the input is 1, the output is 0 and
• AND Gate when the input is 0, the output is 1. The NOT gate is also called an inverter because
An AND gate is a logic gate with two or more inputs and one output that performs it produces the inverted version of the input at its output. The truth table and logic
logical conjunction. The output of an AND gate is 1 only when all of the inputs are symbol for a NOT gate are given as follows.
1. If one or more of an AND gate's inputs are 0, then the output of the AND gate is
0. Below are the logic symbol for AND gate and a truth table with two inputs
showing its behavior.

Logic symbol for NOT

𝑨 𝑸=𝑨̅
Logic symbol for AND gate 0 1
1 0
𝑨 𝑩 𝑸=𝑨∙𝑩
0 0 0 Truth Table for NOT gate
0 1 0
1 0 0 • NAND Gate
1 1 1 A Negated-AND (NAND) gate is a logic gate with two or more inputs and one
output with behavior that is the opposite of an AND gate. The output of a NAND
Truth Table for AND gate gate is 1 when one or more of its inputs are 0. If all of a NAND gate's inputs are 1,
then the output of the NAND gate is 0. Simply stated, the NAND gate operates like
• OR Gate an AND gate followed by a NOT gate. Treat the inputs in the same way as an AND
An OR gate is a logic gate with two or more inputs and one output that performs gate and then invert the results. The logic symbol is like an AND gate, however,
logical disjunction. The output of an OR gate is 1 when one or more of its inputs are there is a small circle near the output terminal which represents the NOT function.
1. If all of an OR gate's inputs are 0, then the output of the OR gate is 0. Below are
the logic symbol for OR gate and a truth table with two inputs showing its behavior.

Logic symbol for NAND gate

Logic symbol for OR gate

𝑨 𝑩 𝑸 = ̅̅̅̅̅̅
𝑨∙𝑩
0 0 1
𝑨 𝑩 𝑸= 𝑨+𝑩
0 1 1
0 0 0
1 0 1
0 1 1
1 1 0
1 0 1
1 1 1 Truth table for NAND gate

Truth table for OR gate

• NOR Gate
A Negated-OR (NOR) gate is a logic gate with two or more inputs and one output
with behavior that is the opposite of an OR gate. The output of a NOR gate is 1 if all

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 of its inputs are 0. If one or more of a NOR gate's inputs are 1, then the output of by a NOT gate. The output of an XNOR gate is 1 when all of its inputs are 1 or when
the NOR gate is 0. The NOR gate operates as an OR gate followed by a NOT gate. all of its inputs are 0. If some of its inputs are 1 and others are 0, then the output of
So treat the inputs as with an OR gate and then use the NOT function on the results. the XNOR gate is 0. Another way of looking at this gate is to observe that the output
The logic symbol looks like the OR gate and has a circle near the output terminal to is 1 if the inputs are the same, but 0 if the inputs are different.
represent the NOT function.

Logic symbol for XNOR gate

Logic symbol for NOR gate

𝑨 𝑩 𝑸 = ̅̅̅̅̅̅̅̅
𝑨+𝑩 𝑨 𝑩 𝑸 = ̅̅̅̅̅̅̅̅̅
𝑨⊕𝑩
0 0 1 0 0 1
0 1 0 0 1 0
1 0 0 1 0 0
1 1 0 1 1 1

Truth Table for NOR gate Truth Table for XNOR gate

• XOR Gate Logic Circuits

An Exclusive-OR (XOR or EX-OR) gate is a logic gate with two or more inputs and We have seen that a simple Boolean operation (such as AND or OR) can be represented
one output that performs exclusive disjunction. The output of an XOR gate is 1 only by a simple logic gate. A more complex Boolean expression can be represented as a
when exactly one of its inputs is 1. If all of an XOR gate's inputs are 0, or if all of its combination of AND, OR, and NOT gates, resulting in a logic diagram that describes the
inputs are 1, then the output of the XOR gate is 0. Another way of looking at this entire expression. This logic diagram represents the physical implementation of the given
gate is to observe that the output is 1 if only 1 of the inputs is 1, but 0 otherwise. expression, or the actual logic circuit. Below is the logic circuit for the expression 𝑋 =
̅̅̅̅̅̅̅̅
𝐴+𝐵+𝐵∙𝐶

Logic symbol for XOR gate

𝐀 𝐁 𝐐= 𝐀⊕𝐁
0 0 0
0 1 1
1 0 1 The expression has 3 inputs A, B and C and can be divided into 2 parts:
1 1 0 • First part: ̅̅̅̅̅̅̅̅
𝐴+𝐵
Inputs A and B are joined by a NOR gate.
Truth Table for XOR gate
• Second part: 𝐵 ∙ 𝐶:
• XNOR Gate Inputs B and C are joined by an AND gate.
An Exclusive NOR (XNOR or EX-NOR) gate is a logic gate with two or more inputs
and one output that performs logical equality. It operates like an XOR gate followed Both parts are then joined by an OR gate to produce output X.

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 Inputs Binary values Condition in process
Example 1: An alarm system uses 3 switches A, B and C. A combination of these switches 1 Volume > 1000 litres
determines whether the alarm, X, sounds or not: If switch A or switch B are in the ON V
0 Volume <= 1000 litres
position, and if switch C is in the OFF position, then a signal to sound the alarm, X is 1 Temperature > 750°C
produced. T
0 Temperature <= 750°C
Design a logic circuit to represent the above system and also draw the truth table.
1 Speed > 15m/s
S
We do this by using ON = 1 and OFF = 0. 0 Speed <= 15m/s
So we get:
A stop signal (X = 1) occurs when:
If (A = 1 OR B = 1) AND (C = NOT 1) then X = 1 • either Volume, V > 1000 litres and Speed, S <= 15 m/s
• or Temperature, T <= 750ºC and Speed, S > 15 m/s
Notice that instead of 𝐶 = 0, we wrote 𝐶 = 𝑁𝑂𝑇 1. The resulting Boolean expression is:
Draw the logic circuit and truth table to show all the possible situations when the stop
𝑋 = (𝐴 + 𝐵) ∙ 𝐶̅ signal could be received.

The corresponding logic circuit is: First of all, it is necessary to turn the problem into a series of logic statements:

• Statement 1 can be re-written as:

V = 1 AND S = NOT 1 since V > 1000 (binary value = 1) and S <= 15 (binary value =
0)

• Statement 2 can be re-written as:

T = NOT 1 AND S = 1 since T <= 750ºC (binary value = 0) and S > 15 (binary value =
1)
Truth table:
• Both statements are joined together by an OR gate

𝑨 𝑩 𝑪 ̅
𝑪 𝑨+𝑩 𝑿 So, our logic statement becomes:
0 0 0 1 0 0 X = 1 if (V = 1 AND S = NOT 1) OR (T = NOT 1 AND S = 1)
0 0 1 0 0 0
0 1 0 1 1 1 Resulting in the Boolean expression: 𝑋 = 𝑉 ∙ 𝑆̅ + 𝑇̅ ∙ 𝑆
0 1 1 0 1 0 Logic circuit:
1 0 0 1 1 1
1 0 1 0 1 0
1 1 0 1 1 1
1 1 1 0 1 0

Example 2: A manufacturing process is controlled by a built-in logic circuit which is made

up of AND, OR and NOT gates only. The process receives a STOP signal (i.e. X = 1)
depending on certain conditions, shown in the following table:

Truth table:

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 𝑽 𝑻 𝑺 ̅
𝑻 ̅
𝑺 𝑽∙̅
𝑺 ̅∙𝑺
𝑻 𝑿
0 0 0 1 1 0 0 0 An examination of the two expressions tells us that there is no scope for further
0 0 1 1 0 0 1 1 simplification. While the first one representing the Sum output is that of an XOR gate,
0 1 0 0 1 0 0 0 the second one representing the Carry output is that of an AND gate. This gives the
0 1 1 0 0 0 0 0 circuit below.
1 0 0 1 1 1 0 1
1 0 1 1 0 0 1 1
1 1 0 0 1 1 0 1
1 1 1 0 0 0 0 0

Boolean algebra allows us to analyze and design digital circuits. Because of the (a) Logic circuit of half adder
relationship between Boolean algebra and logic diagrams, we simplify our circuit by
simplifying our Boolean expression. Simpler circuits are cheaper to build, consume less
power, and run faster than complex circuits.

4.3. BASIC ARITHMETIC CIRCUITS

Addition and subtraction are the two most commonly used arithmetic operations, as the (b) Block diagram of half adder
other two, namely multiplication and division, are respectively the processes of repeated
addition and repeated subtraction. The basic building blocks that form the basis of all Full Adder Circuit
hardware used to perform the aforesaid arithmetic operations on binary numbers include A full adder is an arithmetic circuit that can be used to add three bits to produce a SUM
half-adder, full adder, half-subtractor, full subtractor and controlled inverter. (S) and a CARRY output (Cout). Such a circuit becomes a necessity when it comes to
adding binary numbers with a large number of bits. The full adder circuit overcomes the
Half-Adder Circuit limitation of the half-adder, which can be used to add two bits only. Let us recall the
A half-adder is an arithmetic circuit that can be used to add two bits. Such a circuit thus procedure for adding larger binary numbers. We begin with the addition of LSBs of the
has two inputs that represent the two bits to be added and two outputs, with one two numbers. We record the sum under the LSB column and take the carry, if any,
producing the SUM output, and the other producing the CARRY. Below is the truth table forward to the next higher column bits. As a result, when we add the next adjacent higher
of a half-adder, showing all possible input combinations and the corresponding outputs. column bits, we would be required to add three bits if there was a carry from the previous
addition. We have a similar situation for the other higher column bits also until we reach
𝑨 𝑩 𝑺𝒖𝒎 (𝑺) 𝑪𝒂𝒓𝒓𝒚 (𝑪) the MSB. A full adder is therefore essential for the hardware implementation of an adder
0 0 0 0 circuit capable of adding larger binary numbers as a half-adder can be used for addition
0 1 1 0 of LSBs only.
1 0 1 0 Below is the truth table of a full adder circuit showing all possible input combinations
1 1 0 1 and corresponding outputs.

Truth table of a half-adder

From the truth table, the Boolean expressions for the SUM and CARRY outputs are given
by the equations:

𝑆 = 𝐴̅ ∙ 𝐵 + 𝐴 ∙ 𝐵̅ = 𝐴 ⊕ 𝐵

𝐶 = 𝐴∙𝐵

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 𝐀 𝐁 𝐂𝐢𝐧 𝐒 𝐂𝐨𝐮𝐭
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1 (b) Implementing full adder using half adders
1 0 0 1 0
1 0 1 0 1 Parallel Adder Circuit
1 1 0 0 1 A single full adder performs the addition of two 1 bit numbers and an input carry. If we
1 1 1 1 1 want to add two 4-bit numbers, we will need for each pair of corresponding bits, a full
adder circuit. The full adders will have to be interconnected to form one circuit, as they
may be a carry from the addition of any of the pairs that will need to be added to the
Truth table of a full adder
next higher-order pair of bits.
A parallel adder is a digital circuit that produces the arithmetic sum of two binary
From the truth table, the Boolean expressions for the Sum and Carry outputs are given
numbers. It is constructed with several full adders connected in cascade, with the carry
by the equations:
output from each full adder connected to the carry input of the next full adder in the
chain. The number of full adders used depends on the number of bits which require to
𝑆 = 𝐴̅ ∙ 𝐵̅ ∙ 𝐶𝑖𝑛 + 𝐴̅ ∙ 𝐵 ∙ 𝐶𝑖𝑛
̅ + 𝐴 ∙ 𝐵̅ ∙ 𝐶𝑖𝑛
̅ + 𝐴 ∙ 𝐵 ∙ 𝐶𝑖𝑛
be added. It is important to notice that for the least significant bits, there is no carry input.
𝐶𝑜𝑢𝑡 = 𝐴̅ ∙ 𝐵. 𝐶𝑖𝑛 + 𝐴 ∙ 𝐵̅ ∙ 𝐶𝑖𝑛 + 𝐴 ∙ 𝐵 ∙ 𝐶𝑖𝑛
̅ + 𝐴 ∙ 𝐵 ∙ 𝐶𝑖𝑛 Hence, we can use a half adder for the addition of these bits or use a full adder but make
the carry in to be zero. The figure below is that of a parallel binary adder for adding two
These two expressions can be rewritten as follows: 4-bit numbers given as A3A2A1A0 and B3B2B1B0 to give a sum output S3S2S1S0.

̅ ∙ (𝐴̅ ∙ 𝐵 + 𝐴 ∙ 𝐵̅ ) + 𝐶𝑖𝑛 ∙ (𝐴 ∙ 𝐵 + 𝐴̅ ∙ 𝐵̅ )
𝑆 = 𝐶𝑖𝑛
̅ ∙ (𝐴̅ ∙ 𝐵 + 𝐴 ∙ 𝐵̅ ) + 𝐶𝑖𝑛 ∙ (𝐴
= 𝐶𝑖𝑛 ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
̅ ∙ 𝐵 + 𝐴 ∙ 𝐵̅ )
= 𝐴 ⊕ 𝐵 ⊕ 𝐶𝑖𝑛

𝐶𝑜𝑢𝑡 = 𝐶𝑖𝑛 ∙ (𝐴̅ ∙ 𝐵 + 𝐴 ∙ 𝐵̅ ) + 𝐴 ∙ 𝐵 ∙ (𝐶𝑖𝑛

̅ + 𝐶𝑖𝑛 )
= 𝐶𝑖𝑛 ∙ (𝐴̅ ∙ 𝐵 + 𝐴 ∙ 𝐵̅ ) + 𝐴 ∙ 𝐵 ∙ 1
= 𝐴 ∙ 𝐵 + 𝐶𝑖𝑛 ∙ (𝐴 ⊕ 𝐵)

This gives the following implementation of a full adder circuit.

4-bit parallel adder

Half-Subtractor Circuit
A half-subtractor is a combinational circuit that can be used to subtract one binary digit
from another to produce a DIFFERENCE output (D) and a BORROW output (B 0). The
BORROW output here specifies whether a ‘1’ has been borrowed to perform the
(a) Logic circuit of full adder subtraction. The truth table of a half-subtractor is given below.

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 𝐀 𝐁 𝐃𝐢𝐟𝐟𝐞𝐫𝐞𝐧𝐜𝐞 (𝐃) 𝐁𝐨𝐫𝐫𝐨𝐰 (𝐁𝐨 ) 𝐀 𝐁 𝐁𝐢𝐧 𝐃 𝐁𝐨
0 0 0 0 0 0 0 0 0
0 1 1 1 0 0 1 1 1
1 0 1 0 0 1 0 1 1
1 1 0 0 0 1 1 0 1
1 0 0 1 0
Truth table of a half-subtractor 1 0 1 0 0
1 1 0 0 0
The Boolean expressions for the two outputs are given by the following equations:
1 1 1 1 1

𝐷 = 𝐴̅ ∙ 𝐵 + 𝐴 ∙ 𝐵̅ = 𝐴 ⊕ 𝐵
The Boolean expressions for the two output variables are given by the equations:
𝐵𝑜 = 𝐴̅ ∙ 𝐵
̅∙B
D=A ̅∙B∙B
̅ ∙ Bin + A ̅ in + A ∙ B
̅∙B
̅in + A ∙ B ∙ Bin

It is obvious that there is no further scope for any simplification of these expressions.
̅∙B
BO = A ̅∙B∙B
̅ ∙ Bin + A ̅ ∙ B ∙ Bin + A ∙ B ∙ Bin
̅in + A
While the expression for the DIFFERENCE output is that of an XOR gate, the expression
for the BORROW output is that of an AND gate with input A complemented before it is
These two expressions can be rewritten as:
fed to the gate.

D=B ̅∙B+A∙B
̅in ∙ (A ̅ ) + Bin ∙ (A ∙ B + A̅∙B ̅)
D=B ̅∙B+A∙B
̅in ∙ (A ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
̅∙B+A∙B
̅ ) + Bin ∙ (A ̅)
D = A ⊕ B ⊕ Bin

̅ ∙ B ∙ (B
BO = A ̅∙B
̅in + Bin ) + Bin ∙ (A ̅ + A ∙ B)
B=A ̅ ∙ B ∙ 1 + Bin ∙ (A
̅∙B ̅ + A ∙ B)
(a) Logic circuit of half subtractor B=A ̅̅̅̅̅̅̅̅
̅ ∙ B + Bin ∙ (A ⊕ B)

This gives the following implementation of a full subtractor circuit:

(b) Block diagram of half subtractor

Full Subtractor Circuit

A full subtractor performs subtraction operation on two bits, a minuend and a
subtrahend, and also takes into consideration whether a ‘1’ has already been borrowed
by the previous adjacent lower minuend bit or not. As a result, there are three bits to be
handled at the input of a full subtractor, namely the two bits to be subtracted and a a) Logic circuit of full subtractor
borrow bit designated as Bin. There are two outputs, namely the DIFFERENCE output (D)
and the BORROW output Bo. The BORROW output bit tells whether the minuend bit
needs to borrow a ‘1’ from the next possible higher minuend bit. Below is the truth table
of a full subtractor.

b) Implementing full subtractor using half subtractors

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Parallel Subtractor Circuit
To perform the subtraction of binary numbers with more than one bit, we require a
parallel subtractor. A parallel subtractor can be designed in several ways, including the
combination of half and full subtractors, all full subtractors, and all full adders with
subtrahend complement input. The figure below shows a 4-bit parallel subtractor formed
by connecting one half subtractor and three full subtractors. In this subtractor, a 4-bit
minuend A3A2A1A0 is subtracted by a 4-bit subtrahend B3B2B1B0 to give the difference
output D3D2D1D0. The borrow output of each subtractor is connected as the borrow input
to the next preceding subtractor.

4-bit parallel subtractor

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